CHANGES: Add last minute 2021.02.1 updates

Busybox and python-django have been updated as well. Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Update for 2021.02.1
2021-04-07 12:20:21 +02:00 · 2021-04-07 12:18:44 +02:00 · 2021-04-07 11:21:52 +02:00 · 2021-04-07 11:17:13 +02:00 · 2021-04-07 11:17:05 +02:00 · 2021-04-07 11:06:30 +02:00
14090 changed files with 206309 additions and 276392 deletions
--- a/.b4-config
+++ b/.b4-config
@@ -1,8 +0,0 @@
-# Configuration for the `b4` tool
-# See https://b4.docs.kernel.org/en/latest/config.html
-[b4]
-    send-series-to = buildroot@buildroot.org
-    send-auto-cc-cmd = "./utils/get-developers -e -"
-    prep-perpatch-check-cmd = "./utils/check-package -q -p -"
-
-# vim: set filetype=gitconfig:
--- a/.checkpackageignore
+++ b/.checkpackageignore
--- a/.clang-format
+++ b/.clang-format
@@ -1,567 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# clang-format configuration file. Intended for clang-format >= 4.
-#
-# For more information, see:
-#
-#   Documentation/process/clang-format.rst
-#   https://clang.llvm.org/docs/ClangFormat.html
-#   https://clang.llvm.org/docs/ClangFormatStyleOptions.html
-#
-
-# Buildroot: imported from Linux 5.15.6, with minimal modifications.
-#            Please note, this is not enforced at the moment. Intended
-#            as an aid when working with in-tree C files, like
-#            makedevs.c
-#
---
-AccessModifierOffset: -4
-AlignAfterOpenBracket: Align
-AlignConsecutiveAssignments: false
-AlignConsecutiveDeclarations: false
-#AlignEscapedNewlines: Left # Unknown to clang-format-4.0
-AlignOperands: true
-AlignTrailingComments: false
-AllowAllParametersOfDeclarationOnNextLine: false
-AllowShortBlocksOnASingleLine: false
-AllowShortCaseLabelsOnASingleLine: false
-AllowShortFunctionsOnASingleLine: None
-AllowShortIfStatementsOnASingleLine: false
-AllowShortLoopsOnASingleLine: false
-AlwaysBreakAfterDefinitionReturnType: None
-AlwaysBreakAfterReturnType: None
-AlwaysBreakBeforeMultilineStrings: false
-AlwaysBreakTemplateDeclarations: false
-BinPackArguments: true
-BinPackParameters: true
-BraceWrapping:
-  AfterClass: false
-  AfterControlStatement: false
-  AfterEnum: false
-  AfterFunction: true
-  AfterNamespace: true
-  AfterObjCDeclaration: false
-  AfterStruct: false
-  AfterUnion: false
-  #AfterExternBlock: false # Unknown to clang-format-5.0
-  BeforeCatch: false
-  BeforeElse: false
-  IndentBraces: false
-  #SplitEmptyFunction: true # Unknown to clang-format-4.0
-  #SplitEmptyRecord: true # Unknown to clang-format-4.0
-  #SplitEmptyNamespace: true # Unknown to clang-format-4.0
-BreakBeforeBinaryOperators: None
-BreakBeforeBraces: Custom
-#BreakBeforeInheritanceComma: false # Unknown to clang-format-4.0
-BreakBeforeTernaryOperators: false
-BreakConstructorInitializersBeforeComma: false
-#BreakConstructorInitializers: BeforeComma # Unknown to clang-format-4.0
-BreakAfterJavaFieldAnnotations: false
-BreakStringLiterals: false
-ColumnLimit: 132 # Specially for Buildroot
-CommentPragmas: '^ IWYU pragma:'
-#CompactNamespaces: false # Unknown to clang-format-4.0
-ConstructorInitializerAllOnOneLineOrOnePerLine: false
-ConstructorInitializerIndentWidth: 8
-ContinuationIndentWidth: 8
-Cpp11BracedListStyle: false
-DerivePointerAlignment: false
-DisableFormat: false
-ExperimentalAutoDetectBinPacking: false
-#FixNamespaceComments: false # Unknown to clang-format-4.0
-
-# Taken from:
-#   git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ \
-#   | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$,  - '\1'," \
-#   | sort | uniq
-ForEachMacros:
-  - 'apei_estatus_for_each_section'
-  - 'ata_for_each_dev'
-  - 'ata_for_each_link'
-  - '__ata_qc_for_each'
-  - 'ata_qc_for_each'
-  - 'ata_qc_for_each_raw'
-  - 'ata_qc_for_each_with_internal'
-  - 'ax25_for_each'
-  - 'ax25_uid_for_each'
-  - '__bio_for_each_bvec'
-  - 'bio_for_each_bvec'
-  - 'bio_for_each_bvec_all'
-  - 'bio_for_each_integrity_vec'
-  - '__bio_for_each_segment'
-  - 'bio_for_each_segment'
-  - 'bio_for_each_segment_all'
-  - 'bio_list_for_each'
-  - 'bip_for_each_vec'
-  - 'bitmap_for_each_clear_region'
-  - 'bitmap_for_each_set_region'
-  - 'blkg_for_each_descendant_post'
-  - 'blkg_for_each_descendant_pre'
-  - 'blk_queue_for_each_rl'
-  - 'bond_for_each_slave'
-  - 'bond_for_each_slave_rcu'
-  - 'bpf_for_each_spilled_reg'
-  - 'btree_for_each_safe128'
-  - 'btree_for_each_safe32'
-  - 'btree_for_each_safe64'
-  - 'btree_for_each_safel'
-  - 'card_for_each_dev'
-  - 'cgroup_taskset_for_each'
-  - 'cgroup_taskset_for_each_leader'
-  - 'cpufreq_for_each_entry'
-  - 'cpufreq_for_each_entry_idx'
-  - 'cpufreq_for_each_valid_entry'
-  - 'cpufreq_for_each_valid_entry_idx'
-  - 'css_for_each_child'
-  - 'css_for_each_descendant_post'
-  - 'css_for_each_descendant_pre'
-  - 'device_for_each_child_node'
-  - 'displayid_iter_for_each'
-  - 'dma_fence_chain_for_each'
-  - 'do_for_each_ftrace_op'
-  - 'drm_atomic_crtc_for_each_plane'
-  - 'drm_atomic_crtc_state_for_each_plane'
-  - 'drm_atomic_crtc_state_for_each_plane_state'
-  - 'drm_atomic_for_each_plane_damage'
-  - 'drm_client_for_each_connector_iter'
-  - 'drm_client_for_each_modeset'
-  - 'drm_connector_for_each_possible_encoder'
-  - 'drm_for_each_bridge_in_chain'
-  - 'drm_for_each_connector_iter'
-  - 'drm_for_each_crtc'
-  - 'drm_for_each_crtc_reverse'
-  - 'drm_for_each_encoder'
-  - 'drm_for_each_encoder_mask'
-  - 'drm_for_each_fb'
-  - 'drm_for_each_legacy_plane'
-  - 'drm_for_each_plane'
-  - 'drm_for_each_plane_mask'
-  - 'drm_for_each_privobj'
-  - 'drm_mm_for_each_hole'
-  - 'drm_mm_for_each_node'
-  - 'drm_mm_for_each_node_in_range'
-  - 'drm_mm_for_each_node_safe'
-  - 'flow_action_for_each'
-  - 'for_each_acpi_dev_match'
-  - 'for_each_active_dev_scope'
-  - 'for_each_active_drhd_unit'
-  - 'for_each_active_iommu'
-  - 'for_each_aggr_pgid'
-  - 'for_each_available_child_of_node'
-  - 'for_each_bio'
-  - 'for_each_board_func_rsrc'
-  - 'for_each_bvec'
-  - 'for_each_card_auxs'
-  - 'for_each_card_auxs_safe'
-  - 'for_each_card_components'
-  - 'for_each_card_dapms'
-  - 'for_each_card_pre_auxs'
-  - 'for_each_card_prelinks'
-  - 'for_each_card_rtds'
-  - 'for_each_card_rtds_safe'
-  - 'for_each_card_widgets'
-  - 'for_each_card_widgets_safe'
-  - 'for_each_cgroup_storage_type'
-  - 'for_each_child_of_node'
-  - 'for_each_clear_bit'
-  - 'for_each_clear_bit_from'
-  - 'for_each_cmsghdr'
-  - 'for_each_compatible_node'
-  - 'for_each_component_dais'
-  - 'for_each_component_dais_safe'
-  - 'for_each_comp_order'
-  - 'for_each_console'
-  - 'for_each_cpu'
-  - 'for_each_cpu_and'
-  - 'for_each_cpu_not'
-  - 'for_each_cpu_wrap'
-  - 'for_each_dapm_widgets'
-  - 'for_each_dev_addr'
-  - 'for_each_dev_scope'
-  - 'for_each_dma_cap_mask'
-  - 'for_each_dpcm_be'
-  - 'for_each_dpcm_be_rollback'
-  - 'for_each_dpcm_be_safe'
-  - 'for_each_dpcm_fe'
-  - 'for_each_drhd_unit'
-  - 'for_each_dss_dev'
-  - 'for_each_dtpm_table'
-  - 'for_each_efi_memory_desc'
-  - 'for_each_efi_memory_desc_in_map'
-  - 'for_each_element'
-  - 'for_each_element_extid'
-  - 'for_each_element_id'
-  - 'for_each_endpoint_of_node'
-  - 'for_each_evictable_lru'
-  - 'for_each_fib6_node_rt_rcu'
-  - 'for_each_fib6_walker_rt'
-  - 'for_each_free_mem_pfn_range_in_zone'
-  - 'for_each_free_mem_pfn_range_in_zone_from'
-  - 'for_each_free_mem_range'
-  - 'for_each_free_mem_range_reverse'
-  - 'for_each_func_rsrc'
-  - 'for_each_hstate'
-  - 'for_each_if'
-  - 'for_each_iommu'
-  - 'for_each_ip_tunnel_rcu'
-  - 'for_each_irq_nr'
-  - 'for_each_link_codecs'
-  - 'for_each_link_cpus'
-  - 'for_each_link_platforms'
-  - 'for_each_lru'
-  - 'for_each_matching_node'
-  - 'for_each_matching_node_and_match'
-  - 'for_each_member'
-  - 'for_each_memcg_cache_index'
-  - 'for_each_mem_pfn_range'
-  - '__for_each_mem_range'
-  - 'for_each_mem_range'
-  - '__for_each_mem_range_rev'
-  - 'for_each_mem_range_rev'
-  - 'for_each_mem_region'
-  - 'for_each_migratetype_order'
-  - 'for_each_msi_entry'
-  - 'for_each_msi_entry_safe'
-  - 'for_each_msi_vector'
-  - 'for_each_net'
-  - 'for_each_net_continue_reverse'
-  - 'for_each_netdev'
-  - 'for_each_netdev_continue'
-  - 'for_each_netdev_continue_rcu'
-  - 'for_each_netdev_continue_reverse'
-  - 'for_each_netdev_feature'
-  - 'for_each_netdev_in_bond_rcu'
-  - 'for_each_netdev_rcu'
-  - 'for_each_netdev_reverse'
-  - 'for_each_netdev_safe'
-  - 'for_each_net_rcu'
-  - 'for_each_new_connector_in_state'
-  - 'for_each_new_crtc_in_state'
-  - 'for_each_new_mst_mgr_in_state'
-  - 'for_each_new_plane_in_state'
-  - 'for_each_new_private_obj_in_state'
-  - 'for_each_node'
-  - 'for_each_node_by_name'
-  - 'for_each_node_by_type'
-  - 'for_each_node_mask'
-  - 'for_each_node_state'
-  - 'for_each_node_with_cpus'
-  - 'for_each_node_with_property'
-  - 'for_each_nonreserved_multicast_dest_pgid'
-  - 'for_each_of_allnodes'
-  - 'for_each_of_allnodes_from'
-  - 'for_each_of_cpu_node'
-  - 'for_each_of_pci_range'
-  - 'for_each_old_connector_in_state'
-  - 'for_each_old_crtc_in_state'
-  - 'for_each_old_mst_mgr_in_state'
-  - 'for_each_oldnew_connector_in_state'
-  - 'for_each_oldnew_crtc_in_state'
-  - 'for_each_oldnew_mst_mgr_in_state'
-  - 'for_each_oldnew_plane_in_state'
-  - 'for_each_oldnew_plane_in_state_reverse'
-  - 'for_each_oldnew_private_obj_in_state'
-  - 'for_each_old_plane_in_state'
-  - 'for_each_old_private_obj_in_state'
-  - 'for_each_online_cpu'
-  - 'for_each_online_node'
-  - 'for_each_online_pgdat'
-  - 'for_each_pci_bridge'
-  - 'for_each_pci_dev'
-  - 'for_each_pci_msi_entry'
-  - 'for_each_pcm_streams'
-  - 'for_each_physmem_range'
-  - 'for_each_populated_zone'
-  - 'for_each_possible_cpu'
-  - 'for_each_present_cpu'
-  - 'for_each_prime_number'
-  - 'for_each_prime_number_from'
-  - 'for_each_process'
-  - 'for_each_process_thread'
-  - 'for_each_prop_codec_conf'
-  - 'for_each_prop_dai_codec'
-  - 'for_each_prop_dai_cpu'
-  - 'for_each_prop_dlc_codecs'
-  - 'for_each_prop_dlc_cpus'
-  - 'for_each_prop_dlc_platforms'
-  - 'for_each_property_of_node'
-  - 'for_each_registered_fb'
-  - 'for_each_requested_gpio'
-  - 'for_each_requested_gpio_in_range'
-  - 'for_each_reserved_mem_range'
-  - 'for_each_reserved_mem_region'
-  - 'for_each_rtd_codec_dais'
-  - 'for_each_rtd_components'
-  - 'for_each_rtd_cpu_dais'
-  - 'for_each_rtd_dais'
-  - 'for_each_set_bit'
-  - 'for_each_set_bit_from'
-  - 'for_each_set_clump8'
-  - 'for_each_sg'
-  - 'for_each_sg_dma_page'
-  - 'for_each_sg_page'
-  - 'for_each_sgtable_dma_page'
-  - 'for_each_sgtable_dma_sg'
-  - 'for_each_sgtable_page'
-  - 'for_each_sgtable_sg'
-  - 'for_each_sibling_event'
-  - 'for_each_subelement'
-  - 'for_each_subelement_extid'
-  - 'for_each_subelement_id'
-  - '__for_each_thread'
-  - 'for_each_thread'
-  - 'for_each_unicast_dest_pgid'
-  - 'for_each_vsi'
-  - 'for_each_wakeup_source'
-  - 'for_each_zone'
-  - 'for_each_zone_zonelist'
-  - 'for_each_zone_zonelist_nodemask'
-  - 'fwnode_for_each_available_child_node'
-  - 'fwnode_for_each_child_node'
-  - 'fwnode_graph_for_each_endpoint'
-  - 'gadget_for_each_ep'
-  - 'genradix_for_each'
-  - 'genradix_for_each_from'
-  - 'hash_for_each'
-  - 'hash_for_each_possible'
-  - 'hash_for_each_possible_rcu'
-  - 'hash_for_each_possible_rcu_notrace'
-  - 'hash_for_each_possible_safe'
-  - 'hash_for_each_rcu'
-  - 'hash_for_each_safe'
-  - 'hctx_for_each_ctx'
-  - 'hlist_bl_for_each_entry'
-  - 'hlist_bl_for_each_entry_rcu'
-  - 'hlist_bl_for_each_entry_safe'
-  - 'hlist_for_each'
-  - 'hlist_for_each_entry'
-  - 'hlist_for_each_entry_continue'
-  - 'hlist_for_each_entry_continue_rcu'
-  - 'hlist_for_each_entry_continue_rcu_bh'
-  - 'hlist_for_each_entry_from'
-  - 'hlist_for_each_entry_from_rcu'
-  - 'hlist_for_each_entry_rcu'
-  - 'hlist_for_each_entry_rcu_bh'
-  - 'hlist_for_each_entry_rcu_notrace'
-  - 'hlist_for_each_entry_safe'
-  - 'hlist_for_each_entry_srcu'
-  - '__hlist_for_each_rcu'
-  - 'hlist_for_each_safe'
-  - 'hlist_nulls_for_each_entry'
-  - 'hlist_nulls_for_each_entry_from'
-  - 'hlist_nulls_for_each_entry_rcu'
-  - 'hlist_nulls_for_each_entry_safe'
-  - 'i3c_bus_for_each_i2cdev'
-  - 'i3c_bus_for_each_i3cdev'
-  - 'ide_host_for_each_port'
-  - 'ide_port_for_each_dev'
-  - 'ide_port_for_each_present_dev'
-  - 'idr_for_each_entry'
-  - 'idr_for_each_entry_continue'
-  - 'idr_for_each_entry_continue_ul'
-  - 'idr_for_each_entry_ul'
-  - 'in_dev_for_each_ifa_rcu'
-  - 'in_dev_for_each_ifa_rtnl'
-  - 'inet_bind_bucket_for_each'
-  - 'inet_lhash2_for_each_icsk_rcu'
-  - 'key_for_each'
-  - 'key_for_each_safe'
-  - 'klp_for_each_func'
-  - 'klp_for_each_func_safe'
-  - 'klp_for_each_func_static'
-  - 'klp_for_each_object'
-  - 'klp_for_each_object_safe'
-  - 'klp_for_each_object_static'
-  - 'kunit_suite_for_each_test_case'
-  - 'kvm_for_each_memslot'
-  - 'kvm_for_each_vcpu'
-  - 'list_for_each'
-  - 'list_for_each_codec'
-  - 'list_for_each_codec_safe'
-  - 'list_for_each_continue'
-  - 'list_for_each_entry'
-  - 'list_for_each_entry_continue'
-  - 'list_for_each_entry_continue_rcu'
-  - 'list_for_each_entry_continue_reverse'
-  - 'list_for_each_entry_from'
-  - 'list_for_each_entry_from_rcu'
-  - 'list_for_each_entry_from_reverse'
-  - 'list_for_each_entry_lockless'
-  - 'list_for_each_entry_rcu'
-  - 'list_for_each_entry_reverse'
-  - 'list_for_each_entry_safe'
-  - 'list_for_each_entry_safe_continue'
-  - 'list_for_each_entry_safe_from'
-  - 'list_for_each_entry_safe_reverse'
-  - 'list_for_each_entry_srcu'
-  - 'list_for_each_prev'
-  - 'list_for_each_prev_safe'
-  - 'list_for_each_safe'
-  - 'llist_for_each'
-  - 'llist_for_each_entry'
-  - 'llist_for_each_entry_safe'
-  - 'llist_for_each_safe'
-  - 'mci_for_each_dimm'
-  - 'media_device_for_each_entity'
-  - 'media_device_for_each_intf'
-  - 'media_device_for_each_link'
-  - 'media_device_for_each_pad'
-  - 'nanddev_io_for_each_page'
-  - 'netdev_for_each_lower_dev'
-  - 'netdev_for_each_lower_private'
-  - 'netdev_for_each_lower_private_rcu'
-  - 'netdev_for_each_mc_addr'
-  - 'netdev_for_each_uc_addr'
-  - 'netdev_for_each_upper_dev_rcu'
-  - 'netdev_hw_addr_list_for_each'
-  - 'nft_rule_for_each_expr'
-  - 'nla_for_each_attr'
-  - 'nla_for_each_nested'
-  - 'nlmsg_for_each_attr'
-  - 'nlmsg_for_each_msg'
-  - 'nr_neigh_for_each'
-  - 'nr_neigh_for_each_safe'
-  - 'nr_node_for_each'
-  - 'nr_node_for_each_safe'
-  - 'of_for_each_phandle'
-  - 'of_property_for_each_string'
-  - 'of_property_for_each_u32'
-  - 'pci_bus_for_each_resource'
-  - 'pcl_for_each_chunk'
-  - 'pcl_for_each_segment'
-  - 'pcm_for_each_format'
-  - 'ping_portaddr_for_each_entry'
-  - 'plist_for_each'
-  - 'plist_for_each_continue'
-  - 'plist_for_each_entry'
-  - 'plist_for_each_entry_continue'
-  - 'plist_for_each_entry_safe'
-  - 'plist_for_each_safe'
-  - 'pnp_for_each_card'
-  - 'pnp_for_each_dev'
-  - 'protocol_for_each_card'
-  - 'protocol_for_each_dev'
-  - 'queue_for_each_hw_ctx'
-  - 'radix_tree_for_each_slot'
-  - 'radix_tree_for_each_tagged'
-  - 'rb_for_each'
-  - 'rbtree_postorder_for_each_entry_safe'
-  - 'rdma_for_each_block'
-  - 'rdma_for_each_port'
-  - 'rdma_umem_for_each_dma_block'
-  - 'resource_list_for_each_entry'
-  - 'resource_list_for_each_entry_safe'
-  - 'rhl_for_each_entry_rcu'
-  - 'rhl_for_each_rcu'
-  - 'rht_for_each'
-  - 'rht_for_each_entry'
-  - 'rht_for_each_entry_from'
-  - 'rht_for_each_entry_rcu'
-  - 'rht_for_each_entry_rcu_from'
-  - 'rht_for_each_entry_safe'
-  - 'rht_for_each_from'
-  - 'rht_for_each_rcu'
-  - 'rht_for_each_rcu_from'
-  - '__rq_for_each_bio'
-  - 'rq_for_each_bvec'
-  - 'rq_for_each_segment'
-  - 'scsi_for_each_prot_sg'
-  - 'scsi_for_each_sg'
-  - 'sctp_for_each_hentry'
-  - 'sctp_skb_for_each'
-  - 'shdma_for_each_chan'
-  - '__shost_for_each_device'
-  - 'shost_for_each_device'
-  - 'sk_for_each'
-  - 'sk_for_each_bound'
-  - 'sk_for_each_entry_offset_rcu'
-  - 'sk_for_each_from'
-  - 'sk_for_each_rcu'
-  - 'sk_for_each_safe'
-  - 'sk_nulls_for_each'
-  - 'sk_nulls_for_each_from'
-  - 'sk_nulls_for_each_rcu'
-  - 'snd_array_for_each'
-  - 'snd_pcm_group_for_each_entry'
-  - 'snd_soc_dapm_widget_for_each_path'
-  - 'snd_soc_dapm_widget_for_each_path_safe'
-  - 'snd_soc_dapm_widget_for_each_sink_path'
-  - 'snd_soc_dapm_widget_for_each_source_path'
-  - 'tb_property_for_each'
-  - 'tcf_exts_for_each_action'
-  - 'udp_portaddr_for_each_entry'
-  - 'udp_portaddr_for_each_entry_rcu'
-  - 'usb_hub_for_each_child'
-  - 'v4l2_device_for_each_subdev'
-  - 'v4l2_m2m_for_each_dst_buf'
-  - 'v4l2_m2m_for_each_dst_buf_safe'
-  - 'v4l2_m2m_for_each_src_buf'
-  - 'v4l2_m2m_for_each_src_buf_safe'
-  - 'virtio_device_for_each_vq'
-  - 'while_for_each_ftrace_op'
-  - 'xa_for_each'
-  - 'xa_for_each_marked'
-  - 'xa_for_each_range'
-  - 'xa_for_each_start'
-  - 'xas_for_each'
-  - 'xas_for_each_conflict'
-  - 'xas_for_each_marked'
-  - 'xbc_array_for_each_value'
-  - 'xbc_for_each_key_value'
-  - 'xbc_node_for_each_array_value'
-  - 'xbc_node_for_each_child'
-  - 'xbc_node_for_each_key_value'
-  - 'zorro_for_each_dev'
-
-#IncludeBlocks: Preserve # Unknown to clang-format-5.0
-IncludeCategories:
-  - Regex: '.*'
-    Priority: 1
-IncludeIsMainRegex: '(Test)?$'
-IndentCaseLabels: false
-#IndentPPDirectives: None # Unknown to clang-format-5.0
-IndentWidth: 8
-IndentWrappedFunctionNames: false
-JavaScriptQuotes: Leave
-JavaScriptWrapImports: true
-KeepEmptyLinesAtTheStartOfBlocks: false
-MacroBlockBegin: ''
-MacroBlockEnd: ''
-MaxEmptyLinesToKeep: 1
-NamespaceIndentation: None
-#ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0
-ObjCBlockIndentWidth: 8
-ObjCSpaceAfterProperty: true
-ObjCSpaceBeforeProtocolList: true
-
-# Taken from git's rules
-#PenaltyBreakAssignment: 10 # Unknown to clang-format-4.0
-PenaltyBreakBeforeFirstCallParameter: 30
-PenaltyBreakComment: 10
-PenaltyBreakFirstLessLess: 0
-PenaltyBreakString: 10
-PenaltyExcessCharacter: 100
-PenaltyReturnTypeOnItsOwnLine: 60
-
-PointerAlignment: Right
-ReflowComments: false
-SortIncludes: false
-#SortUsingDeclarations: false # Unknown to clang-format-4.0
-SpaceAfterCStyleCast: false
-SpaceAfterTemplateKeyword: true
-SpaceBeforeAssignmentOperators: true
-#SpaceBeforeCtorInitializerColon: true # Unknown to clang-format-5.0
-#SpaceBeforeInheritanceColon: true # Unknown to clang-format-5.0
-SpaceBeforeParens: ControlStatements
-#SpaceBeforeRangeBasedForLoopColon: true # Unknown to clang-format-5.0
-SpaceInEmptyParentheses: false
-SpacesBeforeTrailingComments: 1
-SpacesInAngles: false
-SpacesInContainerLiterals: false
-SpacesInCStyleCastParentheses: false
-SpacesInParentheses: false
-SpacesInSquareBrackets: false
-Standard: Cpp03
-TabWidth: 8
-UseTab: Always
-...
--- a/.defconfig
+++ b/.defconfig
@@ -12,6 +12,7 @@ BR2_i386=y
 # BR2_m68k is not set
 # BR2_mips is not set
 # BR2_mipsel is not set
+# BR2_nios2 is not set
 # BR2_powerpc is not set
 # BR2_sh is not set
 # BR2_sparc is not set
--- a/.editorconfig
+++ b/.editorconfig
@@ -1,40 +0,0 @@
-root = true
-
-[*]
-charset = utf-8
-end_of_line = lf
-indent_style = space
-indent_size = 4
-tab_width = 8
-trim_trailing_whitespace = true
-insert_final_newline = true
-
-[DEVELOPERS]
-indent_style = tab
-indent_size = tab
-
-[Config*.in*]
-indent_style = tab
-indent_size = tab
-
-[linux/Config.ext.in]
-indent_style = tab
-indent_size = tab
-
-[Makefile*]
-indent_style = tab
-indent_size = tab
-
-[*.mk]
-indent_style = tab
-indent_size = tab
-
-[*.patch]
-trim_trailing_whitespace = false
-
-[S{0..9}{0..9}*]
-indent_style = tab
-indent_size = tab
-
-[*.adoc]
-trim_trailing_whitespace = false
--- a/.github/pull_request_template.md
+++ b/.github/pull_request_template.md
@@ -1,6 +0,0 @@
-Please do not submit a Pull Request via GitHub. Buildroot makes use of a
-[mailing list](http://lists.buildroot.org/mailman/listinfo/buildroot) for patch submission and review.
-See [submitting your own patches](http://buildroot.org/manual.html#submitting-patches) for more info.
-
-Thanks for your help!
-
--- a/.github/workflows/repo-lockdown.yml
+++ b/.github/workflows/repo-lockdown.yml
@@ -1,25 +0,0 @@
-name: 'Repo Lockdown'
-
-on:
-  pull_request_target:
-    types: opened
-
-permissions:
-  pull-requests: write
-
-jobs:
-  action:
-    if: github.repository == 'buildroot/buildroot'
-    runs-on: ubuntu-latest
-    steps:
-      - uses: dessant/repo-lockdown@v4
-        with:
-          pr-comment: |
-            Please do not submit a Pull Request via GitHub. Buildroot makes use of a
-            [mailing list](http://lists.buildroot.org/mailman/listinfo/buildroot) for patch submission and review.
-            See [submitting your own patches](http://buildroot.org/manual.html#submitting-patches) for more info.
-
-            Thanks for your help!
-          lock-pr: true
-          close-pr: true
-
--- a/.gitignore
+++ b/.gitignore
@@ -1,4 +1,4 @@
-/output*
+/output
 /dl
 /.auto.deps
 /.config.cmd
@@ -13,4 +13,3 @@
 *.rej
 *~
 *.pyc
-/br.log
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -1,7 +1,7 @@
 # Configuration for Gitlab-CI.
 # Builds appear on https://gitlab.com/buildroot.org/buildroot/pipelines

-image: $CI_REGISTRY/buildroot.org/buildroot/base:20250218.2110
+image: buildroot/base:20200814.2228

 stages:
  - generate-gitlab-ci
@@ -10,17 +10,9 @@ stages:
 generate-gitlab-ci-yml:
  stage: generate-gitlab-ci
  script: ./support/scripts/generate-gitlab-ci-yml support/misc/gitlab-ci.yml.in > generated-gitlab-ci.yml
-  retry:
-    max: 2
-    when:
-      - runner_system_failure
-      - stuck_or_timeout_failure
  artifacts:
-    when: always
    paths:
      - generated-gitlab-ci.yml
-      - br-test-pkg/*/.config
-      - br-test-pkg/*/missing.config

 buildroot-pipeline:
  stage: build
@@ -29,5 +21,3 @@ buildroot-pipeline:
      - artifact: generated-gitlab-ci.yml
        job: generate-gitlab-ci-yml
    strategy: depend
-  variables:
-    PARENT_PIPELINE_ID: $CI_PIPELINE_ID
--- a/.gitlab/issue_templates/default.md
+++ b/.gitlab/issue_templates/default.md
@@ -1,60 +0,0 @@
-Thank you for opening a new issue. To help solve it faster and more easily,
-please review this check-list, and fill in the sections below. Adapt as
-needed.
-
-Do not open an issue to request a new feature; instead, post a message to
-[the mailing list](https://lists.buildroot.org/mailman/listinfo/buildroot).
-
-_Note: issues missing any information may get closed without further ado._
-
---
-### Check-list
-
- [ ] I did not find the issue in the existing issues
- [ ] I can reproduce the issue with unmodified Buildroot from [this
-      repository](https://gitlab.com/buildroot.org/buildroot), not from a
-      fork somewhere else
- [ ] I can reproduce the issue on the latest commit of the branch I'm using:
-    - [ ] master
-    - [ ] stable (i.e. 20NN.MM.x - please specify)
-    - [ ] LTS (i.e. 20NN.02.x - please specify)
- [ ] I can reproduce the issue after running `make clean; make`
- [ ] I attached the full build log file (e.g. `make 2>&1 |tee build.log`)
- [ ] I attached a **minimal** defconfig file that can reproduce the
-      issue (`make BR2_DEFCONFIG=$(pwd)/issue_defconfig savedefconfig`)
- [ ] I also attached the configuration for kconfig-based packages that
-      are enabled (and necessary to reproduce the issue), most notably:
-    - [ ] busybox
-    - [ ] linux
-    - [ ] uclibc
-    - [ ] uboot
-    - [ ] …
-
---
-### What I did
-
- **Buildroot commit sha1**: _get this with `git describe HEAD`_
- **Distribution of the build machine**: _get this with `NAME` and `VERSION` from `/etc/os-release`_
-
-_Here, describe what you did:_
- _any special environment variables: CC, CXX, TARGET, CROSS_COMPILE, etc…_
- _the commands you ran:_
-    ```sh
-    $ make [...]
-    ```
- _anything else that you might think is important…_
-
---
-### What happens
-
-_Here, describe what happens that you believe was incorrect._
-
---
-### What was expected
-
-_Here, describe the behaviour you expected._
-
---
-### Extra information
-
-_Here, you may write additional information that does not fit above_
--- a/6262
+++ b/6262
--- a/Config.in
+++ b/Config.in
@@ -6,15 +6,6 @@ config BR2_HAVE_DOT_CONFIG
 	bool
 	default y

-# Hidden symbol kept to false, to temporarily mark a configuration
-# known to be broken (by depending on it). Ideally, we don't want to
-# keep broken parts for too long. The intended use of this symbol is
-# to give some time to a developer to fix the feature. Features marked
-# as broken will be removed if they are not fixed in a reasonable
-# amount of time.
-config BR2_BROKEN
-	bool
-
 config BR2_VERSION
 	string
 	option env="BR2_VERSION_FULL"
@@ -64,36 +55,6 @@ config BR2_HOST_GCC_AT_LEAST_9
 	default y if BR2_HOST_GCC_VERSION = "9"
 	select BR2_HOST_GCC_AT_LEAST_8

-config BR2_HOST_GCC_AT_LEAST_10
-	bool
-	default y if BR2_HOST_GCC_VERSION = "10"
-	select BR2_HOST_GCC_AT_LEAST_9
-
-config BR2_HOST_GCC_AT_LEAST_11
-	bool
-	default y if BR2_HOST_GCC_VERSION = "11"
-	select BR2_HOST_GCC_AT_LEAST_10
-
-config BR2_HOST_GCC_AT_LEAST_12
-	bool
-	default y if BR2_HOST_GCC_VERSION = "12"
-	select BR2_HOST_GCC_AT_LEAST_11
-
-config BR2_HOST_GCC_AT_LEAST_13
-	bool
-	default y if BR2_HOST_GCC_VERSION = "13"
-	select BR2_HOST_GCC_AT_LEAST_12
-
-config BR2_HOST_GCC_AT_LEAST_14
-	bool
-	default y if BR2_HOST_GCC_VERSION = "14"
-	select BR2_HOST_GCC_AT_LEAST_13
-
-config BR2_HOST_GCC_AT_LEAST_15
-	bool
-	default y if BR2_HOST_GCC_VERSION = "15"
-	select BR2_HOST_GCC_AT_LEAST_14
-
 # When adding new entries above, be sure to update
 # the HOSTCC_MAX_VERSION variable in the Makefile.

@@ -104,7 +65,7 @@ config BR2_NEEDS_HOST_JAVA

 # Hidden boolean selected by pre-built packages for x86, when they
 # need to run on x86-64 machines (example: pre-built external
-# toolchains, binary tools, etc.).
+# toolchains, binary tools like SAM-BA, etc.).
 config BR2_HOSTARCH_NEEDS_IA32_LIBS
 	bool

@@ -126,23 +87,17 @@ config BR2_NEEDS_HOST_GCC_PLUGIN_SUPPORT

 source "arch/Config.in"

-source "toolchain/Config.in"
-
 menu "Build options"

 menu "Commands"

-config BR2_CURL
-	string "Curl command"
-	default "curl -q --ftp-pasv --retry 3 --connect-timeout 10"
-
 config BR2_WGET
 	string "Wget command"
-	default "wget -nd -t 3 --connect-timeout=10"
+	default "wget --passive-ftp -nd -t 3"

 config BR2_SVN
 	string "Subversion (svn) command"
-	default "svn --non-interactive --config-option servers:global:http-timeout=10"
+	default "svn --non-interactive"

 config BR2_BZR
 	string "Bazaar (bzr) command"
@@ -162,11 +117,7 @@ config BR2_LOCALFILES

 config BR2_SCP
 	string "Secure copy (scp) command"
-	default "scp -o ConnectTimeout=10"
-
-config BR2_SFTP
-	string "Secure file transfer (sftp) command"
-	default "sftp -o ConnectTimeout=10"
+	default "scp"

 config BR2_HG
 	string "Mercurial (hg) command"
@@ -206,13 +157,6 @@ config BR2_LZCAT
 	  Command to be used to extract a lzip'ed file to stdout.
 	  Default is "lzip -d -c"

-config BR2_ZSTDCAT
-	string "zstdcat command"
-	default "zstdcat"
-	help
-	  Command to be used to extract a zstd'ed file to stdout.
-	  Default is "zstdcat"
-
 config BR2_TAR_OPTIONS
 	string "Tar options"
 	default ""
@@ -291,7 +235,7 @@ if !BR2_PRIMARY_SITE_ONLY

 config BR2_BACKUP_SITE
 	string "Backup download site"
-	default "https://sources.buildroot.net"
+	default "http://sources.buildroot.net"
 	help
 	  Backup site to download from. If this option is set then
 	  buildroot will fall back to download package sources from here
@@ -314,7 +258,7 @@ config BR2_KERNEL_MIRROR

 config BR2_GNU_MIRROR
 	string "GNU Software mirror"
-	default "https://ftpmirror.gnu.org"
+	default "http://ftpmirror.gnu.org"
 	help
 	  GNU has multiple software mirrors scattered around the
 	  world. The following allows you to select your preferred
@@ -337,15 +281,14 @@ config BR2_LUAROCKS_MIRROR

 config BR2_CPAN_MIRROR
 	string "CPAN mirror (Perl packages)"
-	default "https://cpan.metacpan.org"
+	default "http://cpan.metacpan.org"
 	help
 	  CPAN (Comprehensive Perl Archive Network) is a repository of
 	  Perl packages. It has multiple software mirrors scattered
 	  around the world. This option allows you to select a mirror.

 	  The list of mirrors is available at:
-	  http://mirrors.cpan.org/          (tabular)
-	  http://mirrors.cpan.org/map.html  (clickable world map)
+	  http://search.cpan.org/mirror

 endif

@@ -358,12 +301,8 @@ config BR2_JLEVEL
 	  Number of jobs to run simultaneously. If 0, determine
 	  automatically according to number of CPUs on the host system.

-comment "ccache needs a host gcc >= 8"
-	depends on !BR2_HOST_GCC_AT_LEAST_8
-
 config BR2_CCACHE
 	bool "Enable compiler cache"
-	depends on BR2_HOST_GCC_AT_LEAST_8
 	help
 	  This option will enable the use of ccache, a compiler cache.
 	  It will cache the result of previous builds to speed up future
@@ -473,23 +412,10 @@ config BR2_DEBUG_3
 endchoice
 endif

-config BR2_ENABLE_RUNTIME_DEBUG
-	bool "build packages with runtime debugging info"
-	help
-	  Some packages may have runtime assertions, extra traces, and
-	  similar runtime elements that can help debugging. However,
-	  these elements may negatively influence performance so should
-	  normally not be enabled on production systems.
-
-	  Enable this option to enable such runtime debugging.
-
-	  Note: disabling this option is not a guarantee that all
-	  packages effectively removed these runtime debugging elements.
-
 config BR2_STRIP_strip
 	bool "strip target binaries"
 	default y
-	depends on BR2_BINFMT_ELF
+	depends on !BR2_PACKAGE_HOST_ELF2FLT
 	help
 	  Binaries and libraries in the target filesystem will be
 	  stripped using the normal 'strip' command. This allows to save
@@ -518,7 +444,7 @@ config BR2_STRIP_EXCLUDE_DIRS

 choice
 	prompt "gcc optimization level"
-	default BR2_OPTIMIZE_2
+	default BR2_OPTIMIZE_S
 	help
 	  Set the optimization level for gcc

@@ -564,7 +490,6 @@ config BR2_OPTIMIZE_2
 	  -falign-loops -falign-labels -ftree-vrp -ftree-pre. Please
 	  note the warning under -fgcse about invoking -O2 on programs
 	  that use computed gotos.
-	  This is the default.

 config BR2_OPTIMIZE_3
 	bool "optimization level 3"
@@ -593,6 +518,7 @@ config BR2_OPTIMIZE_S
 	  -falign-loops -falign-labels -freorder-blocks
 	  -freorder-blocks-and-partition -fprefetch-loop-arrays
 	  -ftree-vect-loop-version
+	  This is the default.

 config BR2_OPTIMIZE_FAST
 	bool "optimize for fast (may break packages!)"
@@ -608,32 +534,13 @@ config BR2_OPTIMIZE_FAST

 endchoice

-config BR2_ENABLE_LTO
-	bool "build packages with link-time optimisation"
-	help
-	  Enable the link-time optimisation (LTO) option when building
-	  packages. Link-time optimisation re-runs optimisations at
-	  link time, which allows the compiler to do interprocedural
-	  analysis across compilation units and thus come with better
-	  results: smaller size and better performance.
-
-	  Note that this analysis is limited to statically linked
-	  object files and libraries.
-
-	  This option may significantly increase build times,
-	  sometimes 5 times longer, with only limited gains.
-
-	  At this time, this option only enables LTO in packages that
-	  have an explicit configuration option for it. Other packages
-	  always enable LTO, but most packages never enable LTO.
-
 config BR2_GOOGLE_BREAKPAD_ENABLE
 	bool "Enable google-breakpad support"
 	depends on BR2_INSTALL_LIBSTDCPP
-	depends on BR2_TOOLCHAIN_GCC_AT_LEAST_7 # C++17
+	depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_8 # C++11
 	depends on BR2_USE_WCHAR
 	depends on BR2_TOOLCHAIN_HAS_THREADS
-	depends on BR2_TOOLCHAIN_USES_GLIBC
+	depends on (BR2_TOOLCHAIN_USES_GLIBC || BR2_TOOLCHAIN_USES_UCLIBC)
 	depends on BR2_PACKAGE_GOOGLE_BREAKPAD_ARCH_SUPPORTS
 	depends on BR2_PACKAGE_HOST_GOOGLE_BREAKPAD_ARCH_SUPPORTS
 	select BR2_PACKAGE_GOOGLE_BREAKPAD
@@ -677,7 +584,6 @@ choice

 config BR2_STATIC_LIBS
 	bool "static only"
-	depends on !BR2_TOOLCHAIN_USES_GLIBC
 	help
 	  Build and use only static libraries. No shared libraries will
 	  be installed on the target. This potentially increases your
@@ -686,9 +592,6 @@ config BR2_STATIC_LIBS
 	  option is enabled, due to their need for dynamic library
 	  support.

-comment "static only needs a toolchain w/ uclibc or musl"
-	depends on BR2_TOOLCHAIN_USES_GLIBC
-
 config BR2_SHARED_LIBS
 	bool "shared only"
 	depends on BR2_BINFMT_SUPPORTS_SHARED
@@ -718,12 +621,12 @@ config BR2_PACKAGE_OVERRIDE_FILE
 	  documentation for more details on this feature.

 config BR2_GLOBAL_PATCH_DIR
-	string "global patch and hash directories"
+	string "global patch directories"
 	help
 	  You may specify a space separated list of one or more
-	  directories containing global package patches and/or hashes.
-	  For a specific version <packageversion> of a specific package
-	  <packagename>, patches are looked up as follows:
+	  directories containing global package patches. For a specific
+	  version <packageversion> of a specific package <packagename>,
+	  patches are applied as follows:

 	  First, the default Buildroot patch set for the package is
 	  applied from the package's directory in Buildroot.
@@ -737,10 +640,26 @@ config BR2_GLOBAL_PATCH_DIR
 	  exists, then all *.patch files in the directory will be
 	  applied.

-	  The hash files are looked up similarly to the patches.
-
 menu "Advanced"

+config BR2_COMPILER_PARANOID_UNSAFE_PATH
+	bool "paranoid check of library/header paths"
+	default y
+	help
+	  By default, when this option is disabled, when the Buildroot
+	  cross-compiler will encounter an unsafe library or header path
+	  (such as /usr/include, or /usr/lib), the compiler will display
+	  a warning.
+
+	  By enabling this option, this warning is turned into an error,
+	  which will completely abort the build when such unsafe paths
+	  are encountered.
+
+	  Note that this mechanism is available for both the internal
+	  toolchain (through the toolchain wrapper and binutils patches)
+	  and external toolchain backends (through the toolchain
+	  wrapper).
+
 config BR2_FORCE_HOST_BUILD
 	bool "Force the building of host dependencies"
 	help
@@ -753,21 +672,6 @@ config BR2_FORCE_HOST_BUILD

 	  This option will increase build time.

-config BR2_DOWNLOAD_FORCE_CHECK_HASHES
-	bool "Force all downloads to have a valid hash"
-	help
-	  Say 'y' here to enforce downloads to have at least one valid
-	  hash (and of course, that all hashes be valid).
-
-	  By default, Buildroot checks hashes of all packages
-	  downloaded, except those for which a custom version is
-	  used.
-
-	  With this option turned on, Buildroot will check hashes of
-	  all packages, including those that use a custom version. In
-	  order to provide hashes for such packages, place additional
-	  hash files in BR2_GLOBAL_PATCH_DIR directories.
-
 config BR2_REPRODUCIBLE
 	bool "Make the build reproducible (experimental)"
 	# SOURCE_DATE_EPOCH support in toolchain-wrapper requires GCC 4.4
@@ -807,32 +711,10 @@ config BR2_PER_PACKAGE_DIRECTORIES

 endmenu

-config BR2_TIME_BITS_64
-	bool "Build Y2038-ready code"
-	depends on BR2_TOOLCHAIN_USES_GLIBC && !BR2_ARCH_IS_64
-	help
-	  This option will pass -D_TIME_BITS=64 in the compiler flags
-	  to ensure the glibc C library uses a 64-bit representation
-	  for time_t and other time types, which ensures that
-	  programs/libraries will correctly handle time past year
-	  2038.
-
-	  This option only has an effect with glibc >= 2.34, as
-	  earlier glibc versions did not have support for 64-bit
-	  time_t.
-
 comment "Security Hardening Options"

-config BR2_PIC_PIE_ARCH_SUPPORTS
-	bool
-	default y
-	# Microblaze glibc toolchains don't work with PIC/PIE enabled
-	depends on !BR2_microblaze
-
 config BR2_PIC_PIE
 	bool "Build code with PIC/PIE"
-	default y
-	depends on BR2_PIC_PIE_ARCH_SUPPORTS
 	depends on BR2_SHARED_LIBS
 	depends on BR2_TOOLCHAIN_SUPPORTS_PIE
 	help
@@ -840,15 +722,12 @@ config BR2_PIC_PIE
 	  Position-Independent Executables (PIE).

 comment "PIC/PIE needs a toolchain w/ PIE"
-	depends on BR2_PIC_PIE_ARCH_SUPPORTS
 	depends on BR2_SHARED_LIBS
 	depends on !BR2_TOOLCHAIN_SUPPORTS_PIE

 choice
 	bool "Stack Smashing Protection"
 	default BR2_SSP_ALL if BR2_ENABLE_SSP # legacy
-	default BR2_SSP_STRONG if BR2_TOOLCHAIN_HAS_SSP_STRONG
-	default BR2_SSP_REGULAR
 	depends on BR2_TOOLCHAIN_HAS_SSP
 	help
 	  Enable stack smashing protection support using GCC's
@@ -910,8 +789,6 @@ comment "Stack Smashing Protection needs a toolchain w/ SSP"

 choice
 	bool "RELRO Protection"
-	default BR2_RELRO_FULL if BR2_TOOLCHAIN_SUPPORTS_PIE
-	default BR2_RELRO_PARTIAL
 	depends on BR2_SHARED_LIBS
 	help
 	  Enable a link-time protection know as RELRO (RELocation Read
@@ -931,7 +808,6 @@ config BR2_RELRO_PARTIAL

 config BR2_RELRO_FULL
 	bool "Full"
-	depends on BR2_PIC_PIE_ARCH_SUPPORTS
 	depends on BR2_TOOLCHAIN_SUPPORTS_PIE
 	select BR2_PIC_PIE
 	help
@@ -940,7 +816,6 @@ config BR2_RELRO_FULL
 	  program loading, i.e every time an executable is started.

 comment "RELRO Full needs a toolchain w/ PIE"
-	depends on BR2_PIC_PIE_ARCH_SUPPORTS
 	depends on !BR2_TOOLCHAIN_SUPPORTS_PIE

 endchoice
@@ -948,16 +823,8 @@ endchoice
 comment "RELocation Read Only (RELRO) needs shared libraries"
 	depends on !BR2_SHARED_LIBS

-config BR2_FORTIFY_SOURCE_ARCH_SUPPORTS
-	bool
-	default y
-	# Microblaze glibc toolchains don't work with Fortify Source enabled
-	depends on !BR2_microblaze
-
 choice
 	bool "Buffer-overflow Detection (FORTIFY_SOURCE)"
-	default BR2_FORTIFY_SOURCE_1
-	depends on BR2_FORTIFY_SOURCE_ARCH_SUPPORTS
 	depends on BR2_TOOLCHAIN_USES_GLIBC
 	depends on !BR2_OPTIMIZE_0
 	help
@@ -990,27 +857,19 @@ config BR2_FORTIFY_SOURCE_2
 	# gcc bug https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61164
 	depends on !BR2_TOOLCHAIN_BUILDROOT || BR2_TOOLCHAIN_GCC_AT_LEAST_6
 	help
-	  This option sets _FORTIFY_SOURCE to 2 and some more
+	  This option sets _FORTIFY_SOURCES to 2 and some more
 	  checking is added, but some conforming programs might fail.
 	  Also adds checks at run-time (detected buffer overflow
 	  terminates the program)

-config BR2_FORTIFY_SOURCE_3
-	bool "Extended"
-	depends on BR2_TOOLCHAIN_GCC_AT_LEAST_12
-	help
-	  This option sets _FORTIFY_SOURCE to 3 and even more
-	  checking is added compared to level 2. Extends checks at
-	  run-time that can introduce an additional performance
-	  overhead.
-
 endchoice

 comment "Fortify Source needs a glibc toolchain and optimization"
-	depends on BR2_FORTIFY_SOURCE_ARCH_SUPPORTS
 	depends on (!BR2_TOOLCHAIN_USES_GLIBC || BR2_OPTIMIZE_0)
 endmenu

+source "toolchain/Config.in"
+
 source "system/Config.in"

 source "linux/Config.in"
--- a/Config.in.legacy
+++ b/Config.in.legacy
--- a/2262
+++ b/2262
--- a/308
+++ b/308
@@ -1,6 +1,8 @@
 # Makefile for buildroot
 #
-# Copyright (C) the Buildroot developers <buildroot@buildroot.org>
+# Copyright (C) 1999-2005 by Erik Andersen <andersen@codepoet.org>
+# Copyright (C) 2006-2014 by the Buildroot developers <buildroot@uclibc.org>
+# Copyright (C) 2014-2020 by the Buildroot developers <buildroot@buildroot.org>
 #
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
@@ -66,14 +68,13 @@ endif
 CANONICAL_CURDIR = $(realpath $(CURDIR))

 REQ_UMASK = 0022
-CUR_UMASK := $(shell umask)

 # Make sure O= is passed (with its absolute canonical path) everywhere the
 # toplevel makefile is called back.
 EXTRAMAKEARGS := O=$(CANONICAL_O)

 # Check Buildroot execution pre-requisites here.
-ifneq ($(CUR_UMASK):$(CURDIR):$(O),$(REQ_UMASK):$(CANONICAL_CURDIR):$(CANONICAL_O))
+ifneq ($(shell umask):$(CURDIR):$(O),$(REQ_UMASK):$(CANONICAL_CURDIR):$(CANONICAL_O))
 .PHONY: _all $(MAKECMDGOALS)

 $(MAKECMDGOALS): _all
@@ -82,7 +83,6 @@ $(MAKECMDGOALS): _all
 _all:
 	@umask $(REQ_UMASK) && \
 		$(MAKE) -C $(CANONICAL_CURDIR) --no-print-directory \
-			BR_ORIG_UMASK=$(CUR_UMASK) \
 			$(MAKECMDGOALS) $(EXTRAMAKEARGS)

 else # umask / $(CURDIR) / $(O)
@@ -92,9 +92,9 @@ all:
 .PHONY: all

 # Set and export the version string
-export BR2_VERSION := 2026.05-git
+export BR2_VERSION := 2021.02.1
 # Actual time the release is cut (for reproducible builds)
-BR2_VERSION_EPOCH = 1772611600
+BR2_VERSION_EPOCH = 1617790000

 # Save running make version since it's clobbered by the make package
 RUNNING_MAKE_VERSION := $(MAKE_VERSION)
@@ -125,8 +125,7 @@ endif
 noconfig_targets := menuconfig nconfig gconfig xconfig config oldconfig randconfig \
 	defconfig %_defconfig allyesconfig allnoconfig alldefconfig syncconfig release \
 	randpackageconfig allyespackageconfig allnopackageconfig \
-	print-version olddefconfig distclean manual manual-% check-package \
-	check-package-external
+	print-version olddefconfig distclean manual manual-% check-package check-flake8

 # Some global targets do not trigger a build, but are used to collect
 # metadata, or do various checks. When such targets are triggered,
@@ -142,7 +141,7 @@ nobuild_targets := source %-source \
 	clean distclean help show-targets graph-depends \
 	%-graph-depends %-show-depends %-show-version \
 	graph-build graph-size list-defconfigs \
-	savedefconfig update-defconfig printvars show-vars
+	savedefconfig update-defconfig printvars
 ifeq ($(MAKECMDGOALS),)
 BR_BUILDING = y
 else ifneq ($(filter-out $(nobuild_targets),$(MAKECMDGOALS)),)
@@ -285,16 +284,12 @@ ifndef HOSTCC
 HOSTCC := gcc
 HOSTCC := $(shell which $(HOSTCC) || type -p $(HOSTCC) || echo gcc)
 endif
-ifndef HOSTCC_NOCCACHE
 HOSTCC_NOCCACHE := $(HOSTCC)
-endif
 ifndef HOSTCXX
 HOSTCXX := g++
 HOSTCXX := $(shell which $(HOSTCXX) || type -p $(HOSTCXX) || echo g++)
 endif
-ifndef HOSTCXX_NOCCACHE
 HOSTCXX_NOCCACHE := $(HOSTCXX)
-endif
 ifndef HOSTCPP
 HOSTCPP := cpp
 endif
@@ -354,7 +349,7 @@ export HOSTARCH := $(shell LC_ALL=C $(HOSTCC_NOCCACHE) -v 2>&1 | \

 # When adding a new host gcc version in Config.in,
 # update the HOSTCC_MAX_VERSION variable:
-HOSTCC_MAX_VERSION := 15
+HOSTCC_MAX_VERSION := 9

 HOSTCC_VERSION := $(shell V=$$($(HOSTCC_NOCCACHE) --version | \
 	sed -n -r 's/^.* ([0-9]*)\.([0-9]*)\.([0-9]*)[ ]*.*/\1 \2/p'); \
@@ -395,9 +390,6 @@ unexport DESTDIR
 # Causes breakage with packages that needs host-ruby
 unexport RUBYOPT

-# Compilation of perl-related packages will fail otherwise
-unexport PERL_MM_OPT
-
 include package/pkg-utils.mk
 include package/doc-asciidoc.mk

@@ -408,28 +400,26 @@ ifeq ($(BR2_HAVE_DOT_CONFIG),y)
 # Hide troublesome environment variables from sub processes
 #
 ################################################################################
-unexport AR
+unexport CROSS_COMPILE
 unexport ARCH
 unexport CC
-unexport CFLAGS
-unexport CONFIG_SITE
-unexport CPP
-unexport CROSS_COMPILE
-unexport CXX
-unexport CXXFLAGS
-unexport DEVICE_TREE
-unexport GCC_COLORS
-unexport GREP_OPTIONS
 unexport LD
+unexport AR
+unexport CXX
+unexport CPP
+unexport RANLIB
+unexport CFLAGS
+unexport CXXFLAGS
+unexport GREP_OPTIONS
+unexport TAR_OPTIONS
+unexport CONFIG_SITE
+unexport QMAKESPEC
+unexport TERMINFO
 unexport MACHINE
 unexport O
-unexport OS
+unexport GCC_COLORS
 unexport PLATFORM
-unexport QMAKESPEC
-unexport RANLIB
-unexport TAR_OPTIONS
-unexport TERMINFO
-unexport TOPDIR
+unexport OS

 GNU_HOST_NAME := $(shell support/gnuconfig/config.guess)

@@ -441,14 +431,27 @@ QUIET := $(if $(findstring s,$(filter-out --%,$(MAKEFLAGS))),-q)

 # Strip off the annoying quoting
 ARCH := $(call qstrip,$(BR2_ARCH))
-NORMALIZED_ARCH := $(call qstrip,$(BR2_NORMALIZED_ARCH))
-KERNEL_ARCH := $(call qstrip,$(BR2_NORMALIZED_ARCH))
+
+KERNEL_ARCH := $(shell echo "$(ARCH)" | sed -e "s/-.*//" \
+	-e s/i.86/i386/ -e s/sun4u/sparc64/ \
+	-e s/arcle/arc/ \
+	-e s/arceb/arc/ \
+	-e s/arm.*/arm/ -e s/sa110/arm/ \
+	-e s/aarch64.*/arm64/ \
+	-e s/nds32.*/nds32/ \
+	-e s/or1k/openrisc/ \
+	-e s/parisc64/parisc/ \
+	-e s/powerpc64.*/powerpc/ \
+	-e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
+	-e s/riscv.*/riscv/ \
+	-e s/sh.*/sh/ \
+	-e s/s390x/s390/ \
+	-e s/microblazeel/microblaze/)

 ZCAT := $(call qstrip,$(BR2_ZCAT))
 BZCAT := $(call qstrip,$(BR2_BZCAT))
 XZCAT := $(call qstrip,$(BR2_XZCAT))
 LZCAT := $(call qstrip,$(BR2_LZCAT))
-ZSTDCAT := $(call qstrip,$(BR2_ZSTDCAT))
 TAR_OPTIONS = $(call qstrip,$(BR2_TAR_OPTIONS)) -xf

 ifeq ($(BR2_PER_PACKAGE_DIRECTORIES),y)
@@ -482,7 +485,8 @@ BR_CACHE_DIR ?= $(call qstrip,$(BR2_CCACHE_DIR))
 export BR_CACHE_DIR
 HOSTCC = $(CCACHE) $(HOSTCC_NOCCACHE)
 HOSTCXX = $(CCACHE) $(HOSTCXX_NOCCACHE)
-export BR2_USE_CCACHE ?= 1
+else
+export BR_NO_CCACHE
 endif

 # Scripts in support/ or post-build scripts may need to reference
@@ -568,12 +572,14 @@ ifeq ($(BR_FORCE_CHECK_DEPENDENCIES),YES)

 define CHECK_ONE_DEPENDENCY
 ifeq ($$($(2)_TYPE),target)
+ifeq ($$($(2)_IS_VIRTUAL),)
 ifneq ($$($$($(2)_KCONFIG_VAR)),y)
 $$(error $$($(2)_NAME) is in the dependency chain of $$($(1)_NAME) that \
 has added it to its _DEPENDENCIES variable without selecting it or \
 depending on it from Config.in)
 endif
 endif
+endif
 endef

 $(foreach pkg,$(call UPPERCASE,$(PACKAGES)),\
@@ -587,31 +593,17 @@ $(BUILD_DIR)/buildroot-config/auto.conf: $(BR2_CONFIG)

 .PHONY: prepare
 prepare: $(BUILD_DIR)/buildroot-config/auto.conf
-	@$(foreach s, $(call qstrip,$(BR2_ROOTFS_PRE_BUILD_SCRIPT)), \
-		$(call MESSAGE,"Executing pre-build script $(s)"); \
-		$(EXTRA_ENV) $(s) \
-			$(TARGET_DIR) \
-			$(call qstrip,$(BR2_ROOTFS_POST_SCRIPT_ARGS)) \
-			$(call qstrip,$(BR2_ROOTFS_PRE_BUILD_SCRIPT_ARGS))$(sep))

 .PHONY: world
 world: target-post-image

 .PHONY: prepare-sdk
 prepare-sdk: world
-	@$(call MESSAGE,"Preparing the SDK")
+	@$(call MESSAGE,"Rendering the SDK relocatable")
+	PER_PACKAGE_DIR=$(PER_PACKAGE_DIR) $(TOPDIR)/support/scripts/fix-rpath host
+	PER_PACKAGE_DIR=$(PER_PACKAGE_DIR) $(TOPDIR)/support/scripts/fix-rpath staging
 	$(INSTALL) -m 755 $(TOPDIR)/support/misc/relocate-sdk.sh $(HOST_DIR)/relocate-sdk.sh
 	mkdir -p $(HOST_DIR)/share/buildroot
-	(\
-		export LC_ALL=C; \
-		grep -lr '$(HOST_DIR)' '$(HOST_DIR)' | while read -r FILE; do \
-			if file -b --mime-type "$$FILE" | grep -q '^text/' && \
-			   [ "$$FILE" != '$(HOST_DIR)/share/buildroot/sdk-location' ] && \
-			   [ "$$FILE" != '$(HOST_DIR)/share/buildroot/sdk-relocs' ]; then \
-				echo "$$FILE"; \
-			fi; \
-		done \
-	) | sed -e 's|^$(HOST_DIR)|.|g' > $(HOST_DIR)/share/buildroot/sdk-relocs
 	echo $(HOST_DIR) > $(HOST_DIR)/share/buildroot/sdk-location

 BR2_SDK_PREFIX ?= $(GNU_TARGET_NAME)_sdk-buildroot
@@ -661,17 +653,40 @@ STRIP_FIND_SPECIAL_LIBS_CMD = \
 	\( -name 'ld-*.so*' -o -name 'libpthread*.so*' \) \
 	-print0

-# Generate locale data.
+ifeq ($(BR2_ECLIPSE_REGISTER),y)
+define TOOLCHAIN_ECLIPSE_REGISTER
+	./support/scripts/eclipse-register-toolchain `readlink -f $(O)` \
+		$(notdir $(TARGET_CROSS)) $(BR2_ARCH)
+endef
+TARGET_FINALIZE_HOOKS += TOOLCHAIN_ECLIPSE_REGISTER
+endif
+
+# Generate locale data. Basically, we call the localedef program
+# (built by the host-localedef package) for each locale. The input
+# data comes preferably from the toolchain, or if the toolchain does
+# not have them (Linaro toolchains), we use the ones available on the
+# host machine.
 ifeq ($(BR2_TOOLCHAIN_USES_GLIBC),y)
 GLIBC_GENERATE_LOCALES = $(call qstrip,$(BR2_GENERATE_LOCALE))
 ifneq ($(GLIBC_GENERATE_LOCALES),)
 PACKAGES += host-localedef

 define GENERATE_GLIBC_LOCALES
-	+$(MAKE) -f support/misc/gen-glibc-locales.mk \
-		ENDIAN=$(call LOWERCASE,$(BR2_ENDIAN)) \
-		LOCALES="$(GLIBC_GENERATE_LOCALES)" \
-		Q=$(Q)
+	$(Q)mkdir -p $(TARGET_DIR)/usr/lib/locale/
+	$(Q)for locale in $(GLIBC_GENERATE_LOCALES) ; do \
+		inputfile=`echo $${locale} | cut -f1 -d'.'` ; \
+		charmap=`echo $${locale} | cut -f2 -d'.' -s` ; \
+		if test -z "$${charmap}" ; then \
+			charmap="UTF-8" ; \
+		fi ; \
+		echo "Generating locale $${inputfile}.$${charmap}" ; \
+		I18NPATH=$(STAGING_DIR)/usr/share/i18n:/usr/share/i18n \
+		$(HOST_DIR)/bin/localedef \
+			--prefix=$(TARGET_DIR) \
+			--$(call LOWERCASE,$(BR2_ENDIAN))-endian \
+			-i $${inputfile} -f $${charmap} \
+			$${locale} ; \
+	done
 endef
 TARGET_FINALIZE_HOOKS += GENERATE_GLIBC_LOCALES
 endif
@@ -726,14 +741,7 @@ STAGING_DIR_FILES_LISTS = $(sort $(wildcard $(BUILD_DIR)/*/.files-list-staging.t
 .PHONY: host-finalize
 host-finalize: $(PACKAGES) $(HOST_DIR) $(HOST_DIR_SYMLINK)
 	@$(call MESSAGE,"Finalizing host directory")
-	$(call per-package-rsync,$(sort $(PACKAGES)),host,$(HOST_DIR),copy)
-	$(Q)PARALLEL_JOBS=$(PARALLEL_JOBS) \
-		PER_PACKAGE_DIR=$(PER_PACKAGE_DIR) \
-		$(TOPDIR)/support/scripts/fix-rpath host
-	$(Q)PARALLEL_JOBS=$(PARALLEL_JOBS) \
-		PER_PACKAGE_DIR=$(PER_PACKAGE_DIR) \
-		$(TOPDIR)/support/scripts/fix-rpath staging
-	$(call ppd-fixup-paths,$(BASE_DIR))
+	$(call per-package-rsync,$(sort $(PACKAGES)),host,$(HOST_DIR))

 .PHONY: staging-finalize
 staging-finalize: $(STAGING_DIR_SYMLINK)
@@ -741,12 +749,12 @@ staging-finalize: $(STAGING_DIR_SYMLINK)
 .PHONY: target-finalize
 target-finalize: $(PACKAGES) $(TARGET_DIR) host-finalize
 	@$(call MESSAGE,"Finalizing target directory")
-	$(call per-package-rsync,$(sort $(PACKAGES)),target,$(TARGET_DIR),copy)
+	$(call per-package-rsync,$(sort $(PACKAGES)),target,$(TARGET_DIR))
 	$(foreach hook,$(TARGET_FINALIZE_HOOKS),$($(hook))$(sep))
 	rm -rf $(TARGET_DIR)/usr/include $(TARGET_DIR)/usr/share/aclocal \
 		$(TARGET_DIR)/usr/lib/pkgconfig $(TARGET_DIR)/usr/share/pkgconfig \
 		$(TARGET_DIR)/usr/lib/cmake $(TARGET_DIR)/usr/share/cmake \
-		$(TARGET_DIR)/usr/lib/rpm $(TARGET_DIR)/usr/doc
+		$(TARGET_DIR)/usr/doc
 	find $(TARGET_DIR)/usr/{lib,share}/ -name '*.cmake' -print0 | xargs -0 rm -f
 	find $(TARGET_DIR)/lib/ $(TARGET_DIR)/usr/lib/ $(TARGET_DIR)/usr/libexec/ \
 		\( -name '*.a' -o -name '*.la' -o -name '*.prl' \) -print0 | xargs -0 rm -f
@@ -786,18 +794,23 @@ endif
 	ln -sf ../usr/lib/os-release $(TARGET_DIR)/etc

 	@$(call MESSAGE,"Sanitizing RPATH in target tree")
-	PARALLEL_JOBS=$(PARALLEL_JOBS) \
-		PER_PACKAGE_DIR=$(PER_PACKAGE_DIR) \
-		$(TOPDIR)/support/scripts/fix-rpath target
+	PER_PACKAGE_DIR=$(PER_PACKAGE_DIR) $(TOPDIR)/support/scripts/fix-rpath target

 # For a merged /usr, ensure that /lib, /bin and /sbin and their /usr
 # counterparts are appropriately setup as symlinks ones to the others.
-	@$(call MESSAGE,"Sanity check in overlays $(call qstrip,$(BR2_ROOTFS_OVERLAY))")
-	support/scripts/check-merged \
-		-t overlay \
-		$(if $(BR2_ROOTFS_MERGED_USR),-u) \
-		$(if $(BR2_ROOTFS_MERGED_BIN),-b) \
-		$(call qstrip,$(BR2_ROOTFS_OVERLAY))
+ifeq ($(BR2_ROOTFS_MERGED_USR),y)
+
+	$(foreach d, $(call qstrip,$(BR2_ROOTFS_OVERLAY)), \
+		@$(call MESSAGE,"Sanity check in overlay $(d)")$(sep) \
+		$(Q)not_merged_dirs="$$(support/scripts/check-merged-usr.sh $(d))"; \
+		test -n "$$not_merged_dirs" && { \
+			echo "ERROR: The overlay in $(d) is not" \
+				"using a merged /usr for the following directories:" \
+				$$not_merged_dirs; \
+			exit 1; \
+		} || true$(sep))
+
+endif # merged /usr

 	$(foreach d, $(call qstrip,$(BR2_ROOTFS_OVERLAY)), \
 		@$(call MESSAGE,"Copying overlay $(d)")$(sep) \
@@ -812,31 +825,17 @@ endif

 	$(foreach s, $(call qstrip,$(BR2_ROOTFS_POST_BUILD_SCRIPT)), \
 		@$(call MESSAGE,"Executing post-build script $(s)")$(sep) \
-		$(Q)$(EXTRA_ENV) $(s) \
-			$(TARGET_DIR) \
-			$(call qstrip,$(BR2_ROOTFS_POST_SCRIPT_ARGS)) \
-			$(call qstrip,$(BR2_ROOTFS_POST_BUILD_SCRIPT_ARGS))$(sep))
+		$(Q)$(EXTRA_ENV) $(s) $(TARGET_DIR) $(call qstrip,$(BR2_ROOTFS_POST_SCRIPT_ARGS))$(sep))

 	touch $(TARGET_DIR)/usr

-# Note: this will run in the filesystem context, so will use a copy
-# of target/, not the real one, so the files are still available on
-# re-builds (foo-rebuild, etc...)
-define ROOTFS_RM_HWDB_DATA
-	rm -rf $(TARGET_DIR)/usr/lib/udev/hwdb.d/ $(TARGET_DIR)/etc/udev/hwdb.d/
-endef
-ROOTFS_PRE_CMD_HOOKS += ROOTFS_RM_HWDB_DATA
-
 .PHONY: target-post-image
 target-post-image: $(TARGETS_ROOTFS) target-finalize staging-finalize
 	@rm -f $(ROOTFS_COMMON_TAR)
 	$(Q)mkdir -p $(BINARIES_DIR)
 	@$(foreach s, $(call qstrip,$(BR2_ROOTFS_POST_IMAGE_SCRIPT)), \
 		$(call MESSAGE,"Executing post-image script $(s)"); \
-		$(EXTRA_ENV) $(s) \
-			$(BINARIES_DIR) \
-			$(call qstrip,$(BR2_ROOTFS_POST_SCRIPT_ARGS)) \
-			$(call qstrip,$(BR2_ROOTFS_POST_IMAGE_SCRIPT_ARGS))$(sep))
+		$(EXTRA_ENV) $(s) $(BINARIES_DIR) $(call qstrip,$(BR2_ROOTFS_POST_SCRIPT_ARGS))$(sep))

 .PHONY: source
 source: $(foreach p,$(PACKAGES),$(p)-all-source)
@@ -853,7 +852,7 @@ legal-info-clean:
 .PHONY: legal-info-prepare
 legal-info-prepare: $(LEGAL_INFO_DIR)
 	@$(call MESSAGE,"Buildroot $(BR2_VERSION_FULL) Collecting legal info")
-	@$(call legal-license-file,HOST,buildroot,buildroot,COPYING,COPYING,support/legal-info/buildroot.hash)
+	@$(call legal-license-file,buildroot,buildroot,support/legal-info/buildroot.hash,COPYING,COPYING,HOST)
 	@$(call legal-manifest,TARGET,PACKAGE,VERSION,LICENSE,LICENSE FILES,SOURCE ARCHIVE,SOURCE SITE,DEPENDENCIES WITH LICENSES)
 	@$(call legal-manifest,HOST,PACKAGE,VERSION,LICENSE,LICENSE FILES,SOURCE ARCHIVE,SOURCE SITE,DEPENDENCIES WITH LICENSES)
 	@$(call legal-manifest,HOST,buildroot,$(BR2_VERSION_FULL),GPL-2.0+,COPYING,not saved,not saved)
@@ -893,9 +892,6 @@ graph-build: $(O)/build/build-time.log
 				   --type=pie-$(t) --input=$(<) \
 				   --output=$(GRAPHS_DIR)/build.pie-$(t).$(BR_GRAPH_OUT) \
 				   $(if $(BR2_GRAPH_ALT),--alternate-colors)$(sep))
-	./support/scripts/graph-build-time --type=timeline --input=$(<) \
-		--output=$(GRAPHS_DIR)/build.timeline.$(BR_GRAPH_OUT) \
-		$(if $(BR2_GRAPH_ALT),--alternate-colors)

 .PHONY: graph-depends-requirements
 graph-depends-requirements:
@@ -1025,18 +1021,13 @@ oldconfig syncconfig olddefconfig: $(BUILD_DIR)/buildroot-config/conf outputmake
 defconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile
 	@$(COMMON_CONFIG_ENV) $< --defconfig$(if $(DEFCONFIG),=$(DEFCONFIG)) $(CONFIG_CONFIG_IN)

-%_defconfig: $(BUILD_DIR)/buildroot-config/conf  outputmakefile
-	@defconfig=$(or \
-		$(firstword \
-			$(foreach d, \
-				$(call reverse,$(TOPDIR) $(BR2_EXTERNAL_DIRS)), \
-				$(wildcard $(d)/configs/$@) \
-			) \
-		), \
-		$(error "Can't find $@") \
-	); \
-	$(COMMON_CONFIG_ENV) BR2_DEFCONFIG=$${defconfig} \
-		$< --defconfig=$${defconfig} $(CONFIG_CONFIG_IN)
+define percent_defconfig
+# Override the BR2_DEFCONFIG from COMMON_CONFIG_ENV with the new defconfig
+%_defconfig: $(BUILD_DIR)/buildroot-config/conf $(1)/configs/%_defconfig outputmakefile
+	@$$(COMMON_CONFIG_ENV) BR2_DEFCONFIG=$(1)/configs/$$@ \
+		$$< --defconfig=$(1)/configs/$$@ $$(CONFIG_CONFIG_IN)
+endef
+$(eval $(foreach d,$(call reverse,$(TOPDIR) $(BR2_EXTERNAL_DIRS)),$(call percent_defconfig,$(d))$(sep)))

 update-defconfig: savedefconfig

@@ -1056,7 +1047,7 @@ savedefconfig: $(BUILD_DIR)/buildroot-config/conf outputmakefile

 # staging and target directories do NOT list these as
 # dependencies anywhere else
-$(BASE_DIR) $(BUILD_DIR) $(BASE_TARGET_DIR) $(HOST_DIR) $(BINARIES_DIR) $(LEGAL_INFO_DIR) $(REDIST_SOURCES_DIR_TARGET) $(REDIST_SOURCES_DIR_HOST) $(PER_PACKAGE_DIR):
+$(BUILD_DIR) $(BASE_TARGET_DIR) $(HOST_DIR) $(BINARIES_DIR) $(LEGAL_INFO_DIR) $(REDIST_SOURCES_DIR_TARGET) $(REDIST_SOURCES_DIR_HOST) $(PER_PACKAGE_DIR):
 	@mkdir -p $@

 # outputmakefile generates a Makefile in the output directory, if using a
@@ -1072,54 +1063,23 @@ endif
 # Makefiles. Alternatively, if a non-empty VARS variable is passed,
 # only the variables matching the make pattern passed in VARS are
 # displayed.
-# show-vars does the same, but as a JSON dictionnary.
-#
-# Note: we iterate of .VARIABLES and filter each variable individually,
-# to workaround a bug in make 4.3; see https://savannah.gnu.org/bugs/?59093
 .PHONY: printvars
 printvars:
-ifndef VARS
-	$(error Please pass a non-empty VARS to 'make printvars')
-endif
 	@:
 	$(foreach V, \
-		$(sort $(foreach X, $(.VARIABLES), $(filter $(VARS),$(X)))), \
+		$(sort $(filter $(VARS),$(.VARIABLES))), \
 		$(if $(filter-out environment% default automatic, \
 				$(origin $V)), \
 		$(if $(QUOTED_VARS),\
 			$(info $V='$(subst ','\'',$(if $(RAW_VARS),$(value $V),$($V)))'), \
 			$(info $V=$(if $(RAW_VARS),$(value $V),$($V))))))
-# ')))) # Syntax colouring...
-
-# See details above, same as for printvars
-.PHONY: show-vars
-show-vars: VARS?=%
-show-vars:
-	@:
-	$(foreach i, \
-		$(call clean-json, { \
-			$(foreach V, \
-				$(.VARIABLES), \
-				$(and $(filter $(VARS),$(V)) \
-					, \
-					$(filter-out environment% default automatic, $(origin $V)) \
-					, \
-					"$V": { \
-						"expanded": $(call mk-json-str,$($V))$(comma) \
-						"raw": $(call mk-json-str,$(value $V)) \
-					}$(comma) \
-				) \
-			) \
-		} ) \
-		, \
-		$(info $(i)) \
-	)
+# ' Syntax colouring...

 .PHONY: clean
 clean:
 	rm -rf $(BASE_TARGET_DIR) $(BINARIES_DIR) $(HOST_DIR) $(HOST_DIR_SYMLINK) \
 		$(BUILD_DIR) $(BASE_DIR)/staging \
-		$(LEGAL_INFO_DIR) $(GRAPHS_DIR) $(PER_PACKAGE_DIR) $(O)/pkg-stats.*
+		$(LEGAL_INFO_DIR) $(GRAPHS_DIR) $(PER_PACKAGE_DIR)

 .PHONY: distclean
 distclean: clean
@@ -1177,13 +1137,9 @@ help:
 	@echo '                         - Recursively list packages which have <pkg> as a dependency'
 	@echo '  <pkg>-graph-depends    - Generate a graph of <pkg>'\''s dependencies'
 	@echo '  <pkg>-graph-rdepends   - Generate a graph of <pkg>'\''s reverse dependencies'
-	@echo '  <pkg>-graph-both-depends'
-	@echo '                         - Generate a graph of both <pkg>'\''s forward and'
-	@echo '                           reverse dependencies.'
 	@echo '  <pkg>-dirclean         - Remove <pkg> build directory'
 	@echo '  <pkg>-reconfigure      - Restart the build from the configure step'
 	@echo '  <pkg>-rebuild          - Restart the build from the build step'
-	@echo '  <pkg>-reinstall        - Restart the build from the install step'
 	$(foreach p,$(HELP_PACKAGES), \
 		@echo $(sep) \
 		@echo '$($(p)_NAME):' $(sep) \
@@ -1208,8 +1164,6 @@ help:
 	@echo '  show-info              - generate info about packages, as a JSON blurb'
 	@echo '  pkg-stats              - generate info about packages as JSON and HTML'
 	@echo '  printvars              - dump internal variables selected with VARS=...'
-	@echo '  show-vars              - dump all internal variables as a JSON blurb; use VARS=...'
-	@echo '                           to limit the list to variables names matching that pattern'
 	@echo
 	@echo '  make V=0|1             - 0 => quiet build (default), 1 => verbose build'
 	@echo '  make O=dir             - Locate all output files in "dir", including .config'
@@ -1223,17 +1177,17 @@ help:
 # $(2): br2-external name, empty for bundled
 define list-defconfigs
 	@first=true; \
-	for defconfig in $$([ -d $(1)/configs ] && find $(1)/configs -name '*_defconfig' |sort); do \
+	for defconfig in $(1)/configs/*_defconfig; do \
 		[ -f "$${defconfig}" ] || continue; \
 		if $${first}; then \
 			if [ "$(2)" ]; then \
-				printf 'External configs in "%s":\n' "$(call qstrip,$(2))"; \
+				printf 'External configs in "$(call qstrip,$(2))":\n'; \
 			else \
 				printf "Built-in configs:\n"; \
 			fi; \
 			first=false; \
 		fi; \
-		defconfig="$${defconfig#$(1)/configs/}"; \
+		defconfig="$${defconfig##*/}"; \
 		printf "  %-35s - Build for %s\n" "$${defconfig}" "$${defconfig%_defconfig}"; \
 	done; \
 	$${first} || printf "\n"
@@ -1254,52 +1208,30 @@ release: OUT = buildroot-$(BR2_VERSION)
 # documentation to the git output
 release:
 	git archive --format=tar --prefix=$(OUT)/ HEAD > $(OUT).tar
-	SOURCE_DATE_EPOCH=$$(git log -1 --format=%at 2> /dev/null) \
-		$(MAKE) O=$(OUT) manual-html manual-text manual-pdf
+	$(MAKE) O=$(OUT) manual-html manual-text manual-pdf
 	$(MAKE) O=$(OUT) distclean
-	tar rf $(OUT).tar --owner=0 --group=0 \
-		--mtime="$$(git log -1 --pretty=format:%ci)" $(OUT)
-	gzip -9 -n -c < $(OUT).tar > $(OUT).tar.gz
-	xz -9 -c < $(OUT).tar > $(OUT).tar.xz
+	tar rf $(OUT).tar $(OUT)
+	gzip -9 -c < $(OUT).tar > $(OUT).tar.gz
+	bzip2 -9 -c < $(OUT).tar > $(OUT).tar.bz2
 	rm -rf $(OUT) $(OUT).tar

 print-version:
 	@echo $(BR2_VERSION_FULL)

-# $(1): br2-external path
-# $(2): br2-external description
-define check-package-external
-	@$(call MESSAGE,"Checking packages in $(2)")
-	$(Q)if [ -r "$(1)/.checkpackageignore" ]; then \
-		ignore="--ignore-list=$(1)/.checkpackageignore" ; \
-	else \
-		ignore=""; \
-	fi ; \
-	$(TOPDIR)/utils/check-package \
-		--br2-external $${ignore} \
-		`git -C $(1) ls-tree -r --format='$(1)/%(path)' HEAD`
-endef
+check-flake8:
+	$(Q)git ls-tree -r --name-only HEAD \
+	| xargs file \
+	| grep 'Python script' \
+	| cut -d':' -f1 \
+	| xargs -- python3 -m flake8 --statistics

 check-package:
-	$(Q)./utils/check-package `git ls-tree -r --name-only HEAD` \
-		--ignore-list=$(TOPDIR)/.checkpackageignore
-
-check-package-external:
-	$(foreach name,$(BR2_EXTERNAL_NAMES),\
-		$(call check-package-external,$(BR2_EXTERNAL_$(name)_PATH),\
-			$(BR2_EXTERNAL_$(name)_DESC))$(sep))
-
-.PHONY: .checkpackageignore
-.checkpackageignore:
-	$(Q)./utils/check-package --failed-only `git ls-tree -r --name-only HEAD` \
-		> .checkpackageignore
+	find $(TOPDIR) -type f \( -name '*.mk' -o -name '*.hash' -o -name 'Config.*' \) \
+		-exec ./utils/check-package {} +

 include docs/manual/manual.mk
 -include $(foreach dir,$(BR2_EXTERNAL_DIRS),$(sort $(wildcard $(dir)/docs/*/*.mk)))

 .PHONY: $(noconfig_targets)

-# .WAIT was introduced in make 4.4. For older make, define it as phony.
-.PHONY: .WAIT
-
 endif #umask / $(CURDIR) / $(O)
--- a/4
+++ b/4
@@ -3,7 +3,7 @@ Linux systems through cross-compilation.

 The documentation can be found in docs/manual. You can generate a text
 document with 'make manual-text' and read output/docs/manual/manual.text.
-Online documentation can be found at https://buildroot.org/docs.html
+Online documentation can be found at http://buildroot.org/docs.html

 To build and use the buildroot stuff, do the following:

@@ -20,7 +20,7 @@ Buildroot comes with a basic configuration for a number of boards. Run

 Please feed suggestions, bug reports, insults, and bribes back to the
 buildroot mailing list: buildroot@buildroot.org
-You can also find us on #buildroot on OFTC IRC.
+You can also find us on #buildroot on Freenode IRC.

 If you would like to contribute patches, please read
 https://buildroot.org/manual.html#submitting-patches
--- a/arch/Config.in
+++ b/arch/Config.in
@@ -9,10 +9,10 @@ config BR2_KERNEL_64_USERLAND_32
 config BR2_SOFT_FLOAT
 	bool

-config BR2_USE_MMU
+config BR2_ARCH_HAS_MMU_MANDATORY
 	bool

-config BR2_ARCH_HAS_FDPIC_SUPPORT
+config BR2_ARCH_HAS_MMU_OPTIONAL
 	bool

 choice
@@ -23,12 +23,20 @@ choice

 config BR2_arcle
 	bool "ARC (little endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Synopsys' DesignWare ARC Processor Cores are a family of
 	  32-bit CPUs that can be used from deeply embedded to high
 	  performance host applications. Little endian.

+config BR2_arceb
+	bool "ARC (big endian)"
+	select BR2_ARCH_HAS_MMU_MANDATORY
+	help
+	  Synopsys' DesignWare ARC Processor Cores are a family of
+	  32-bit CPUs that can be used from deeply embedded to high
+	  performance host applications. Big endian.
+
 config BR2_arm
 	bool "ARM (little endian)"
 	# MMU support is set by the subarchitecture file, arch/Config.in.arm
@@ -41,7 +49,7 @@ config BR2_arm

 config BR2_armeb
 	bool "ARM (big endian)"
-	select BR2_USE_MMU
+	# MMU support is set by the subarchitecture file, arch/Config.in.arm
 	help
 	  ARM is a 32-bit reduced instruction set computer (RISC)
 	  instruction set architecture (ISA) developed by ARM Holdings.
@@ -52,6 +60,7 @@ config BR2_armeb
 config BR2_aarch64
 	bool "AArch64 (little endian)"
 	select BR2_ARCH_IS_64
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Aarch64 is a 64-bit architecture developed by ARM Holdings.
 	  http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
@@ -60,36 +69,30 @@ config BR2_aarch64
 config BR2_aarch64_be
 	bool "AArch64 (big endian)"
 	select BR2_ARCH_IS_64
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Aarch64 is a 64-bit architecture developed by ARM Holdings.
 	  http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
 	  http://en.wikipedia.org/wiki/ARM

-config BR2_hppa
-	bool "HPPA"
-	select BR2_USE_MMU
+config BR2_csky
+	bool "csky"
+	select BR2_ARCH_HAS_MMU_MANDATORY
+	# Most variants are supported by gcc-9+, except one that is
+	# handled as a special exception in package/gcc/Config.in.host
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 	help
-	  Precision Architecture (a.k.a. PA-RISC) is a 32-bit
-	  (big endian) architecture developed by Hewlett Packard.
-	  https://en.wikipedia.org/wiki/PA-RISC
+	  csky is processor IP from china.
+	  http://www.c-sky.com/
+	  http://www.github.com/c-sky

 config BR2_i386
 	bool "i386"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Intel i386 architecture compatible microprocessor
 	  http://en.wikipedia.org/wiki/I386

-config BR2_loongarch64
-	bool "LoongArch64"
-	select BR2_USE_MMU
-	select BR2_ARCH_IS_64
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
-	help
-	  LoongArch64 is 64-bit architecture developed by Loongson.
-	  http://www.loongson.cn/
-	  https://en.wikipedia.org/wiki/Loongson
-
 config BR2_m68k
 	bool "m68k"
 	# MMU support is set by the subarchitecture file, arch/Config.in.m68k
@@ -99,7 +102,7 @@ config BR2_m68k

 config BR2_microblazeel
 	bool "Microblaze AXI (little endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Soft processor core designed for Xilinx FPGAs from Xilinx. AXI
 	  bus based architecture (little endian)
@@ -108,7 +111,7 @@ config BR2_microblazeel

 config BR2_microblazebe
 	bool "Microblaze non-AXI (big endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  Soft processor core designed for Xilinx FPGAs from Xilinx. PLB
 	  bus based architecture (non-AXI, big endian)
@@ -117,7 +120,7 @@ config BR2_microblazebe

 config BR2_mips
 	bool "MIPS (big endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Big
 	  endian.
@@ -126,7 +129,7 @@ config BR2_mips

 config BR2_mipsel
 	bool "MIPS (little endian)"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Little
 	  endian.
@@ -136,7 +139,7 @@ config BR2_mipsel
 config BR2_mips64
 	bool "MIPS64 (big endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Big
 	  endian.
@@ -146,23 +149,39 @@ config BR2_mips64
 config BR2_mips64el
 	bool "MIPS64 (little endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  MIPS is a RISC microprocessor from MIPS Technologies. Little
 	  endian.
 	  http://www.mips.com/
 	  http://en.wikipedia.org/wiki/MIPS_Technologies

+config BR2_nds32
+	bool "nds32"
+	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
+	select BR2_ARCH_HAS_MMU_MANDATORY
+	help
+	  nds32 is a 32-bit architecture developed by Andes Technology.
+	  https://en.wikipedia.org/wiki/Andes_Technology
+
+config BR2_nios2
+	bool "Nios II"
+	select BR2_ARCH_HAS_MMU_MANDATORY
+	help
+	  Nios II is a soft core processor from Altera Corporation.
+	  http://www.altera.com/
+	  http://en.wikipedia.org/wiki/Nios_II
+
 config BR2_or1k
 	bool "OpenRISC"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  OpenRISC is a free and open processor for embedded system.
 	  http://openrisc.io

 config BR2_powerpc
 	bool "PowerPC"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  PowerPC is a RISC architecture created by Apple-IBM-Motorola
 	  alliance. Big endian.
@@ -172,7 +191,7 @@ config BR2_powerpc
 config BR2_powerpc64
 	bool "PowerPC64 (big endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  PowerPC is a RISC architecture created by Apple-IBM-Motorola
 	  alliance. Big endian.
@@ -182,7 +201,7 @@ config BR2_powerpc64
 config BR2_powerpc64le
 	bool "PowerPC64 (little endian)"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  PowerPC is a RISC architecture created by Apple-IBM-Motorola
 	  alliance. Little endian.
@@ -191,6 +210,7 @@ config BR2_powerpc64le

 config BR2_riscv
 	bool "RISCV"
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	help
 	  RISC-V is an open, free Instruction Set Architecture created
@@ -202,7 +222,7 @@ config BR2_riscv
 config BR2_s390x
 	bool "s390x"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  s390x is a big-endian architecture made by IBM.
 	  http://www.ibm.com/
@@ -210,7 +230,7 @@ config BR2_s390x

 config BR2_sh
 	bool "SuperH"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	help
 	  SuperH (or SH) is a 32-bit reduced instruction set computer
 	  (RISC) instruction set architecture (ISA) developed by
@@ -220,7 +240,7 @@ config BR2_sh

 config BR2_sparc
 	bool "SPARC"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  SPARC (from Scalable Processor Architecture) is a RISC
 	  instruction set architecture (ISA) developed by Sun
@@ -231,7 +251,7 @@ config BR2_sparc
 config BR2_sparc64
 	bool "SPARC64"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  SPARC (from Scalable Processor Architecture) is a RISC
 	  instruction set architecture (ISA) developed by Sun
@@ -242,7 +262,7 @@ config BR2_sparc64
 config BR2_x86_64
 	bool "x86_64"
 	select BR2_ARCH_IS_64
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  x86-64 is an extension of the x86 instruction set (Intel i386
 	  architecture compatible microprocessor).
@@ -301,38 +321,11 @@ config BR2_ARCH_NEEDS_GCC_AT_LEAST_10
 	bool
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9

-config BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_12
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_13
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_14
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_15
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_14
-
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_16
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_15
-
 # The following string values are defined by the individual
 # Config.in.$ARCH files
 config BR2_ARCH
 	string

-config BR2_NORMALIZED_ARCH
-	string
-
 config BR2_ENDIAN
 	string

@@ -363,12 +356,6 @@ config BR2_GCC_TARGET_FPU
 config BR2_GCC_TARGET_FLOAT_ABI
 	string

-# The value of this option will be passed as --with-simd=<value> when
-# building gcc (internal backend) or -simd=<value> in the toolchain
-# wrapper (external toolchain)
-config BR2_GCC_TARGET_SIMD
-	string
-
 # The value of this option will be passed as --with-mode=<value> when
 # building gcc (internal backend) or -m<value> in the toolchain
 # wrapper (external toolchain)
@@ -385,7 +372,57 @@ config BR2_BINFMT_SUPPORTS_SHARED
 config BR2_READELF_ARCH_NAME
 	string

-if BR2_arcle
+# Set up target binary format
+choice
+	prompt "Target Binary Format"
+	default BR2_BINFMT_ELF if BR2_USE_MMU
+	default BR2_BINFMT_FLAT
+
+config BR2_BINFMT_ELF
+	bool "ELF"
+	depends on BR2_USE_MMU
+	select BR2_BINFMT_SUPPORTS_SHARED
+	help
+	  ELF (Executable and Linkable Format) is a format for libraries
+	  and executables used across different architectures and
+	  operating systems.
+
+config BR2_BINFMT_FLAT
+	bool "FLAT"
+	depends on !BR2_USE_MMU
+	help
+	  FLAT binary is a relatively simple and lightweight executable
+	  format based on the original a.out format. It is widely used
+	  in environment where no MMU is available.
+
+endchoice
+
+# Set up flat binary type
+choice
+	prompt "FLAT Binary type"
+	default BR2_BINFMT_FLAT_ONE
+	depends on BR2_BINFMT_FLAT
+
+config BR2_BINFMT_FLAT_ONE
+	bool "One memory region"
+	help
+	  All segments are linked into one memory region.
+
+config BR2_BINFMT_FLAT_SHARED
+	bool "Shared binary"
+	depends on BR2_m68k
+	# Even though this really generates shared binaries, there is no libdl
+	# and dlopen() cannot be used. So packages that require shared
+	# libraries cannot be built. Therefore, we don't select
+	# BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
+	# Although this adds -static to the compilation, that's not a problem
+	# because the -mid-shared-library option overrides it.
+	help
+	  Allow to load and link indiviual FLAT binaries at run time.
+
+endchoice
+
+if BR2_arcle || BR2_arceb
 source "arch/Config.in.arc"
 endif

@@ -393,12 +430,8 @@ if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
 source "arch/Config.in.arm"
 endif

-if BR2_hppa
-source "arch/Config.in.hppa"
-endif
-
-if BR2_loongarch64
-source "arch/Config.in.loongarch"
+if BR2_csky
+source "arch/Config.in.csky"
 endif

 if BR2_m68k
@@ -413,6 +446,14 @@ if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
 source "arch/Config.in.mips"
 endif

+if BR2_nds32
+source "arch/Config.in.nds32"
+endif
+
+if BR2_nios2
+source "arch/Config.in.nios2"
+endif
+
 if BR2_or1k
 source "arch/Config.in.or1k"
 endif
@@ -445,39 +486,4 @@ if BR2_xtensa
 source "arch/Config.in.xtensa"
 endif

-# Set up target binary format
-choice
-	prompt "Target Binary Format"
-	default BR2_BINFMT_ELF if BR2_USE_MMU
-	default BR2_BINFMT_FLAT
-
-config BR2_BINFMT_ELF
-	bool "ELF"
-	depends on BR2_USE_MMU
-	select BR2_BINFMT_SUPPORTS_SHARED
-	help
-	  ELF (Executable and Linkable Format) is a format for libraries
-	  and executables used across different architectures and
-	  operating systems.
-
-config BR2_BINFMT_FDPIC
-	bool "FDPIC"
-	depends on BR2_ARCH_HAS_FDPIC_SUPPORT
-	select BR2_BINFMT_SUPPORTS_SHARED
-	help
-	  ELF FDPIC binaries are based on ELF, but allow the individual
-	  load segments of a binary to be located in memory
-	  independently of each other. This makes this format ideal for
-	  use in environments where no MMU is available.
-
-config BR2_BINFMT_FLAT
-	bool "FLAT"
-	depends on !BR2_USE_MMU
-	help
-	  FLAT binary is a relatively simple and lightweight executable
-	  format based on the original a.out format. It is widely used
-	  in environment where no MMU is available.
-
-endchoice
-
 endmenu # Target options
--- a/arch/Config.in.arc
+++ b/arch/Config.in.arc
@@ -3,7 +3,7 @@ choice
 	default BR2_arc770d
 	depends on BR2_arc
 	help
-	  Specific CPU to use
+	    Specific CPU to use

 config BR2_arc750d
 	bool "ARC 750D"
@@ -31,7 +31,7 @@ config BR2_archs38_full
 	bool "ARC HS38 with Quad MAC & FPU"
 	help
 	  Fully featured ARC HS with additional support for
-	   - Dual- and quad multiply and MC operations
+	   - Dual- and quad multiply and MC oprations
 	   - Double-precision FPU

 	  It corresponds to "hs38_slc_full" ARC HS template in
@@ -40,12 +40,12 @@ config BR2_archs38_full
 config BR2_archs4x_rel31
 	bool "ARC HS48 rel 31"
 	help
-	  Build for HS48 release 3.1
+	   Build for HS48 release 3.1

 config BR2_archs4x
 	bool "ARC HS48"
 	help
-	  Latest release of HS48 processor
+	   Latest release of HS48 processor
 	   - Dual and Quad multiply and MAC operations
 	   - Double-precision FPU

@@ -59,17 +59,16 @@ config BR2_ARC_ATOMIC_EXT
 	default y if BR2_archs4x_rel31 || BR2_archs4x

 config BR2_ARCH
-	default "arc"
-
-config BR2_NORMALIZED_ARCH
-	default "arc"
+	default "arc"	if BR2_arcle
+	default "arceb"	if BR2_arceb

 config BR2_arc
 	bool
-	default y
+	default y if BR2_arcle || BR2_arceb

 config BR2_ENDIAN
-	default "LITTLE"
+	default "LITTLE" if BR2_arcle
+	default "BIG"	 if BR2_arceb

 config BR2_GCC_TARGET_CPU
 	default "arc700" if BR2_arc750d
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -73,35 +73,21 @@ config BR2_ARM_CPU_HAS_THUMB2

 config BR2_ARM_CPU_ARMV4
 	bool
-	select BR2_USE_MMU

 config BR2_ARM_CPU_ARMV5
 	bool
-	select BR2_USE_MMU

 config BR2_ARM_CPU_ARMV6
 	bool
-	select BR2_USE_MMU

 config BR2_ARM_CPU_ARMV7A
 	bool
-	select BR2_USE_MMU

 config BR2_ARM_CPU_ARMV7M
 	bool
-	select BR2_ARCH_HAS_FDPIC_SUPPORT

 config BR2_ARM_CPU_ARMV8A
 	bool
-	select BR2_USE_MMU
-
-# Armv9.0-A base specification is a super-set of Armv8.5-A. It is
-# fully compatible with Armv8. This symbol is defined to allow checks
-# for doing Armv9 optimization. Armv8 is also selected for
-# compatibility.
-config BR2_ARM_CPU_ARMV9A
-	bool
-	select BR2_ARM_CPU_ARMV8A

 choice
 	prompt "Target Architecture Variant"
@@ -117,19 +103,23 @@ config BR2_arm920t
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm922t
 	bool "arm922t"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_fa526
 	bool "fa526/626"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_strongarm
 	bool "strongarm sa110/sa1100"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL

 comment "armv5 cores"
 config BR2_arm926t
@@ -138,11 +128,18 @@ config BR2_arm926t
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_iwmmxt
+	bool "iwmmxt"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_ARMV5
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_xscale
 	bool "xscale"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
+	select BR2_ARCH_HAS_MMU_OPTIONAL

 comment "armv6 cores"
 config BR2_arm1136j_s
@@ -150,29 +147,34 @@ config BR2_arm1136j_s
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1136jf_s
 	bool "arm1136jf-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1176jz_s
 	bool "arm1176jz-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm1176jzf_s
 	bool "arm1176jzf-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_arm11mpcore
 	bool "mpcore"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
+	select BR2_ARCH_HAS_MMU_OPTIONAL

 comment "armv7a cores"
 config BR2_cortex_a5
@@ -182,6 +184,7 @@ config BR2_cortex_a5
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a7
 	bool "cortex-A7"
 	select BR2_ARM_CPU_HAS_ARM
@@ -189,6 +192,7 @@ config BR2_cortex_a7
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a8
 	bool "cortex-A8"
 	select BR2_ARM_CPU_HAS_ARM
@@ -196,6 +200,7 @@ config BR2_cortex_a8
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a9
 	bool "cortex-A9"
 	select BR2_ARM_CPU_HAS_ARM
@@ -203,6 +208,7 @@ config BR2_cortex_a9
 	select BR2_ARM_CPU_MAYBE_HAS_VFPV3
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a12
 	bool "cortex-A12"
 	select BR2_ARM_CPU_HAS_ARM
@@ -210,6 +216,7 @@ config BR2_cortex_a12
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a15
 	bool "cortex-A15"
 	select BR2_ARM_CPU_HAS_ARM
@@ -217,6 +224,7 @@ config BR2_cortex_a15
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a15_a7
 	bool "cortex-A15/A7 big.LITTLE"
 	select BR2_ARM_CPU_HAS_ARM
@@ -224,6 +232,7 @@ config BR2_cortex_a15_a7
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_cortex_a17
 	bool "cortex-A17"
@@ -232,6 +241,7 @@ config BR2_cortex_a17
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_cortex_a17_a7
 	bool "cortex-A17/A7 big.LITTLE"
@@ -240,15 +250,15 @@ config BR2_cortex_a17_a7
 	select BR2_ARM_CPU_HAS_VFPV4
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_pj4
 	bool "pj4"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL

-# Cortex-M cores are only supported for little endian configurations
-if BR2_arm
 comment "armv7m cores"
 config BR2_cortex_m3
 	bool "cortex-M3"
@@ -265,7 +275,6 @@ config BR2_cortex_m7
 	select BR2_ARM_CPU_MAYBE_HAS_FPV5
 	select BR2_ARM_CPU_ARMV7M
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-endif # BR2_arm
 endif # !BR2_ARCH_IS_64

 comment "armv8 cores"
@@ -277,6 +286,7 @@ config BR2_cortex_a32
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a35
 	bool "cortex-A35"
@@ -285,6 +295,7 @@ config BR2_cortex_a35
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a53
 	bool "cortex-A53"
@@ -293,6 +304,7 @@ config BR2_cortex_a53
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a57
 	bool "cortex-A57"
 	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
@@ -300,6 +312,7 @@ config BR2_cortex_a57
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a57_a53
 	bool "cortex-A57/A53 big.LITTLE"
 	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
@@ -307,6 +320,7 @@ config BR2_cortex_a57_a53
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a72
 	bool "cortex-A72"
@@ -315,6 +329,7 @@ config BR2_cortex_a72
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_cortex_a72_a53
 	bool "cortex-A72/A53 big.LITTLE"
@@ -323,6 +338,7 @@ config BR2_cortex_a72_a53
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a73
 	bool "cortex-A73"
@@ -331,6 +347,7 @@ config BR2_cortex_a73
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_cortex_a73_a35
 	bool "cortex-A73/A35 big.LITTLE"
@@ -339,6 +356,7 @@ config BR2_cortex_a73_a35
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_cortex_a73_a53
 	bool "cortex-A73/A53 big.LITTLE"
@@ -347,12 +365,14 @@ config BR2_cortex_a73_a53
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_emag
 	bool "emag"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 config BR2_exynos_m1
 	bool "exynos-m1"
@@ -361,54 +381,63 @@ config BR2_exynos_m1
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_falkor
 	bool "falkor"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_phecda
 	bool "phecda"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 config BR2_qdf24xx
 	bool "qdf24xx"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_thunderx
 	bool "thunderx (aka octeontx)"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_thunderxt81
 	bool "thunderxt81 (aka octeontx81)"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_thunderxt83
 	bool "thunderxt83 (aka octeontx83)"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_thunderxt88
 	bool "thunderxt88"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_thunderxt88p1
 	bool "thunderxt88p1"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_xgene1
 	bool "xgene1"
@@ -417,6 +446,7 @@ config BR2_xgene1
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5

 comment "armv8.1a cores"
@@ -425,18 +455,21 @@ config BR2_thunderx2t99
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_thunderx2t99p1
 	bool "thunderx2t99p1"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 config BR2_vulcan
 	bool "vulcan"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7

 comment "armv8.2a cores"
@@ -445,18 +478,21 @@ config BR2_cortex_a55
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
 config BR2_cortex_a75
 	bool "cortex-A75"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
 config BR2_cortex_a75_a55
 	bool "cortex-A75/A55 big.LITTLE"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
 config BR2_cortex_a76
 	bool "cortex-A76"
@@ -465,6 +501,7 @@ config BR2_cortex_a76
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 config BR2_cortex_a76_a55
 	bool "cortex-A76/A55 big.LITTLE"
@@ -473,15 +510,8 @@ config BR2_cortex_a76_a55
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_cortex_a78
-	bool "cortex-A78"
-	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
 config BR2_neoverse_n1
 	bool "neoverse-N1 (aka ares)"
 	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
@@ -489,67 +519,24 @@ config BR2_neoverse_n1
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
 config BR2_tsv110
 	bool "tsv110"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9

 comment "armv8.4a cores"
-config BR2_neoverse_v1
-	bool "neoverse-V1 (aka zeus)"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
 config BR2_saphira
 	bool "saphira"
 	depends on BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-
-comment "armv9.0a cores"
-config BR2_cortex_a710
-	bool "Cortex-A710 (aka matterhorn)"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV9A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
-config BR2_neoverse_n2
-	bool "neoverse-N2 (aka perseus)"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV9A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-config BR2_neoverse_v2
-	bool "neoverse-V2 (aka demeter)"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV9A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
-
-comment "armv9.2a cores"
-config BR2_cortex_a720
-	bool "Cortex-A720 (aka hunter)"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV9A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_14
-config BR2_neoverse_v3
-	bool "neoverse-V3 (aka poseidon)"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV9A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_15
-config BR2_neoverse_v3ae
-	bool "neoverse-V3AE (aka poseidon)"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV9A
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_15
 endchoice

 config BR2_ARM_ENABLE_NEON
@@ -809,7 +796,7 @@ config BR2_ARM_INSTRUCTIONS_THUMB
 	# Thumb-1 and VFP are not compatible
 	depends on BR2_ARM_SOFT_FLOAT
 	help
-	  This option instructs the compiler to generate Thumb
+	  This option instructions the compiler to generate Thumb
 	  instructions, which allows to mix 16 bits instructions and
 	  32 bits instructions. This generally provides a much smaller
 	  compiled binary size.
@@ -822,52 +809,19 @@ config BR2_ARM_INSTRUCTIONS_THUMB2
 	bool "Thumb2"
 	depends on BR2_ARM_CPU_HAS_THUMB2
 	help
-	  This option instructs the compiler to generate Thumb2
+	  This option instructions the compiler to generate Thumb2
 	  instructions, which allows to mix 16 bits instructions and
 	  32 bits instructions. This generally provides a much smaller
 	  compiled binary size.

 endchoice

-choice
-	prompt "MMU Page Size"
-	default BR2_ARM64_PAGE_SIZE_4K
-	depends on BR2_aarch64 || BR2_aarch64_be
-	help
-	  The default is 4KB, and you should probably keep this unless
-	  you know what you are doing. In particular, the kernel
-	  configuration must match this choice. If your kernel is
-	  built by Buildroot, the kernel configuration is
-	  automatically adjusted, but not if you built your kernel
-	  outside of Buildroot.
-
-config BR2_ARM64_PAGE_SIZE_4K
-	bool "4KB"
-
-config BR2_ARM64_PAGE_SIZE_16K
-	bool "16KB"
-
-config BR2_ARM64_PAGE_SIZE_64K
-	bool "64KB"
-
-endchoice
-
-config BR2_ARM64_PAGE_SIZE
-	string
-	default "4K" if BR2_ARM64_PAGE_SIZE_4K
-	default "16K" if BR2_ARM64_PAGE_SIZE_16K
-	default "64K" if BR2_ARM64_PAGE_SIZE_64K
-
 config BR2_ARCH
 	default "arm"		if BR2_arm
 	default "armeb"		if BR2_armeb
 	default "aarch64"	if BR2_aarch64
 	default "aarch64_be"	if BR2_aarch64_be

-config BR2_NORMALIZED_ARCH
-	default "arm"		if BR2_arm || BR2_armeb
-	default "arm64"		if BR2_aarch64 || BR2_aarch64_be
-
 config BR2_ENDIAN
 	default "LITTLE" if (BR2_arm || BR2_aarch64)
 	default "BIG"	 if (BR2_armeb || BR2_aarch64_be)
@@ -880,6 +834,7 @@ config BR2_GCC_TARGET_CPU
 	default "strongarm"	if BR2_strongarm
 	# armv5
 	default "arm926ej-s"	if BR2_arm926t
+	default "iwmmxt"	if BR2_iwmmxt
 	default "xscale"	if BR2_xscale
 	# armv6
 	default "arm1136j-s"	if BR2_arm1136j_s
@@ -938,20 +893,10 @@ config BR2_GCC_TARGET_CPU
 	default "cortex-a75.cortex-a55"	if BR2_cortex_a75_a55
 	default "cortex-a76"	if BR2_cortex_a76
 	default "cortex-a76.cortex-a55"	if BR2_cortex_a76_a55
-	default "cortex-a78"	if BR2_cortex_a78
 	default "neoverse-n1"	if BR2_neoverse_n1
 	default "tsv110"	if BR2_tsv110
 	# armv8.4a
-	default "neoverse-v1"   if BR2_neoverse_v1
 	default "saphira"	if BR2_saphira
-	# armv9.0a
-	default "cortex-a710"	if BR2_cortex_a710
-	default "neoverse-n2"	if BR2_neoverse_n2
-	default "neoverse-v2"	if BR2_neoverse_v2
-	# armv9.2a
-	default "cortex-a720"	if BR2_cortex_a720
-	default "neoverse-v3"	if BR2_neoverse_v3
-	default "neoverse-v3ae"	if BR2_neoverse_v3ae

 config BR2_GCC_TARGET_ABI
 	default "aapcs-linux"	if BR2_arm || BR2_armeb
--- a/arch/Config.in.csky
+++ b/arch/Config.in.csky
@@ -0,0 +1,49 @@
+choice
+	prompt "Target Architecture Variant"
+	default BR2_ck610
+	help
+	  Specific CPU variant to use
+
+config BR2_ck610
+	# Not supported by upstream gcc <= 9, and handled as a special
+	# exception in package/gcc/Config.in.host
+	bool "ck610"
+
+config BR2_ck807
+	bool "ck807"
+
+config BR2_ck810
+	bool "ck810"
+
+config BR2_ck860
+	bool "ck860"
+
+endchoice
+
+config BR2_CSKY_FPU
+	bool "Enable FPU coprocessor"
+	depends on BR2_ck810 || BR2_ck807 || BR2_ck860
+	help
+	  You can say N here if your C-SKY CPU doesn't have a
+	  Floating-Point Coprocessor or if you don't need FPU support
+	  for your user-space programs.
+
+config BR2_CSKY_VDSP
+	bool "Enable VDSP enhanced instructions Co-processor"
+	depends on BR2_CSKY_FPU
+
+config BR2_GCC_TARGET_FLOAT_ABI
+	default "soft"		if !BR2_CSKY_FPU
+	default "hard"		if BR2_CSKY_FPU
+
+config BR2_ARCH
+	default "csky"
+
+config BR2_ENDIAN
+	default "LITTLE"
+
+config BR2_READELF_ARCH_NAME
+	default "CSKY"
+
+# vim: ft=kconfig
+# -*- mode:kconfig; -*-
--- a/arch/Config.in.hppa
+++ b/arch/Config.in.hppa
@@ -1,22 +0,0 @@
-choice
-	prompt "Target Architecture Type"
-	help
-	  Architecture type (or version) to use.
-
-config BR2_parisc10
-	bool "PA-RISC 1.0"
-config BR2_parisc11
-	bool "PA-RISC 1.1"
-endchoice
-
-config BR2_ARCH
-	default "hppa"
-
-config BR2_NORMALIZED_ARCH
-	default "parisc"
-
-config BR2_ENDIAN
-	default "BIG"
-
-config BR2_READELF_ARCH_NAME
-	default "HPPA"
--- a/arch/Config.in.loongarch
+++ b/arch/Config.in.loongarch
@@ -1,138 +0,0 @@
-# LoongArch CPU
-
-choice
-	prompt "Target Architecture Variant"
-	default BR2_loongarch64_generic if BR2_ARCH_IS_64
-
-config BR2_loongarch64_generic
-	bool "Generic LoongArch 64-bit"
-	depends on BR2_ARCH_IS_64
-	help
-	  Generic LoongArch 64-bit processor.
-
-config BR2_loongarch64_v1_0
-	bool "LoongArch64 ISA version 1.0"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_14
-	help
-	  LoongArch64 ISA version 1.0 processor.
-
-config BR2_loongarch64_v1_1
-	bool "LoongArch64 ISA version 1.1"
-	depends on BR2_ARCH_IS_64
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_14
-	help
-	  LoongArch64 ISA version 1.1 processor.
-
-endchoice
-
-choice
-	prompt "FPU Type"
-	default BR2_LOONGARCH_FPU_64
-
-config BR2_LOONGARCH_FPU_64
-	bool "64"
-	help
-	  Allow the use of hardware floating-point instructions for
-	  32-bit and 64-bit operations.
-
-config BR2_LOONGARCH_FPU_32
-	bool "32"
-	# Only supported by lp64s and lp64f ABIs which are marked as broken
-	depends on BR2_BROKEN
-	help
-	  Allow the use of hardware floating-point instructions for
-	  32-bit operations only.
-
-config BR2_LOONGARCH_FPU_NONE
-	bool "none"
-	# Only supported by lp64s ABI which is marked as broken
-	depends on BR2_BROKEN
-	help
-	  Prevent the use of hardware floating-point instructions.
-endchoice
-
-choice
-	prompt "SIMD Type"
-	default BR2_LOONGARCH_SIMD_NONE
-
-config BR2_LOONGARCH_SIMD_NONE
-	bool "none"
-	help
-	  Prevent the use of hardware SIMD instructions.
-
-config BR2_LOONGARCH_SIMD_LSX
-	bool "LSX"
-	depends on BR2_LOONGARCH_FPU_64
-	help
-	  Enable generating instructions from the 128-bit LoongArch SIMD
-	  Extension (LSX).
-
-config BR2_LOONGARCH_SIMD_LASX
-	bool "LASX"
-	depends on BR2_LOONGARCH_FPU_64
-	help
-	  Enable generating instructions from the 256-bit LoongArch
-	  Advanced SIMD Extension (LASX) and the 128-bit LoongArch
-	  SIMD Extension (LSX).
-endchoice
-
-choice
-	prompt "Target ABI"
-	default BR2_LOONGARCH_ABI_LP64D if BR2_ARCH_IS_64 && BR2_LOONGARCH_FPU_64
-	default BR2_LOONGARCH_ABI_LP64F if BR2_ARCH_IS_64 && BR2_LOONGARCH_FPU_32
-	default BR2_LOONGARCH_ABI_LP64S if BR2_ARCH_IS_64 && BR2_LOONGARCH_SIMD_NONE
-
-config BR2_LOONGARCH_ABI_LP64D
-	bool "lp64d"
-	depends on BR2_ARCH_IS_64
-	depends on BR2_LOONGARCH_FPU_64
-
-config BR2_LOONGARCH_ABI_LP64F
-	bool "lp64f"
-	depends on BR2_ARCH_IS_64
-	# Failed to build host GCC initial, pending investigation
-	depends on BR2_BROKEN
-	depends on BR2_LOONGARCH_FPU_64 || BR2_LOONGARCH_FPU_32
-
-config BR2_LOONGARCH_ABI_LP64S
-	bool "lp64s"
-	depends on BR2_ARCH_IS_64
-	# GCC can't find libraries, pending investigation
-	depends on BR2_BROKEN
-endchoice
-
-config BR2_ARCH
-	default "loongarch64" if BR2_ARCH_IS_64
-
-config BR2_NORMALIZED_ARCH
-	default "loongarch"
-
-config BR2_ENDIAN
-	default "LITTLE"
-
-config BR2_GCC_TARGET_ARCH
-	default "loongarch64" if BR2_loongarch64_generic
-	default "la64v1.0" if BR2_loongarch64_v1_0
-	default "la64v1.1" if BR2_loongarch64_v1_1
-
-config BR2_GCC_TARGET_FPU
-	default "64" if BR2_LOONGARCH_FPU_64
-	default "32" if BR2_LOONGARCH_FPU_32
-	default "none" if BR2_LOONGARCH_FPU_NONE
-
-config BR2_GCC_TARGET_SIMD
-	default "lasx" if BR2_LOONGARCH_SIMD_LASX
-	default "lsx" if BR2_LOONGARCH_SIMD_LSX
-	default "none" if BR2_LOONGARCH_FPU_NONE
-
-config BR2_GCC_TARGET_ABI
-	default "lp64d" if BR2_LOONGARCH_ABI_LP64D
-	default "lp64f" if BR2_LOONGARCH_ABI_LP64F
-	default "lp64s" if BR2_LOONGARCH_ABI_LP64S
-
-config BR2_READELF_ARCH_NAME
-	default "LoongArch"
-
-# vim: ft=kconfig
-# -*- mode:kconfig; -*-
--- a/arch/Config.in.m68k
+++ b/arch/Config.in.m68k
@@ -1,9 +1,6 @@
 config BR2_ARCH
 	default "m68k"		if BR2_m68k

-config BR2_NORMALIZED_ARCH
-	default "m68k"
-
 config BR2_ENDIAN
 	default "BIG"

@@ -23,15 +20,10 @@ choice
 	help
 	  Specific CPU variant to use

-config BR2_m68k_68030
-	bool "68030"
-	select BR2_m68k_m68k
-	select BR2_USE_MMU
-
 config BR2_m68k_68040
 	bool "68040"
 	select BR2_m68k_m68k
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY

 config BR2_m68k_cf5208
 	bool "5208"
@@ -41,7 +33,6 @@ config BR2_m68k_cf5208
 endchoice

 config BR2_GCC_TARGET_CPU
-	default "68030"		if BR2_m68k_68030
 	default "68040"		if BR2_m68k_68040
 	default "5208"		if BR2_m68k_cf5208

--- a/arch/Config.in.microblaze
+++ b/arch/Config.in.microblaze
@@ -2,9 +2,6 @@ config BR2_ARCH
 	default "microblazeel"  if BR2_microblazeel
 	default "microblaze"    if BR2_microblazebe

-config BR2_NORMALIZED_ARCH
-	default "microblaze"
-
 config BR2_ENDIAN
 	default "LITTLE" if BR2_microblazeel
 	default "BIG"	 if BR2_microblazebe
--- a/arch/Config.in.mips
+++ b/arch/Config.in.mips
@@ -40,8 +40,8 @@ choice
 	help
 	  Specific CPU variant to use

-	  64bit capable: mips4, 64, 64r2, 64r3, 64r5, 64r6
-	  non-64bit capable: mips4, 32, 32r2, 32r3, 32r5, 32r6
+	  64bit capable: 64, 64r2, 64r3, 64r5, 64r6
+	  non-64bit capable: 32, 32r2, 32r3, 32r5, 32r6

 config BR2_mips_32
 	bool "Generic MIPS32"
@@ -97,8 +97,6 @@ config BR2_mips_xburst
 	  to be used in order to prevent emitting these instructions.

 	  See http://www.ingenic.com/en/?xburst.html
-config BR2_mips4
-	bool "MIPS IV"
 config BR2_mips_64
 	bool "Generic MIPS64"
 	depends on BR2_ARCH_IS_64
@@ -237,9 +235,6 @@ config BR2_ARCH
 	default "mips64"	if BR2_mips64
 	default "mips64el"	if BR2_mips64el

-config BR2_NORMALIZED_ARCH
-	default "mips"
-
 config BR2_ENDIAN
 	default "LITTLE"	if BR2_mipsel || BR2_mips64el
 	default "BIG"		if BR2_mips || BR2_mips64
@@ -264,7 +259,6 @@ config BR2_GCC_TARGET_ARCH
 	default "octeon2"	if BR2_mips_octeon2
 	default "octeon3"	if BR2_mips_octeon3
 	default "p6600"		if BR2_mips_p6600
-	default "mips4"		if BR2_mips4

 config BR2_MIPS_OABI32
 	bool
--- a/arch/Config.in.nds32
+++ b/arch/Config.in.nds32
@@ -0,0 +1,14 @@
+config BR2_ARCH
+	default "nds32le"
+
+config BR2_GCC_TARGET_ARCH
+	default "v3"
+
+config BR2_ENDIAN
+	default "LITTLE"
+
+config BR2_READELF_ARCH_NAME
+	default "Andes Technology compact code size embedded RISC processor family"
+
+# vim: ft=kconfig
+# -*- mode:kconfig; -*-
--- a/arch/Config.in.nios2
+++ b/arch/Config.in.nios2
@@ -0,0 +1,11 @@
+config BR2_ARCH
+	default "nios2"
+
+config BR2_ENDIAN
+	default "LITTLE"
+
+config BR2_READELF_ARCH_NAME
+	default "Altera Nios II"
+
+# vim: ft=kconfig
+# -*- mode:kconfig; -*-
--- a/arch/Config.in.or1k
+++ b/arch/Config.in.or1k
@@ -1,9 +1,6 @@
 config BR2_ARCH
 	default "or1k"

-config BR2_NORMALIZED_ARCH
-	default "openrisc"
-
 config BR2_ENDIAN
 	default "BIG"

--- a/arch/Config.in.powerpc
+++ b/arch/Config.in.powerpc
@@ -1,10 +1,6 @@
 config BR2_POWERPC_CPU_HAS_ALTIVEC
 	bool

-config BR2_POWERPC_CPU_HAS_VSX
-	bool
-	select BR2_POWERPC_CPU_HAS_ALTIVEC
-
 config BR2_POWERPC_CPU_HAS_SPE
 	bool

@@ -15,135 +11,136 @@ choice
 	  Specific CPU variant to use
 config BR2_generic_powerpc
 	bool "generic"
-	# No C library supports this variant on ppc64le
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_401
 	bool "401"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_403
 	bool "403"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_405
 	bool "405"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_405fp
 	bool "405 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_440
 	bool "440"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_440fp
 	bool "440 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_464
 	bool "464"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_464fp
 	bool "464 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_476
 	bool "476"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_476fp
 	bool "476 with FPU"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_505
 	bool "505"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_602
 	bool "602"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_603
 	bool "603"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_603e
 	bool "603e"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_604
 	bool "604"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_604e
 	bool "604e"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_620
 	bool "620"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_630
 	bool "630"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_740
 	bool "740"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_7400
 	bool "7400"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_7450
 	bool "7450"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_750
 	bool "750"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_821
 	bool "821"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_823
 	bool "823"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_860
 	bool "860"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_970
 	bool "970"
-	depends on BR2_powerpc || BR2_powerpc64
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_8540
 	bool "8540 / e500v1"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 	select BR2_POWERPC_CPU_HAS_SPE
 config BR2_powerpc_8548
 	bool "8548 / e500v2"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 	select BR2_POWERPC_CPU_HAS_SPE
 config BR2_powerpc_e300c2
 	bool "e300c2"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_e300c3
 	bool "e300c3"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_e500mc
 	bool "e500mc"
-	depends on BR2_powerpc
+	depends on !BR2_ARCH_IS_64
 config BR2_powerpc_e5500
 	bool "e5500"
-	depends on BR2_powerpc || BR2_powerpc64
+	depends on !BR2_powerpc64le
 config BR2_powerpc_e6500
 	bool "e6500"
-	depends on BR2_powerpc || BR2_powerpc64
+	depends on !BR2_powerpc64le
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_power4
 	bool "power4"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_power5
 	bool "power5"
-	depends on BR2_powerpc || BR2_powerpc64
 config BR2_powerpc_power6
 	bool "power6"
-	depends on BR2_powerpc || BR2_powerpc64
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_power7
 	bool "power7"
-	depends on BR2_powerpc || BR2_powerpc64
-	select BR2_POWERPC_CPU_HAS_VSX
+	select BR2_POWERPC_CPU_HAS_ALTIVEC
 config BR2_powerpc_power8
 	bool "power8"
-	select BR2_POWERPC_CPU_HAS_VSX
-config BR2_powerpc_power9
-	bool "power9"
 	select BR2_POWERPC_CPU_HAS_ALTIVEC
-	select BR2_POWERPC_CPU_HAS_VSX
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+endchoice
+
+choice
+	prompt "Target ABI"
+	default BR2_powerpc_SPE if BR2_POWERPC_CPU_HAS_SPE
+	default BR2_powerpc_CLASSIC
+	help
+	  Application Binary Interface to use
+
+config BR2_powerpc_CLASSIC
+	bool "Classic"
+	depends on !BR2_POWERPC_CPU_HAS_SPE
+config BR2_powerpc_SPE
+	bool "SPE"
+	depends on BR2_POWERPC_CPU_HAS_SPE
 endchoice

 config BR2_POWERPC_SOFT_FLOAT
@@ -160,9 +157,6 @@ config BR2_ARCH
 	default "powerpc64"	if BR2_powerpc64
 	default "powerpc64le"	if BR2_powerpc64le

-config BR2_NORMALIZED_ARCH
-	default "powerpc"
-
 config BR2_ENDIAN
 	default "BIG"    if BR2_powerpc || BR2_powerpc64
 	default "LITTLE" if BR2_powerpc64le
@@ -206,7 +200,6 @@ config BR2_GCC_TARGET_CPU
 	default "power6"	if BR2_powerpc_power6
 	default "power7"	if BR2_powerpc_power7
 	default "power8"	if BR2_powerpc_power8
-	default "power9"	if BR2_powerpc_power9

 config BR2_READELF_ARCH_NAME
 	default "PowerPC"	if BR2_powerpc
--- a/arch/Config.in.riscv
+++ b/arch/Config.in.riscv
@@ -1,5 +1,23 @@
 # RISC-V CPU ISA extensions.

+config BR2_RISCV_ISA_RVI
+	bool
+
+config BR2_RISCV_ISA_RVM
+	bool
+
+config BR2_RISCV_ISA_RVA
+	bool
+
+config BR2_RISCV_ISA_RVF
+	bool
+
+config BR2_RISCV_ISA_RVD
+	bool
+
+config BR2_RISCV_ISA_RVC
+	bool
+
 choice
 	prompt "Target Architecture Variant"
 	default BR2_riscv_g
@@ -17,40 +35,35 @@ config BR2_riscv_g
 config BR2_riscv_custom
 	bool "Custom architecture"
 	select BR2_RISCV_ISA_RVI
+	select BR2_RISCV_ISA_CUSTOM_RVA

 endchoice

+if BR2_riscv_custom
+
 comment "Instruction Set Extensions"

-config BR2_RISCV_ISA_RVI
-	bool "Base Integer (I)"
-
-config BR2_RISCV_ISA_RVM
+config BR2_RISCV_ISA_CUSTOM_RVM
 	bool "Integer Multiplication and Division (M)"
+	select BR2_RISCV_ISA_RVM

-config BR2_RISCV_ISA_RVA
+config BR2_RISCV_ISA_CUSTOM_RVA
 	bool "Atomic Instructions (A)"
+	select BR2_RISCV_ISA_RVA

-config BR2_RISCV_ISA_RVF
+config BR2_RISCV_ISA_CUSTOM_RVF
 	bool "Single-precision Floating-point (F)"
+	select BR2_RISCV_ISA_RVF

-config BR2_RISCV_ISA_RVD
+config BR2_RISCV_ISA_CUSTOM_RVD
 	bool "Double-precision Floating-point (D)"
 	depends on BR2_RISCV_ISA_RVF
+	select BR2_RISCV_ISA_RVD

-config BR2_RISCV_ISA_RVC
+config BR2_RISCV_ISA_CUSTOM_RVC
 	bool "Compressed Instructions (C)"
-
-config BR2_RISCV_ISA_RVV
-	bool "Vector Instructions (V)"
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
-
-config BR2_RISCV_ISA_EXTRA
-	string "Append extra RISC-V ISA extensions"
-	help
-	  Extra ISA extensions to append to the ISA extensions string.
-	  They are underscore-separated.  For example,
-	  "zba_zbb_zvl256b".
+	select BR2_RISCV_ISA_RVC
+endif

 choice
 	prompt "Target Architecture Size"
@@ -65,14 +78,6 @@ config BR2_RISCV_64

 endchoice

-config BR2_RISCV_USE_MMU
-	bool "MMU support"
-	default y
-	select BR2_USE_MMU
-	help
-	  Enable this option if your RISC-V core has a MMU (Memory
-	  Management Unit).
-
 choice
 	prompt "Target ABI"
 	default BR2_RISCV_ABI_ILP32D if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
@@ -101,7 +106,6 @@ config BR2_RISCV_ABI_LP64
 config BR2_RISCV_ABI_LP64F
 	bool "lp64f"
 	depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
-	depends on BR2_USE_MMU

 config BR2_RISCV_ABI_LP64D
 	bool "lp64d"
@@ -112,9 +116,6 @@ config BR2_ARCH
 	default "riscv32" if !BR2_ARCH_IS_64
 	default "riscv64" if BR2_ARCH_IS_64

-config BR2_NORMALIZED_ARCH
-	default "riscv"
-
 config BR2_ENDIAN
 	default "LITTLE"

--- a/arch/Config.in.s390x
+++ b/arch/Config.in.s390x
@@ -17,9 +17,6 @@ endchoice
 config BR2_ARCH
 	default "s390x"	if BR2_s390x

-config BR2_NORMALIZED_ARCH
-	default "s390"
-
 config BR2_ENDIAN
 	default "BIG"

--- a/arch/Config.in.sh
+++ b/arch/Config.in.sh
@@ -5,6 +5,8 @@ choice
 	help
 	  Specific CPU variant to use

+config BR2_sh2a
+	bool "sh2a (SH2A big endian)"
 config BR2_sh4
 	bool "sh4 (SH4 little endian)"
 config BR2_sh4eb
@@ -16,17 +18,15 @@ config BR2_sh4aeb
 endchoice

 config BR2_ARCH
+	default "sh2a"		if BR2_sh2a
 	default "sh4"		if BR2_sh4
 	default "sh4eb"		if BR2_sh4eb
 	default "sh4a"		if BR2_sh4a
 	default "sh4aeb"	if BR2_sh4aeb

-config BR2_NORMALIZED_ARCH
-	default "sh"
-
 config BR2_ENDIAN
 	default "LITTLE"	if BR2_sh4 || BR2_sh4a
-	default "BIG"		if BR2_sh4eb || BR2_sh4aeb
+	default "BIG"		if BR2_sh2a || BR2_sh4eb || BR2_sh4aeb

 config BR2_READELF_ARCH_NAME
 	default "Renesas / SuperH SH"
--- a/arch/Config.in.sparc
+++ b/arch/Config.in.sparc
@@ -21,10 +21,6 @@ config BR2_ARCH
 	default "sparc"	if BR2_sparc
 	default "sparc64" if BR2_sparc64

-config BR2_NORMALIZED_ARCH
-	default "sparc"	if BR2_sparc
-	default "sparc64" if BR2_sparc64
-
 config BR2_ENDIAN
 	default "BIG"

--- a/arch/Config.in.x86
+++ b/arch/Config.in.x86
@@ -20,19 +20,6 @@ config BR2_X86_CPU_HAS_AVX
 config BR2_X86_CPU_HAS_AVX2
 	bool

-# BR2_X86_CPU_HAS_AVX512 implies the following AVX512 extensions:
-#   AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL
-# This subset is common to Intel Xeon (excl Xeon Phi), AMD Zen 4, and
-# the x86-64-v4 psABI.
-#
-# Only select BR2_X86_CPU_HAS_AVX512 if the CPU supports this entire
-# subset of extensions.
-config BR2_X86_CPU_HAS_AVX512
-	bool
-
-# This list of CPU architecture variant is (loosely) ordered according
-# to the gcc documentation at
-# https://gcc.gnu.org/onlinedocs/gcc-13.2.0/gcc/x86-Options.html
 choice
 	prompt "Target Architecture Variant"
 	default BR2_x86_i586 if BR2_i386
@@ -72,7 +59,6 @@ config BR2_x86_pentium_m
 	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
 	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
 config BR2_x86_pentium2
 	bool "pentium2"
 	depends on !BR2_x86_64
@@ -95,78 +81,6 @@ config BR2_x86_prescott
 	select BR2_X86_CPU_HAS_SSE
 	select BR2_X86_CPU_HAS_SSE2
 	select BR2_X86_CPU_HAS_SSE3
-config BR2_x86_x86_64
-	bool "x86-64"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	help
-	  This option corresponds to -march=x86-64, documented as a
-	  "Generic CPU with 64-bit extensions" by the GCC
-	  documentation. It is a 64-bit CPU with MMX, SSE and SSE2
-	  support.
-config BR2_x86_x86_64_v2
-	bool "x86-64-v2"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  This option corresponds to the x86-64-v2 micro-architecture
-	  level, as defined by the x86-64 psABI document, see
-	  https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
-
-	  It is close to the Nehalem CPU architecture, and is
-	  applicable for CPUs that support CMPXCHG16B, LAHF-SAHF,
-	  POPCNT, SSE3, SSE4.1, SSE4.2, SSSE3.
-config BR2_x86_x86_64_v3
-	bool "x86-64-v3"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  This option corresponds to the x86-64-v3 micro-architecture
-	  level, as defined by the x86-64 psABI document, see
-	  https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
-
-	  It is close to the Haswell CPU architecture, and is
-	  applicable for CPUs that support all of x86-64-v2 plus AVX,
-	  AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE.
-config BR2_x86_x86_64_v4
-	bool "x86-64-v4"
-	depends on BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  This option corresponds to the x86-64-v4 micro-architecture
-	  level, as defined by the x86-64 psABI document, see
-	  https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
-
-	  It is applicable for CPUs that support all of x86-64-v3 plus
-	  AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL.
 config BR2_x86_nocona
 	bool "nocona"
 	select BR2_X86_CPU_HAS_MMX
@@ -189,19 +103,6 @@ config BR2_x86_corei7
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "nehalem" is preferred. Use BR2_x86_nehalem instead.
-config BR2_x86_nehalem
-	bool "nehalem"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_westmere
 	bool "westmere"
 	select BR2_X86_CPU_HAS_MMX
@@ -211,7 +112,6 @@ config BR2_x86_westmere
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_corei7_avx
 	bool "corei7-avx"
 	select BR2_X86_CPU_HAS_MMX
@@ -222,31 +122,6 @@ config BR2_x86_corei7_avx
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
 	select BR2_X86_CPU_HAS_AVX
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "sandybridge" is preferred. Use BR2_x86_sandybridge instead.
-config BR2_x86_sandybridge
-	bool "sandybridge"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_ivybridge
-	bool "ivybridge"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_core_avx2
 	bool "core-avx2"
 	select BR2_X86_CPU_HAS_MMX
@@ -258,45 +133,6 @@ config BR2_x86_core_avx2
 	select BR2_X86_CPU_HAS_SSE42
 	select BR2_X86_CPU_HAS_AVX
 	select BR2_X86_CPU_HAS_AVX2
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "haswell" is preferred. Use BR2_x86_haswell instead.
-config BR2_x86_haswell
-	bool "haswell"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_broadwell
-	bool "broadwell"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_skylake
-	bool "skylake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_x86_atom
 	bool "atom"
 	select BR2_X86_CPU_HAS_MMX
@@ -304,17 +140,6 @@ config BR2_x86_atom
 	select BR2_X86_CPU_HAS_SSE2
 	select BR2_X86_CPU_HAS_SSE3
 	select BR2_X86_CPU_HAS_SSSE3
-	help
-	  This option is deprecated. Since gcc 4.9, the gcc option
-	  "bonnell" is preferred. Use BR2_x86_bonnell instead.
-config BR2_x86_bonnell
-	bool "bonnell"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_silvermont
 	bool "silvermont"
 	select BR2_X86_CPU_HAS_MMX
@@ -324,220 +149,6 @@ config BR2_x86_silvermont
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_goldmont
-	bool "goldmont"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_goldmont_plus
-	bool "goldmont-plus"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_tremont
-	bool "tremont"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_sierraforest
-	bool "sierraforest"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
-config BR2_x86_grandridge
-	bool "grandridge"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
-config BR2_x86_skylake_avx512
-	bool "skylake-avx512"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_x86_cannonlake
-	bool "cannonlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_x86_icelake_client
-	bool "icelake-client"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_x86_icelake_server
-	bool "icelake-server"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
-config BR2_x86_cascadelake
-	bool "cascadelake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_cooperlake
-	bool "cooperlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
-config BR2_x86_tigerlake
-	bool "tigerlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_sapphirerapids
-	bool "sapphirerapids"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  Use for Sapphire Rapids, Emerald Rapids
-config BR2_x86_alderlake
-	bool "alderlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-	help
-	  Use for Alder Lake, Raptor Lake, Meteor Lake
-config BR2_x86_rocketlake
-	bool "rocketlake"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-config BR2_x86_graniterapids
-	bool "graniterapids"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
-config BR2_x86_graniterapids_d
-	bool "graniterapids-d"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
 config BR2_x86_k6
 	bool "k6"
 	depends on !BR2_x86_64
@@ -575,13 +186,6 @@ config BR2_x86_barcelona
 	select BR2_X86_CPU_HAS_SSE
 	select BR2_X86_CPU_HAS_SSE2
 	select BR2_X86_CPU_HAS_SSE3
-config BR2_x86_bobcat
-	bool "bobcat"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
 config BR2_x86_jaguar
 	bool "jaguar"
 	select BR2_X86_CPU_HAS_MMX
@@ -591,25 +195,6 @@ config BR2_x86_jaguar
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
-config BR2_x86_bulldozer
-	bool "bulldozer"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-config BR2_x86_piledriver
-	bool "piledriver"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
 config BR2_x86_steamroller
 	bool "steamroller"
 	select BR2_X86_CPU_HAS_MMX
@@ -619,73 +204,12 @@ config BR2_x86_steamroller
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
-config BR2_x86_excavator
-	bool "excavator"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-config BR2_x86_zen
-	bool "zen"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_x86_zen2
-	bool "zen 2"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
-config BR2_x86_zen3
-	bool "zen 3"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
-config BR2_x86_zen4
-	bool "zen 4"
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
-	select BR2_X86_CPU_HAS_SSE3
-	select BR2_X86_CPU_HAS_SSSE3
-	select BR2_X86_CPU_HAS_SSE4
-	select BR2_X86_CPU_HAS_SSE42
-	select BR2_X86_CPU_HAS_AVX
-	select BR2_X86_CPU_HAS_AVX2
-	select BR2_X86_CPU_HAS_AVX512
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
 config BR2_x86_geode
-	bool "AMD Geode"
+	bool "geode"
+	# Don't include MMX support because there several variant of geode
+	# processor, some with MMX support, some without.
+	# See: http://en.wikipedia.org/wiki/Geode_%28processor%29
 	depends on !BR2_x86_64
-	select BR2_X86_CPU_HAS_MMX
-	select BR2_X86_CPU_HAS_3DNOW
 config BR2_x86_c3
 	bool "Via/Cyrix C3 (Samuel/Ezra cores)"
 	depends on !BR2_x86_64
@@ -716,16 +240,30 @@ config BR2_ARCH
 	default "i686"		if BR2_x86_c32
 	default "i586"		if BR2_x86_winchip_c6
 	default "i586"		if BR2_x86_winchip2
-	# We use the property of Kconfig that the first match of a
-	# list of default will be chosen. So the following entry will
-	# not match for all BR2_i386=y configurations, but only the
-	# ones that didn't match any of the previous cases (i486,
-	# i586).
-	default "i686"		if BR2_i386
-	default "x86_64"	if BR2_x86_64
-
-config BR2_NORMALIZED_ARCH
-	default "i386"		if !BR2_x86_64
+	default "i686"		if BR2_x86_i686
+	default "i686"		if BR2_x86_pentium2
+	default "i686"		if BR2_x86_pentium3
+	default "i686"		if BR2_x86_pentium4
+	default "i686"		if BR2_x86_pentium_m
+	default "i686"		if BR2_x86_pentiumpro
+	default "i686"		if BR2_x86_prescott
+	default "i686"		if BR2_x86_nocona && BR2_i386
+	default "i686"		if BR2_x86_core2 && BR2_i386
+	default "i686"		if BR2_x86_corei7 && BR2_i386
+	default "i686"		if BR2_x86_westmere && BR2_i386
+	default "i686"		if BR2_x86_corei7_avx && BR2_i386
+	default "i686"		if BR2_x86_core_avx2 && BR2_i386
+	default "i686"		if BR2_x86_atom && BR2_i386
+	default "i686"		if BR2_x86_silvermont && BR2_i386
+	default "i686"		if BR2_x86_opteron && BR2_i386
+	default "i686"		if BR2_x86_opteron_sse3 && BR2_i386
+	default "i686"		if BR2_x86_barcelona && BR2_i386
+	default "i686"		if BR2_x86_jaguar && BR2_i386
+	default "i686"		if BR2_x86_steamroller && BR2_i386
+	default "i686"		if BR2_x86_k6
+	default "i686"		if BR2_x86_k6_2
+	default "i686"		if BR2_x86_athlon
+	default "i686"		if BR2_x86_athlon_4
 	default "x86_64"	if BR2_x86_64

 config BR2_ENDIAN
@@ -743,55 +281,19 @@ config BR2_GCC_TARGET_ARCH
 	default "pentium3"	if BR2_x86_pentium3
 	default "pentium4"	if BR2_x86_pentium4
 	default "prescott"	if BR2_x86_prescott
-	default "x86-64"	if BR2_x86_x86_64
-	default "x86-64-v2"	if BR2_x86_x86_64_v2
-	default "x86-64-v3"	if BR2_x86_x86_64_v3
-	default "x86-64-v4"	if BR2_x86_x86_64_v4
 	default "nocona"	if BR2_x86_nocona
 	default "core2"		if BR2_x86_core2
 	default "corei7"	if BR2_x86_corei7
-	default "nehalem"	if BR2_x86_nehalem
 	default "corei7-avx"	if BR2_x86_corei7_avx
-	default "sandybridge"	if BR2_x86_sandybridge
-	default "ivybridge"	if BR2_x86_ivybridge
 	default "core-avx2"	if BR2_x86_core_avx2
-	default "haswell"	if BR2_x86_haswell
-	default "broadwell"	if BR2_x86_broadwell
-	default "skylake"	if BR2_x86_skylake
 	default "atom"		if BR2_x86_atom
-	default "bonnell"	if BR2_x86_bonnell
 	default "westmere"	if BR2_x86_westmere
 	default "silvermont"	if BR2_x86_silvermont
-	default "goldmont"	if BR2_x86_goldmont
-	default "goldmont-plus"	if BR2_x86_goldmont_plus
-	default "tremont"	if BR2_x86_tremont
-	default "sierraforest"	if BR2_x86_sierraforest
-	default "grandridge"	if BR2_x86_grandridge
-	default "skylake-avx512" if BR2_x86_skylake_avx512
-	default "cannonlake"	if BR2_x86_cannonlake
-	default "icelake-client" if BR2_x86_icelake_client
-	default "icelake-server" if BR2_x86_icelake_server
-	default "cascadelake"	if BR2_x86_cascadelake
-	default "cooperlake"	if BR2_x86_cooperlake
-	default "tigerlake"	if BR2_x86_tigerlake
-	default "sapphirerapids" if BR2_x86_sapphirerapids
-	default "alderlake"	if BR2_x86_alderlake
-	default "rocketlake"	if BR2_x86_rocketlake
-	default "graniterapids"	if BR2_x86_graniterapids
-	default "graniterapids-d"	if BR2_x86_graniterapids_d
 	default "k8"		if BR2_x86_opteron
 	default "k8-sse3"	if BR2_x86_opteron_sse3
 	default "barcelona"	if BR2_x86_barcelona
-	default "btver1"	if BR2_x86_bobcat
 	default "btver2"	if BR2_x86_jaguar
-	default "bdver1"	if BR2_x86_bulldozer
-	default "bdver2"	if BR2_x86_piledriver
 	default "bdver3"	if BR2_x86_steamroller
-	default "bdver4"	if BR2_x86_excavator
-	default "znver1"	if BR2_x86_zen
-	default "znver2"	if BR2_x86_zen2
-	default "znver3"	if BR2_x86_zen3
-	default "znver4"	if BR2_x86_zen4
 	default "k6"		if BR2_x86_k6
 	default "k6-2"		if BR2_x86_k6_2
 	default "athlon"	if BR2_x86_athlon
--- a/arch/Config.in.xtensa
+++ b/arch/Config.in.xtensa
@@ -5,10 +5,11 @@ choice

 config BR2_XTENSA_CUSTOM
 	bool "Custom Xtensa processor configuration"
+	select BR2_ARCH_HAS_MMU_OPTIONAL

 config BR2_xtensa_fsf
 	bool "fsf - Default configuration"
-	select BR2_USE_MMU
+	select BR2_ARCH_HAS_MMU_MANDATORY

 endchoice

@@ -40,15 +41,6 @@ config BR2_XTENSA_BIG_ENDIAN

 endchoice

-config BR2_XTENSA_USE_MMU
-	bool "MMU support"
-	default y
-	depends on BR2_XTENSA_CUSTOM
-	select BR2_USE_MMU
-	help
-	  Enable this option if your Xtensa core has a MMU (Memory
-	  Management Unit).
-
 config BR2_ENDIAN
 	default "LITTLE"	if BR2_XTENSA_LITTLE_ENDIAN
 	default "BIG"		if BR2_xtensa_fsf || BR2_XTENSA_BIG_ENDIAN
@@ -56,9 +48,6 @@ config BR2_ENDIAN
 config BR2_ARCH
 	default "xtensa"	if BR2_xtensa

-config BR2_NORMALIZED_ARCH
-	default "xtensa"
-
 config BR2_READELF_ARCH_NAME
 	default "Tensilica Xtensa Processor"

--- a/arch/arch.mk
+++ b/arch/arch.mk
@@ -16,19 +16,7 @@ GCC_TARGET_FP32_MODE := $(call qstrip,$(BR2_GCC_TARGET_FP32_MODE))
 GCC_TARGET_CPU := $(call qstrip,$(BR2_GCC_TARGET_CPU))
 GCC_TARGET_FPU := $(call qstrip,$(BR2_GCC_TARGET_FPU))
 GCC_TARGET_FLOAT_ABI := $(call qstrip,$(BR2_GCC_TARGET_FLOAT_ABI))
-GCC_TARGET_SIMD := $(call qstrip,$(BR2_GCC_TARGET_SIMD))
 GCC_TARGET_MODE := $(call qstrip,$(BR2_GCC_TARGET_MODE))

-# Explicitly set LD's "max-page-size" instead of relying on some defaults
-ifeq ($(BR2_ARC_PAGE_SIZE_4K)$(BR2_ARM64_PAGE_SIZE_4K),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096
-else ifeq ($(BR2_ARC_PAGE_SIZE_8K),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=8192 -Wl,-z,common-page-size=8192
-else ifeq ($(BR2_ARC_PAGE_SIZE_16K)$(BR2_ARM64_PAGE_SIZE_16K),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=16384 -Wl,-z,common-page-size=16384
-else ifeq ($(BR2_ARM64_PAGE_SIZE_64K),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=65536 -Wl,-z,common-page-size=65536
-endif
-
 # Include any architecture specific makefiles.
 -include $(sort $(wildcard arch/arch.mk.*))
--- a/arch/arch.mk.arc
+++ b/arch/arch.mk.arc
@@ -2,7 +2,16 @@ ifeq ($(BR2_arc),y)

 # -matomic is always required when the ARC core has the atomic extensions
 ifeq ($(BR2_ARC_ATOMIC_EXT),y)
-ARCH_TOOLCHAIN_WRAPPER_OPTS += -matomic
+ARCH_TOOLCHAIN_WRAPPER_OPTS = -matomic
+endif
+
+# Explicitly set LD's "max-page-size" instead of relying on some defaults
+ifeq ($(BR2_ARC_PAGE_SIZE_4K),y)
+ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=4096
+else ifeq ($(BR2_ARC_PAGE_SIZE_8K),y)
+ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=8192
+else ifeq ($(BR2_ARC_PAGE_SIZE_16K),y)
+ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=16384
 endif

 endif
--- a/arch/arch.mk.csky
+++ b/arch/arch.mk.csky
@@ -0,0 +1,26 @@
+#
+# Configure the GCC_TARGET_ARCH variable and append the
+# appropriate C-SKY ISA extensions.
+#
+
+ifeq ($(BR2_csky),y)
+
+ifeq ($(BR2_ck610),y)
+GCC_TARGET_CPU := ck610
+else ifeq ($(BR2_ck807),y)
+GCC_TARGET_CPU := ck807
+else ifeq ($(BR2_ck810),y)
+GCC_TARGET_CPU := ck810
+else ifeq ($(BR2_ck860),y)
+GCC_TARGET_CPU := ck860
+endif
+
+ifeq ($(BR2_CSKY_FPU),y)
+GCC_TARGET_CPU := $(GCC_TARGET_CPU)f
+endif
+
+ifeq ($(BR2_CSKY_VDSP),y)
+GCC_TARGET_CPU := $(GCC_TARGET_CPU)v
+endif
+
+endif
--- a/arch/arch.mk.hppa
+++ b/arch/arch.mk.hppa
@@ -1,13 +0,0 @@
-#
-# Configure the GCC_TARGET_ARCH variable.
-#
-
-ifeq ($(BR2_hppa),y)
-
-ifeq ($(BR2_parisc10),y)
-GCC_TARGET_ARCH := 1.0
-else ifeq ($(BR2_parisc11),y)
-GCC_TARGET_ARCH := 1.1
-endif
-
-endif
--- a/arch/arch.mk.riscv
+++ b/arch/arch.mk.riscv
@@ -26,22 +26,5 @@ endif
 ifeq ($(BR2_RISCV_ISA_RVC),y)
 GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)c
 endif
-ifeq ($(BR2_RISCV_ISA_RVV),y)
-GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)v
-endif
-
-# Starting from gcc 12.x, csr and fence instructions have been
-# separated from the base I instruction set, and special -march
-# suffixes are needed to enable their support. In Buildroot, we assume
-# all RISC-V cores that support Linux implement those instructions, so
-# we unconditionally enable those extensions.
-ifeq ($(BR2_TOOLCHAIN_GCC_AT_LEAST_12),y)
-GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)_zicsr_zifencei
-endif
-
-ARCH_RISV_ISA_EXTRA = $(call qstrip, $(BR2_RISCV_ISA_EXTRA))
-ifneq ($(ARCH_RISV_ISA_EXTRA),)
-GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)_$(ARCH_RISV_ISA_EXTRA)
-endif

 endif
--- a/arch/arch.mk.xtensa
+++ b/arch/arch.mk.xtensa
@@ -1,9 +1,3 @@
-BR_ARCH_XTENSA_OVERLAY_FILE = $(call qstrip,$(BR2_XTENSA_OVERLAY_FILE))
-
-ifeq ($(BR_BUILDING)$(BR2_XTENSA_CUSTOM)$(BR2_TOOLCHAIN_BUILDROOT):$(BR_ARCH_XTENSA_OVERLAY_FILE),yyy:)
-$(error No xtensa overlay file provided. Check your BR2_XTENSA_OVERLAY_FILE setting)
-endif
-
 ################################################################################
 # This variable can be used by packages that need to extract the overlay.
 #
@@ -15,6 +9,7 @@ endif
 #       tar xf $(ARCH_XTENSA_OVERLAY_FILE) -C $(@D) --strip-components=1 gcc
 #   endif
 ################################################################################
+BR_ARCH_XTENSA_OVERLAY_FILE = $(call qstrip,$(BR2_XTENSA_OVERLAY_FILE))
 ifneq ($(filter http://% https://% ftp://% scp://%,$(BR_ARCH_XTENSA_OVERLAY_FILE)),)
 ARCH_XTENSA_OVERLAY_URL = $(BR_ARCH_XTENSA_OVERLAY_FILE)
 ARCH_XTENSA_OVERLAY_FILE = $($(PKG)_DL_DIR)/$(notdir $(BR_ARCH_XTENSA_OVERLAY_FILE))
--- a/board/aarch64-efi/genimage-efi.cfg
+++ b/board/aarch64-efi/genimage-efi.cfg
@@ -1,30 +1,30 @@
 image efi-part.vfat {
-	vfat {
-		file EFI {
-			image = "efi-part/EFI"
-		}
-		file Image {
-			image = "Image"
-		}
-	}
-
-	size = 64M
+  vfat {
+    file startup.nsh {
+      image = "efi-part/startup.nsh"
+    }
+    file EFI {
+      image = "efi-part/EFI"
+    }
+    file Image {
+      image = "Image"
+    }
+  }
+  size = 32M
 }

 image disk.img {
-	hdimage {
-		partition-table-type = "gpt"
-	}

-	partition boot {
-		image = "efi-part.vfat"
-		partition-type-uuid = U
-		offset = 32K
-		bootable = true
-	}
+  hdimage {
+  }

-	partition root {
-		partition-type-uuid = root-arm64
-		image = "rootfs.ext2"
-	}
+  partition boot {
+    partition-type = 0xEF
+    image = "efi-part.vfat"
+  }
+
+  partition root {
+    partition-type = 0x83
+    image = "rootfs.ext2"
+  }
 }
--- a/board/aarch64-efi/grub.cfg
+++ b/board/aarch64-efi/grub.cfg
@@ -2,5 +2,5 @@ set default="0"
 set timeout="5"

 menuentry "Buildroot" {
-	linux /Image root=PARTLABEL=root rootwait
+	linux /Image root=/dev/vda2 rootwait console=ttyAMA0
 }
--- a/board/aarch64-efi/patches/linux/linux.hash
+++ b/board/aarch64-efi/patches/linux/linux.hash
@@ -1,2 +0,0 @@
-# From https://www.kernel.org/pub/linux/kernel/v6.x/sha256sums.asc
-sha256  8d1934a72a185f1be6b56e3ad8ea31fd9a381ffec0346c69f06c90d776da7cb8  linux-6.18.14.tar.xz
--- a/board/aarch64-efi/post-image.sh
+++ b/board/aarch64-efi/post-image.sh
@@ -1,5 +1,5 @@
 #!/bin/sh

-BOARD_DIR=$(dirname "$0")
+BOARD_DIR="$(dirname $0)"

-cp -f "${BOARD_DIR}/grub.cfg" "${BINARIES_DIR}/efi-part/EFI/BOOT/grub.cfg"
+cp -f ${BOARD_DIR}/grub.cfg ${BINARIES_DIR}/efi-part/EFI/BOOT/grub.cfg
--- a/board/aarch64-efi/readme.txt
+++ b/board/aarch64-efi/readme.txt
@@ -1,10 +1,6 @@

 The aarch64_efi_defconfig allows to build a minimal Linux system that
-can boot on all AArch64 servers providing an EFI firmware.
-
-This includes all Arm EBBR[1] compliant systems, and all Arm SystemReady[2]
-compliant systems for example.
-
+can boot on all AArch64 servers providing an EFI firmware and ACPI.

 Building and booting
 ====================
@@ -36,18 +32,3 @@ Note that </path/to/QEMU_EFI.fd> needs to point to a valid aarch64 UEFI
 firmware image for qemu.
 It may be provided by your distribution as a edk2-aarch64 or AAVMF
 package, in path such as /usr/share/edk2/aarch64/QEMU_EFI.fd .
-
-U-Boot based qemu firmware
-==========================
-
-A qemu firmware with support for UEFI based on U-Boot can be built following
-the instructions in [3], with qemu_arm64_defconfig.
-
-This should give you a nor_flash.bin, which you can use with qemu as an
-alternative to QEMU_EFI.fd. You will also need to change the machine
-specification to "-M virt,secure=on" on qemu command line, to enable TrustZone
-support, and you will need to increase the memory with "-m 1024".
-
-[1]: https://github.com/ARM-software/ebbr
-[2]: https://developer.arm.com/architectures/system-architectures/arm-systemready
-[3]: https://github.com/glikely/u-boot-tfa-build
--- a/board/acmesystems/acqua-a5/dts/microchip/at91-sama5d3_acqua.dts
+++ b/board/acmesystems/acqua-a5/dts/microchip/at91-sama5d3_acqua.dts
@@ -1,340 +0,0 @@
-/*
- * acme-acqua.dts - Device Tree file for Acqua A5 Board
- *
- *  Copyright (C) 2014 Atmel,
- *		  2014 Nicolas Ferre <nicolas.ferre@atmel.com>
- * 
- *	2022 Sergio Tanzilli <tanzilli@acmesystems.it>
- *
- * Licensed under GPLv2 or later.
- */
-/dts-v1/;
-#include "sama5d31.dtsi"
-
-/ {
-	model = "Acme Systems Acqua SOM";
-	compatible = "acme,acqua", "atmel,sama5d3", "atmel,sama5";
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-		bootargs = "mem=256M console=ttyS0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait net.ifnames=0";
-	};
-
-	memory {
-		reg = <0x20000000 0x10000000>;
-	};
-
-	clocks {
-		slow_xtal {
-			clock-frequency = <32768>;
-		};
-
-		main_xtal {
-			clock-frequency = <12000000>;
-		};
-	};
-
-	ahb {
-		apb {
-			hlcdc: hlcdc@f0030000 {
-				status = "disabled";
-				hlcdc-display-controller {
-					pinctrl-names = "default";
-					pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888_alt>;
-					port@0 {
-						hlcdc_panel_output: endpoint@0 {
-							remote-endpoint = <&panel_input>;
-						};
-					};
-				};
-			};
-		
-			/* MicroSD mounted on the SOM */
-		
-			mmc0: mmc@f0000000 {
-				pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
-				status = "okay";
-				slot@0 {
-					reg = <0>;
-					bus-width = <4>;
-				};
-			};
-  
-  			/* Optional MicroSD to mount on the carrier board */
-  
-			mmc1: mmc@f8000000 {
-				pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
-				status = "disabled";
-				slot@0 {
-					reg = <0>;
-					bus-width = <4>;
-					cd-gpios = <&pioE 1 GPIO_ACTIVE_LOW>;
-				};
-			};
-
-			spi0: spi@f0004000 {
-				cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
-				status = "disabled";
-			};
-
-			can0: can@f000c000 {
-				status = "disabled";
-			};
-
-			tcb0: timer@f0010000 {
-				timer0: timer@0 {
-					compatible = "atmel,tcb-timer";
-					reg = <0>;
-				};
-
-				timer1: timer@1 {
-					compatible = "atmel,tcb-timer";
-					reg = <1>;
-				};
-			};
-
-			i2c0: i2c@f0014000 {
-				pinctrl-0 = <&pinctrl_i2c0_pu>;
-				status = "disabled";
-			};
-
-			i2c1: i2c@f0018000 {
-				status = "disabled";
-			};
-
-			macb1: ethernet@f802c000 {
-				compatible = "atmel,sama5d3-macb", "cdns,at91sam9260-macb", "cdns,macb";
-				
-				status = "okay";
-				phy-mode = "rmii";
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				nvmem-cells = <&eth0_addr>;
-				nvmem-cell-names = "mac-address";
-
-                phy0: ethernet-phy@1 {
-                    interrupt-parent = <&pioE>;
-                    interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
-                    reg = <1>;
-                };
-
-				/*ethernet-phy@1 {
-					reg = <0x1>;
-				};*/
-			};
-
-			/* Bit banging internal I2C to manage the AT24MAC402 chip */
-
-			i2c3@ {
-				compatible = "i2c-gpio";
-
-				sda-gpios = <&pioE 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
-				scl-gpios = <&pioE 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 
-				
-				pinctrl-names = "default";
-				pinctrl-0 = <&pinctrl_i2c3_gpio>;
-				
-				i2c-gpio,delay-us = <4>; /* ~178 kHz */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				
-				/* EEPROM contains the eth0 MAC address */
-				
-				eeprom@58 {
-					compatible = "atmel,24mac402";
-					pagesize = <256>;
-					read-only;
-					reg = <0x58>;
-					#address-cells = <1>;
-					#size-cells = <1>;
-
-					nvmem-layout {
-						compatible = "fixed-layout";
-						#address-cells = <1>;
-						#size-cells = <1>;
-
-						eth0_addr: eth-mac-addr@9A {
-							reg = <0x0 0x06>;
-						};
-					};
-				};
-				
-			};
-
-			pwm0: pwm@f002c000 {
-				pinctrl-names = "default";
-				pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>;
-				status = "disabled";
-			};
-
-			usart0: serial@f001c000 {
-				status = "okay";
-			};
-
-			usart1: serial@f0020000 {
-				pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
-				status = "disabled";
-			};
-
-			uart0: serial@f0024000 {
-				status = "disabled";
-			};
-
-
-			spi1: spi@f8008000 {
-				cs-gpios = <&pioC 25 0>;
-				status = "disabled";
-			};
-
-			adc0: adc@f8018000 {
-				atmel,adc-vref = <3300>;
-				atmel,adc-channels-used = <0xfe>;
-				pinctrl-0 = <
-					&pinctrl_adc0_adtrg
-					&pinctrl_adc0_ad1
-					&pinctrl_adc0_ad2
-					&pinctrl_adc0_ad3
-					&pinctrl_adc0_ad4
-					&pinctrl_adc0_ad5
-					&pinctrl_adc0_ad6
-					&pinctrl_adc0_ad7
-					>;
-				status = "disabled";
-			};
-
-			i2c2: i2c@f801c000 {
-				dmas = <0>, <0>;	/* Do not use DMA for i2c2 */
-				pinctrl-0 = <&pinctrl_i2c2_pu>;
-				status = "disabled";
-			};
-
-
-			dbgu: serial@ffffee00 {
-				status = "okay";
-			};
-
-			pinctrl@fffff200 {
-
-				atmel,mux-mask = <
-					/*   A          B          C  */
-					0xffffffff 0xc0fc0000 0xc0ff0000	/* pioA */
-					0xffffffff 0x0ff8ffff 0x00000000	/* pioB */
-					0xffffffff 0xbc00f1ff 0x7c00fc00	/* pioC */
-					0xffffffff 0xc001c0e0 0x0001c1e0	/* pioD */
-					0xfffffff9 0xbf9f8000 0x18000000 	/* pioE */
-				/*	0xffffffff 0xb8000000 0x18000000 */	/* pioE */
-					>;
-
-				board {
-					pinctrl_i2c0_pu: i2c0_pu {
-						atmel,pins =
-							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
-							<AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
-					};
-
-					pinctrl_i2c2_pu: i2c2_pu {
-						atmel,pins =
-							<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
-							<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
-					};
-
-					pinctrl_i2c3_gpio: i2c3-gpio {
-						atmel,pins =
-							<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
-							 AT91_PIOE 2 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
-					};
-
-
-					pinctrl_key_gpio: key_gpio_0 {
-						atmel,pins =
-							<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
-					};
-
-					pinctrl_mmc0_cd: mmc0_cd {
-						atmel,pins =
-							<AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
-					};
-
-					pinctrl_mmc1_cd: mmc1_cd {
-						atmel,pins =
-							<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
-					};
-
-					pinctrl_usba_vbus: usba_vbus {
-						atmel,pins =
-							<AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;	/* PE9, conflicts with A9 */
-					};
-					
-					pinctrl_gpio_leds: gpio_leds_default {
-						atmel,pins =
-							<AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
-							 AT91_PIOE 4 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
-							 AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
-							 AT91_PIOE 6 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
-					};
-				};
-			};
-		};
-
-        usb0: gadget@500000 {
-            status = "disabled";
-        };
-
-        usb1: usb@600000 {
-            status = "okay";
-        };
-
-        usb2: usb@700000 {
-            status = "okay";
-        };
-		
-	};
-
-
-	panel: panel {
-		/* compatible = "acme,43inch", "simple-panel"; */
-		compatible = "acme,50inch", "simple-panel";
-		/* compatible = "acme,70inch", "simple-panel"; */
-		
-		status = "disable";
-
-		port@0 {
-			panel_input: endpoint@0 {
-				remote-endpoint = <&hlcdc_panel_output>;
-			};
-		};
-	};
-
- 
-	leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_gpio_leds>;
-
-		led0 {
-			label = "led0";
-			gpios = <&pioE 3 GPIO_ACTIVE_LOW>;
-			default-state = "off";
-		};
-
-		led1 {
-			label = "led1";
-			gpios = <&pioE 4 GPIO_ACTIVE_LOW>;
-			default-state = "off";
-		};
-
-		led2 {
-			label = "led2";
-			gpios = <&pioE 5 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "heartbeat";
-		};
-
-		led3 {
-			label = "led3";
-			gpios = <&pioE 6 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "mmc0";
-			default-state = "off";
-		};
-	};		
-};
--- a/board/acmesystems/acqua-a5/genimage.cfg
+++ b/board/acmesystems/acqua-a5/genimage.cfg
@@ -1,29 +0,0 @@
-# Minimal SD card image for the Acme Systems Acqua A5
-
-image boot.vfat {
-	vfat {
-		files = {
-			"boot.bin",
-			"zImage",
-			"at91-sama5d3_acqua.dtb"
-		}
-	}
-
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-	}
-}
--- a/board/acmesystems/acqua-a5/patches/at91bootstrap3/at91bootstrap3.hash
+++ b/board/acmesystems/acqua-a5/patches/at91bootstrap3/at91bootstrap3.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  5ea2a8fed1ba0024229c6f6d77176679e1b24791bdbce8e285634013d4a93551  at91bootstrap3-v3.10.3-git4.tar.gz
--- a/board/acmesystems/acqua-a5/patches/linux-headers/linux-headers.hash
+++ b/board/acmesystems/acqua-a5/patches/linux-headers/linux-headers.hash
@@ -1 +0,0 @@
-../linux/linux.hash
--- a/board/acmesystems/acqua-a5/patches/linux/linux.hash
+++ b/board/acmesystems/acqua-a5/patches/linux/linux.hash
@@ -1,2 +0,0 @@
-# From https://www.kernel.org/pub/linux/kernel/v6.x/sha256sums.asc
-sha256  37f0c5d5c242c1d604e87d48f08795e861a5a85f725b4ca11d0a538f12ff8cff  linux-6.18.8.tar.xz
--- a/board/acmesystems/acqua-a5/readme.txt
+++ b/board/acmesystems/acqua-a5/readme.txt
@@ -1,44 +0,0 @@
-Acme Systems Acqua A5
-
-Intro
-=====
-
-The Acqua A5 is a system on module based on the Microchip SAMA5D31 SoC:
-
-    https://www.acmesystems.it/acqua
-
-The files here support configurations that build a microSD image for a
-minimal system that can be accessed through the serial console. You will
-need an USB-to-serial interface in order to access that console from
-your computer:
-
-    https://www.acmesystems.it/DPI
-
-How to build the image
-======================
-
-If you have an Acqua module with 256 MiB of RAM, type:
-
-$ make acmesystems_acqua_a5_256mb_defconfig
-
-If you have the 512 MiB version, type instead:
-
-$ make acmesystems_acqua_a5_512mb_defconfig
-
-You can optionally tweak the configuration and add packages by typing:
-
-$ make menuconfig
-
-Then, proceed with the build:
-
-$ make
-
-How to write the microSD card
-=============================
-
-The system image is the file "sdcard.img" in the "output/images"
-directory. Write it to the card by invoking:
-
-$ sudo dd if=output/images/sdcard.img of=/dev/sdX bs=1M
-
-where `sdX' is the block device representing the microSD card.
--- a/board/acmesystems/aria-g25/genimage.cfg
+++ b/board/acmesystems/aria-g25/genimage.cfg
@@ -11,10 +11,9 @@ image boot.vfat {
 		}

 		file boot.bin {
-			image = "at91sam9x5_aria-sdcardboot-linux-zimage-dt-3.10.3.bin"
+			image = "at91sam9x5_aria-sdcardboot-linux-zimage-dt-3.8.13.bin"
 		}
 	}
-
 	size = 16M
 }

--- a/board/acmesystems/aria-g25/patches/at91bootstrap3/at91bootstrap3.hash
+++ b/board/acmesystems/aria-g25/patches/at91bootstrap3/at91bootstrap3.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  5ea2a8fed1ba0024229c6f6d77176679e1b24791bdbce8e285634013d4a93551  at91bootstrap3-v3.10.3-git4.tar.gz
--- a/board/acmesystems/aria-g25/patches/linux-headers/linux-headers.hash
+++ b/board/acmesystems/aria-g25/patches/linux-headers/linux-headers.hash
@@ -1 +0,0 @@
-../linux/linux.hash
--- a/board/acmesystems/aria-g25/patches/linux/linux.hash
+++ b/board/acmesystems/aria-g25/patches/linux/linux.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  6c5e4d3c87feadbfdb9f7d2e46f3f120b00286ba380491c5956708e0b94232c8  linux-4.19.315.tar.xz
--- a/board/acmesystems/arietta-g25/genimage.cfg
+++ b/board/acmesystems/arietta-g25/genimage.cfg
@@ -5,16 +5,15 @@ image boot.vfat {
 		file zImage {
 			image = "zImage"
 		}
-
+		
 		file acme-arietta.dtb {
 			image = "at91-ariettag25.dtb"
 		}
-
+		
 		file boot.bin {
-			image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.10.3.bin"
-		}
+			image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.8.13.bin"
+		} 
 	}
-
 	size = 16M
 }

--- a/board/acmesystems/arietta-g25/patches/at91bootstrap3/at91bootstrap3.hash
+++ b/board/acmesystems/arietta-g25/patches/at91bootstrap3/at91bootstrap3.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  5ea2a8fed1ba0024229c6f6d77176679e1b24791bdbce8e285634013d4a93551  at91bootstrap3-v3.10.3-git4.tar.gz
--- a/board/acmesystems/arietta-g25/patches/linux-headers/linux-headers.hash
+++ b/board/acmesystems/arietta-g25/patches/linux-headers/linux-headers.hash
@@ -1 +0,0 @@
-../linux/linux.hash
--- a/board/acmesystems/arietta-g25/patches/linux/linux.hash
+++ b/board/acmesystems/arietta-g25/patches/linux/linux.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  6c5e4d3c87feadbfdb9f7d2e46f3f120b00286ba380491c5956708e0b94232c8  linux-4.19.315.tar.xz
--- a/board/altera/socrates_cyclone5/boot-env.txt
+++ b/board/altera/socrates_cyclone5/boot-env.txt
@@ -0,0 +1,8 @@
+linux_load_address=0x100000
+linux_dtb_load_address=0x100
+linux_dtb=socfpga_cyclone5_socrates.dtb
+linux_load=mmc rescan; fatload mmc 0:1 ${linux_load_address} zImage; fatload mmc 0:1 ${linux_dtb_load_address} ${linux_dtb}
+bootargs=console=ttyS0,115200 root=/dev/mmcblk0p3 ro rootwait
+source_env=fatload mmc 0:1 0x2000000 boot.scr; source 0x2000000
+bootcmd=run linux_load; bootz ${linux_load_address} - ${linux_dtb_load_address}
+bootdelay=1
--- a/board/altera/socrates_cyclone5/genimage.cfg
+++ b/board/altera/socrates_cyclone5/genimage.cfg
@@ -0,0 +1,58 @@
+image boot.vfat {
+	vfat {
+		files = {
+			"zImage",
+			"socfpga_cyclone5_socrates.dtb"
+		}
+	}
+	size = 8M
+}
+
+image uboot.img {
+	hdimage {
+		partition-table = "no"
+	}
+
+	partition spl {
+		in-partition-table = "no"
+		image = "u-boot-spl.bin.crc"
+		offset = 0
+		size = 64k
+	}
+
+	partition uboot-full {
+		in-partition-table = "no"
+		image = "u-boot.img"
+		offset = 256k
+	}
+
+	size = 1M
+}
+
+image sdcard.img {
+	hdimage {
+	}
+
+	partition uboot-env {
+		in-partition-table = "no"
+		image = "uboot-env.bin"
+		offset = 17408 # 512 * 34 -> just after gpt
+	}
+
+	partition boot {
+		partition-type = 0xc
+		bootable = "true"
+		image = "boot.vfat"
+	}
+
+	partition uboot {
+		partition-type = 0xa2
+		image = "uboot.img"
+	}
+
+	partition rootfs {
+		partition-type = 0x83
+		image = "rootfs.ext2"
+		size = 500M
+	}
+}
--- a/board/altera/socrates_cyclone5/readme.txt
+++ b/board/altera/socrates_cyclone5/readme.txt
@@ -0,0 +1,52 @@
+EBV SoCrates Evaluation Board
+
+Intro
+=====
+
+More information about this board can be found here:
+https://rocketboards.org/foswiki/Documentation/EBVSoCratesEvaluationBoard
+
+Build
+=====
+
+First, load socrates config for buildroot
+
+    make socrates_cyclone5_defconfig
+
+Build everything
+
+    make
+
+Following files will be generated in output/images
+
+.
+├── boot.vfat
+├── rootfs.ext2
+├── rootfs.ext4 -> rootfs.ext2
+├── rootfs.tar
+├── sdcard.img
+├── socfpga_cyclone5_socrates.dtb
+├── u-boot-spl.bin
+├── u-boot-spl.bin.crc
+├── u-boot.bin
+├── u-boot.img
+├── uboot-env.bin
+├── uboot.img
+└── zImage
+
+
+Creating bootable SD card
+=========================
+
+Simply invoke
+
+dd if=output/images/sdcard.img of=/dev/sdX
+
+Where X is your SD card device (not partition)
+
+Booting
+=======
+
+Pins 6:8 on P18 selector is used to determine boot device. To boot socrates from
+sdcard set these pins to value 0x5 (101b). Remaining pins are used to determine
+how to configure FPGA and are not associated with booting into Linux kernel.
--- a/board/amarula/a64-relic/extlinux.conf
+++ b/board/amarula/a64-relic/extlinux.conf
@@ -0,0 +1,4 @@
+label linux-4.17.0-rc3
+  kernel /Image
+  devicetree /sun50i-a64-amarula-relic.dtb
+  append console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p4 rootwait
--- a/board/amarula/a64-relic/genimage.cfg
+++ b/board/amarula/a64-relic/genimage.cfg
@@ -0,0 +1,10 @@
+image boot.vfat {
+	vfat {
+		files = {
+			"Image",
+			"sun50i-a64-amarula-relic.dtb",
+			"extlinux"
+		}
+	}
+	size = 64M
+}
--- a/board/amarula/a64-relic/post-build.sh
+++ b/board/amarula/a64-relic/post-build.sh
@@ -0,0 +1,4 @@
+#!/bin/sh
+BOARD_DIR="$(dirname $0)"
+
+install -m 0644 -D $BOARD_DIR/extlinux.conf $BINARIES_DIR/extlinux/extlinux.conf
--- a/board/amarula/a64-relic/readme.txt
+++ b/board/amarula/a64-relic/readme.txt
@@ -0,0 +1,90 @@
+Amarula A64 Relic
+================
+
+Amarula A64-Relic is an Allwinner A64 based IoT device, which supports:
+- Allwinner A64 Cortex-A53
+- Mali-400MP2 GPU
+- AXP803 PMIC
+- 1GB DDR3 RAM
+- 8GB eMMC
+- AP6330 Wifi/BLE
+- MIPI-DSI
+- CSI: OV5640 sensor
+- USB OTG
+- 12V DC power supply
+
+Wiki link:
+https://openedev.amarulasolutions.com/display/ODWIKI/Amarual+A64-Relic
+
+Build
+=====
+
+  $ make amarula_a64_relic_defconfig
+
+  $ make
+
+build files at output/images/:
+  - sunxi-spl.bin
+  - u-boot.itb
+  - Image
+  - sun50i-a64-amarula-relic.dtb
+  - boot.vfat
+  - rootfs.ext4
+
+Write eMMC
+=========
+
+The board comes with an operating system preloaded on the eMMC.
+To replace it with the Buildroot-built system, take the following
+steps
+
+1. Connect the board UART with host and open minicom(ttyUSBx/115200N8)
+
+2. Supply 12V DC for power-on the board.
+
+3. Interrupt U-Boot by pressing enter
+
+4. Create GPT partitions
+  => mmc dev 1
+  => gpt write mmc 1 $partitions
+
+5. Connect the board USB-OTG with USB slot on the host.
+
+6. Initiate fastboot
+  => fastboot 0
+
+7. Write images from host onto eMMC using fastboot
+  $ cd output/images
+  $ sudo fastboot -i 0x1f3a flash loader1 sunxi-spl.bin
+  $ sudo fastboot -i 0x1f3a flash loader2 u-boot.itb
+  $ sudo fastboot -i 0x1f3a flash esp boot.vfat
+  $ sudo fastboot -i 0x1f3a flash system rootfs.ext4
+
+Update eMMC during Development
+==============================
+
+During development, reflashing the entire filesystem image at every
+change is time consuming. A useful alternative is to directly access
+over USB the filesystem stored on the eMMC, using the USB Mass Storage
+capability of U-Boot. To achieve this:
+
+1. Build U-Boot by enabling UMS
+   $ make uboot-menuconfig
+   (select CONFIG_CMD_USB_MASS_STORAGE=y)
+
+2. Follow all 6 steps from 'Write eMMC' and mount eMMC on host
+    => mmc dev 1
+    => ums 0 mmc 1
+
+WiFi
+====
+
+ # wpa_passphrase ACCESSPOINTNAME >> /etc/wpa_supplicant.conf
+   (type password and enter)
+ # wpa_supplicant -i wlan0 -c /etc/wpa_supplicant.conf -B
+ # udhcpc -i wlan0
+ # ping google.com
+
+--
+Jagan Teki <jagan@amarulasolutions.com>
+29-Jun-2018
--- a/board/amarula/a64-relic/rootfs_overlay/lib/firmware/brcm/brcmfmac4330-sdio.txt
+++ b/board/amarula/a64-relic/rootfs_overlay/lib/firmware/brcm/brcmfmac4330-sdio.txt
@@ -0,0 +1,83 @@
+#AP6330_NVRAM_V1.0_20121130
+#Sample variables file for BCM94330 SD FC AGB board
+manfid=0x2d0
+prodid=0x0547
+vendid=0x14e4
+devid=0x4360
+boardtype=0x05e1
+boardrev=0x1202
+boardflags=0x0080200
+nocrc=1
+xtalfreq=26000
+boardnum=22
+macaddr=00:90:4c:c5:12:38
+ag0=254
+aa2g=1
+ccode=ALL
+pa0itssit=0x20
+pa0b0=5587
+pa0b1=-633
+pa0b2=-158
+rssismf2g=0xa
+rssismc2g=0x3
+rssisav2g=0x7
+#rssi params for 5GHz
+rssismf5g=0x4
+rssismc5g=0x3
+rssisav5g=0x7
+#PA parameters for lower a-band
+pa1lob0=4748
+pa1lob1=-566
+pa1lob2=-180
+#PA parameters for midband
+pa1b0=4762
+pa1b1=-593
+pa1b2=-172
+#PA parameters for high band
+#pa1hib0=4596
+pa1hib0=4666
+pa1hib1=-619
+pa1hib2=-163
+rxpo5g=0
+maxp2ga0=74
+maxp5ga0=66
+maxp5gla0=66
+maxp5gha0=66
+# 2.4G Tx Power offsets
+cck2gpo=0x2222
+ofdm2gpo=0x44444444
+mcs2gpo0=0x6666
+mcs2gpo1=0x6666
+# 5G Tx Power offsets
+ofdm5gpo=0x44444444
+ofdm5glpo=0x44444444
+ofdm5ghpo=0x44444444
+mcs5gpo0=0x6666
+mcs5gpo1=0x6666
+mcs5glpo0=0x6666
+mcs5glpo1=0x6666
+mcs5ghpo0=0x6666
+mcs5ghpo1=0x6666
+sromrev=3
+il0macaddr=00:90:4c:c5:12:38
+wl0id=0x431b
+cckPwrOffset=4
+swctrlmap_2g=0x44844484,0x42824282,0x40804484,0x18282,0x1ff
+triso5g=0
+swctrlmap_5g=0x00100010,0x20202020,0x20202020,0x14202,0x0f0
+rfreg033=0x19
+rfreg033_cck=0x1f
+dacrate2g=160
+dacrate5g=160
+txalpfbyp2g=1
+bphyscale=17
+cckPwrIdxCorr=-15
+pacalidx2g=50
+#pacalidx5g=20
+noise_cal_ref_2g=53
+noise_cal_po_2g=0
+noise_cal_ref_5g=52
+noise_cal_po_5g=5,0,0
+# 4330 OOB parameter: High level trigger
+muxenab=0x10
+
--- a/board/amarula/vyasa/patches/linux-headers/linux-headers.hash
+++ b/board/amarula/vyasa/patches/linux-headers/linux-headers.hash
@@ -1 +0,0 @@
-../linux/linux.hash
--- a/board/amarula/vyasa/patches/linux/linux.hash
+++ b/board/amarula/vyasa/patches/linux/linux.hash
@@ -1,2 +0,0 @@
-# From https://www.kernel.org/pub/linux/kernel/v6.x/sha256sums.asc
-sha256  37f0c5d5c242c1d604e87d48f08795e861a5a85f725b4ca11d0a538f12ff8cff  linux-6.18.8.tar.xz
--- a/board/amarula/vyasa/patches/uboot/0001-include-configs-Increase-CONFIG_SYS_BOOTM_LEN-to-16M.patch
+++ b/board/amarula/vyasa/patches/uboot/0001-include-configs-Increase-CONFIG_SYS_BOOTM_LEN-to-16M.patch
@@ -0,0 +1,35 @@
+From 8ee2b03039cccf64402a72dea2185d7fe1972729 Mon Sep 17 00:00:00 2001
+From: Shyam Saini <shyam.saini@amarulasolutions.com>
+Date: Mon, 15 Apr 2019 16:16:16 +0530
+Subject: [PATCH] include: configs: Increase CONFIG_SYS_BOOTM_LEN to 16MB
+
+The default value of CONFIG_SYS_BOOTM_LEN is 0x800000 i.e, 8MB which
+causes board reset because of larger uImage size.
+
+Error log snippet:
+   Booting using the fdt blob at 0x1f00000
+   Loading Kernel Image ... Image too large: increase CONFIG_SYS_BOOTM_LEN
+Must RESET board to recover
+resetting ...
+
+Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
+---
+ include/configs/rk3288_common.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
+index 72a54bc0ab..eab7cf4d86 100644
+--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
+@@ -9,6 +9,8 @@
+ #include <asm/arch/hardware.h>
+ #include "rockchip-common.h"
+ 
+#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* 16MB */
+
+ #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+ #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+ #define CONFIG_SYS_CBSIZE		1024
+-- 
+2.11.0
+
--- a/board/amarula/vyasa/patches/uboot/uboot.hash
+++ b/board/amarula/vyasa/patches/uboot/uboot.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  b60d5865cefdbc75da8da4156c56c458e00de75a49b80c1a2e58a96e30ad0d54  u-boot-2026.01.tar.bz2
--- a/board/andes/ae350/genimage_sdcard.cfg
+++ b/board/andes/ae350/genimage_sdcard.cfg
@@ -1,26 +0,0 @@
-image boot.vfat {
-	vfat {
-		files = {
-			"u-boot-spl.bin",
-			"u-boot.itb",
-			"ae350_ax45mp.dtb",
-		}
-	}
-	size = 2M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition boot {
-		partition-type = 0xC
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		bootable = true
-		image = "rootfs.ext4"
-	}
-}
--- a/board/andes/ae350/patches/linux-headers/linux-headers.hash
+++ b/board/andes/ae350/patches/linux-headers/linux-headers.hash
@@ -1 +0,0 @@
-../linux/linux.hash
--- a/board/andes/ae350/patches/linux/linux.hash
+++ b/board/andes/ae350/patches/linux/linux.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  c71af3d2c86c0a0deca4f54b51d1c35217082b030052cc3513dc42e852652733  linux-v6.0.y-andes.tar.gz
--- a/board/andes/ae350/patches/opensbi/opensbi.hash
+++ b/board/andes/ae350/patches/opensbi/opensbi.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  d11702103f177a2914e94eec57ce5ed820296d874f6b6525c4482e55d71a3667  opensbi-1.6.tar.gz
--- a/board/andes/ae350/patches/uboot/uboot.hash
+++ b/board/andes/ae350/patches/uboot/uboot.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  0f933f6c5a426895bf306e93e6ac53c60870e4b54cda56d95211bec99e63bec7  u-boot-2025.07.tar.bz2
--- a/board/andes/ae350/post-build.sh
+++ b/board/andes/ae350/post-build.sh
@@ -1,3 +0,0 @@
-#!/bin/sh
-cp "$BINARIES_DIR"/Image "$TARGET_DIR"/boot
-cp "$BINARIES_DIR"/ae350_ax45mp.dtb "$TARGET_DIR"/boot
--- a/board/andes/ae350/readme.txt
+++ b/board/andes/ae350/readme.txt
@@ -1,106 +0,0 @@
-Intro
-=====
-
-Andestech AE350 Platform
-
-The AE350 prototype demonstrates the AE350 platform on the FPGA.
-
-How to build it
-===============
-
-Configure Buildroot
-------------------
-
-  $ make andes_ae350_45_defconfig
-
-If you want to customize your configuration:
-
-  $ make menuconfig
-
-Build everything
----------------
-Note: you will need to access to the network, since Buildroot will
-download the packages' sources.
-
-  $ make
-
-Result of the build
-------------------
-
-After building, you should obtain the following files:
-
-  output/images/
-  |-- ae350_ax45mp.dtb
-  |-- boot.vfat
-  |-- fw_dynamic.bin
-  |-- fw_dynamic.elf
-  |-- Image
-  |-- rootfs.ext2
-  |-- rootfs.ext4 -> rootfs.ext2
-  |-- sdcard.img
-  |-- u-boot-spl.bin
-  `-- u-boot.itb
-
-How to update the bootloader and device-tree
-============================================
-
-To update the bootloader and device tree, make sure you have
-an ICEman (Andes OpenOCD [1]) and AICE [2] connection set up
-as below:
-
-  Local Host                 Local/Remote Host
- .-----------------.          .--------------.
- | buildroot images|          |              |
- |                 |         ICEman host <IP:PORT>
- | .----------.    |          |  .--------.  |
- | | SPI_burn |<---+--socket--+->| ICEman |  |
- | '----------'    |          |  '--.-----'  |
- '-----------------'          '-----|--------'
-                                    |
-                                    USB
-   .--------------.                 |
-   | target       |           .-----v-----.
-   | board        <----JTAG---| AICE      |
-   |              |           '-----------'
-   '--------------'
-
-[1] https://github.com/andestech/ICEman
-[2] https://www.andestech.com/en/products-solutions/andeshape-platforms/aice-micro/
-
-The Andes SPI_burn tool will be located in output/host/bin. Use
-the following commands to update the bootloader and device tree:
-
-  $ SPI_burn --host $ICE_IP --port $ICE_BURNER_PORT --addr 0x0     -i u-boot-spl.bin
-  $ SPI_burn --host $ICE_IP --port $ICE_BURNER_PORT --addr 0x10000 -i u-boot.itb
-  $ SPI_burn --host $ICE_IP --port $ICE_BURNER_PORT --addr 0xf0000 -i ae350_ax45mp.dtb
-
-Note that the --addr option specifies the offset starting from
-the flash base address 0x80000000 and set by U-Boot configurations.
-e.g.
-u-boot-spl.bin  : CONFIG_SPL_TEXT_BASE=0x80000000
-u-boot.itb      : CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
-ae350_ax45mp.dtb: CONFIG_SYS_FDT_BASE=0x800f0000
-
-How to write the SD card
-========================
-
-Copy the sdcard.img to a SD card with "dd":
-
-  $ sudo dd if=sdcard.img of=/dev/sdX bs=4096
-  $ sudo sync
-
-Your SD card partition should be:
-
-  Disk /dev/sdb: 14.48 GiB, 15552479232 bytes, 30375936 sectors
-  Disk model: Multi-Card
-  Units: sectors of 1 * 512 = 512 bytes
-  Sector size (logical/physical): 512 bytes / 512 bytes
-  I/O size (minimum/optimal): 512 bytes / 512 bytes
-  Disklabel type: dos
-  Disk identifier: 0x00000000
-
-  Device     Boot Start    End Sectors Size Id Type
-  /dev/sdb1           1   4096    4096   2M  c W95 FAT32 (LBA)
-  /dev/sdb2  *     4097 126976  122880  60M 83 Linux
-
-Insert SD card and reset the board, it should boot Linux from mmc.
--- a/board/andes/ae350/rootfs_overlay/boot/extlinux/extlinux.conf
+++ b/board/andes/ae350/rootfs_overlay/boot/extlinux/extlinux.conf
@@ -1,4 +0,0 @@
-label linux
-   kernel /boot/Image
-   fdt /boot/ae350_ax45mp.dtb
-   append earlycon=sbi root=/dev/mmcblk0p2 rootwait
--- a/board/andes/ae350/uboot.config.fragment
+++ b/board/andes/ae350/uboot.config.fragment
@@ -1,6 +0,0 @@
-CONFIG_SPL_FS_FAT=y
-CONFIG_SPL_MMC=y
-CONFIG_SPL_OPENSBI_LOAD_ADDR=0x0
-CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
-CONFIG_DISPLAY_CPUINFO=y
-CONFIG_DISPLAY_BOARDINFO=y
--- a/board/andes/ae3xx/ae3xx.fragment
+++ b/board/andes/ae3xx/ae3xx.fragment
@@ -0,0 +1 @@
+CONFIG_NDS32_BUILTIN_DTB="ae3xx"
--- a/board/andes/patches/linux/0001-nds32-Fix-boot-messages-garbled.patch
+++ b/board/andes/patches/linux/0001-nds32-Fix-boot-messages-garbled.patch
@@ -0,0 +1,28 @@
+From 90d52d180dcc5d1300dc352ca709eb6453894143 Mon Sep 17 00:00:00 2001
+From: Nylon Chen <nylon7@andestech.com>
+Date: Wed, 28 Nov 2018 16:26:46 +0800
+Subject: [PATCH] nds32: Fix boot messages garbled
+
+In order to display uart correctly we have to pass the correct setting of uart to kernel by bootarg.
+This patch will provide such settings to set the correct uart baud rate.
+
+Signed-off-by: Nylon Chen <nylon7@andestech.com>
+---
+ arch/nds32/boot/dts/ae3xx.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/nds32/boot/dts/ae3xx.dts b/arch/nds32/boot/dts/ae3xx.dts
+index bb39749a6673..aefe2090926a 100644
+--- a/arch/nds32/boot/dts/ae3xx.dts
+++ b/arch/nds32/boot/dts/ae3xx.dts
+@@ -6,6 +6,7 @@
+ 	interrupt-parent = <&intc>;
+ 
+ 	chosen {
+		bootargs = "memblock=debug earlycon console=ttyS0,38400n8 debug loglevel=7";
+ 		stdout-path = &serial0;
+ 	};
+ 
+-- 
+2.18.0
+
--- a/board/andes/readme.txt
+++ b/board/andes/readme.txt
@@ -0,0 +1,49 @@
+Intro
+=====
+
+Andestech(nds32) AE3XX Platform
+
+The AE3XX prototype demonstrates the AE3XX example platform on the FPGA. 
+It is composed of one Andestech(nds32) processor and AE3XX.
+
+How to build it
+===============
+
+Configure Buildroot
+-------------------
+
+The andes_ae3xx_defconfig configuration is a sample configuration with
+all that is required to bring the FPGA Development Board:
+
+  $ make andes_ae3xx_defconfig
+
+Build everything
+----------------
+Note: you will need to have access to the network, since Buildroot will
+download the packages' sources.
+
+  $ make
+
+Result of the build
+-------------------
+
+After building, you should obtain this tree:
+
+output/images/
+    +-- vmlinux
+    +-- rootfs.cpio
+    +-- rootfs.tar
+
+How to run it
+=============
+
+Run
+---
+
+  Setup the Console with the rate 38400/8-N-1.
+
+  $ cd output/images
+  $ ../host/bin/nds32le-linux-gdb vmlinux
+  $ target remote [your host]
+  $ lo
+  $ c 
--- a/board/arcturus/aarch64-ucls1012a/post-build.sh
+++ b/board/arcturus/aarch64-ucls1012a/post-build.sh
@@ -1,4 +1,5 @@
 #!/bin/sh

 mkdir -p ${TARGET_DIR}/lib/firmware
+cp -f ${BUILD_DIR}/linux-custom/firmware/ppfe/* ${TARGET_DIR}/lib/firmware/
 cp -f ${BUILD_DIR}/linux-custom/br2-ucls1012a.its ${BINARIES_DIR}/
--- a/board/arcturus/aarch64-ucls1012a/readme.txt
+++ b/board/arcturus/aarch64-ucls1012a/readme.txt
@@ -24,13 +24,13 @@ After building, you should obtain this tree:

    output/images/
    +-- arc-ucls1012a.dtb
-    +-- Image.gz
+    +-- Image
    +-- part0-000000.itb
    +-- rootfs.cpio
    +-- rootfs.cpio.gz
    +-- rootfs.tar
    +-- u-boot.bin
-    +-- br2-ucls1012a.its
+    +-- ucls1012a.its

 Flashing
 --------
--- a/board/arcturus/aarch64-ucls1012a/rootfs_overlay/etc/init.d/S09modload
+++ b/board/arcturus/aarch64-ucls1012a/rootfs_overlay/etc/init.d/S09modload
@@ -0,0 +1,14 @@
+#!/bin/sh
+#
+case "$1" in
+       start)
+                modprobe pfe
+                ;;
+        stop)
+                ;;
+        restart|reload)
+                ;;
+        *)
+                echo "Usage: $0 {start|stop|restart}"
+                exit 1
+esac
--- a/board/arm/foundation-v8/patches/linux-headers/linux-headers.hash
+++ b/board/arm/foundation-v8/patches/linux-headers/linux-headers.hash
@@ -1 +0,0 @@
-../linux/linux.hash
--- a/board/arm/foundation-v8/patches/linux/linux.hash
+++ b/board/arm/foundation-v8/patches/linux/linux.hash
@@ -1,2 +0,0 @@
-# From https://cdn.kernel.org/pub/linux/kernel/v6.x/sha256sums.asc
-sha256  3507dd105b0a0e1101bd43d294472fccf853429a259a5fa7c67467bba318f8e9  linux-6.15.7.tar.xz
--- a/board/arm/foundation-v8/readme.txt
+++ b/board/arm/foundation-v8/readme.txt
@@ -1,39 +1,16 @@
-Introduction
-============
-
 This is the support for the ARM Foundation v8 machine emulated by the
 ARM software simulator of the AArch64 architecture.

-Building
-========
+First, one has to download the AArch64 software simulator from:

-  $ make arm_foundationv8_defconfig
-  $ make
+  https://silver.arm.com/download/download.tm?pv=4807186

-Generated files under output/images:
-
-* linux-system.axf: An image comprising the boot-wrapper-aarch64 minimal
-                    firmware and bootloader, a Devicetree and the Linux kernel.
-* rootfs.ext2:      The OS root filesystem.
-
-Running on the simulator
-========================
-
-Download the AArch64 software simulator from one of the following sources,
-corresponding to your host computer:
-
- https://developer.arm.com/-/cdn-downloads/permalink/FVPs-Architecture/FM-11.29/Foundation_Platform_11.29_27_Linux64.tgz
- https://developer.arm.com/-/cdn-downloads/permalink/FVPs-Architecture/FM-11.29/Foundation_Platform_11.29_27_Linux64_armv8l.tgz
-
-The model will be located under one of the corresponding folders:
-
- Foundation_Platformpkg/models/Linux64_GCC-9.3
- Foundation_Platformpkg/models/Linux64_armv8l_GCC-9.3
+Then, use the arm_foundationv8_defconfig configuration to build your
+Buildroot system.

 Finally, boot your system with:

- Foundation_Platform \
-    --arm-v8.0 \
+ ${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/models/Linux64_GCC-6.4/Foundation_Platform \
    --image output/images/linux-system.axf \
    --block-device output/images/rootfs.ext2 \
    --network=nat \
--- a/board/arm/fvp-ebbr/fvp-config.txt
+++ b/board/arm/fvp-ebbr/fvp-config.txt
@@ -1,19 +0,0 @@
-# Arm A-Profile Base RevC AEM FVP config
-bp.secure_memory=1
-bp.terminal_1.start_telnet=0
-bp.ve_sysregs.exit_on_shutdown=1
-bp.virtio_net.enabled=1
-bp.virtio_net.hostbridge.userNetworking=1
-bp.vis.rate_limit-enable=1
-cache_state_modelled=0
-cluster0.NUM_CORES=4
-cluster0.cpu0.enable_crc32=1
-cluster0.cpu1.enable_crc32=1
-cluster0.cpu2.enable_crc32=1
-cluster0.cpu3.enable_crc32=1
-cluster1.NUM_CORES=4
-cluster1.cpu0.enable_crc32=1
-cluster1.cpu1.enable_crc32=1
-cluster1.cpu2.enable_crc32=1
-cluster1.cpu3.enable_crc32=1
-pctl.startup=0.0.0.0
--- a/board/arm/fvp-ebbr/fvp-ebbr.dts
+++ b/board/arm/fvp-ebbr/fvp-ebbr.dts
@@ -1,18 +0,0 @@
-/*
- * Copyright (c) 2024, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include "fvp-base-gicv3-psci-1t.dts"
-
-/* The TF-A Devicetree does not have the OP-TEE node; let's add it. */
-
-/ {
-	firmware {
-		optee {
-			compatible = "linaro,optee-tz";
-			method = "smc";
-		};
-	};
-};
--- a/board/arm/fvp-ebbr/genimage.cfg
+++ b/board/arm/fvp-ebbr/genimage.cfg
@@ -1,31 +0,0 @@
-image efi-part.vfat {
-	vfat {
-		file EFI {
-			image = "efi-part/EFI"
-		}
-
-		file Image {
-			image = "Image"
-		}
-	}
-
-	size = 128M
-}
-
-image disk.img {
-	hdimage {
-		partition-table-type = "gpt"
-	}
-
-	partition boot {
-		image = "efi-part.vfat"
-		partition-type-uuid = U
-		offset = 32K
-		bootable = true
-	}
-
-	partition root {
-		partition-type-uuid = b921b045-1df0-41c3-af44-4c6f280d3fae
-		image = "rootfs.ext2"
-	}
-}
--- a/board/arm/fvp-ebbr/grub.cfg
+++ b/board/arm/fvp-ebbr/grub.cfg
@@ -1,6 +0,0 @@
-set default="0"
-set timeout="5"
-
-menuentry "Buildroot" {
-	linux /Image root=PARTLABEL=root rootwait
-}
--- a/board/arm/fvp-ebbr/patches/arm-trusted-firmware/arm-trusted-firmware.hash
+++ b/board/arm/fvp-ebbr/patches/arm-trusted-firmware/arm-trusted-firmware.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  a899100d9d92ceb1290fd4d61f5dd3b8af6b0e937cebc3c711cb514ac5acfaed  arm-trusted-firmware-v2.14.0-git4.tar.gz
--- a/board/arm/fvp-ebbr/patches/linux-headers/linux-headers.hash
+++ b/board/arm/fvp-ebbr/patches/linux-headers/linux-headers.hash
@@ -1 +0,0 @@
-../linux/linux.hash
--- a/board/arm/fvp-ebbr/patches/linux/linux.hash
+++ b/board/arm/fvp-ebbr/patches/linux/linux.hash
@@ -1,2 +0,0 @@
-# From https://cdn.kernel.org/pub/linux/kernel/v6.x/sha256sums.asc
-sha256  9106a4605da9e31ff17659d958782b815f9591ab308d03b0ee21aad6c7dced4b  linux-6.18.tar.xz
--- a/board/arm/fvp-ebbr/patches/optee-client/optee-client.hash
+++ b/board/arm/fvp-ebbr/patches/optee-client/optee-client.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  464b3bf5bc4a61830357dbf81a0e5b89414d3bca1c2a752570cb0e40d2f1e637  optee-client-4.8.0.tar.gz
--- a/board/arm/fvp-ebbr/patches/optee-os/0001-plat-vexpress-redirect-console-to-uart0.patch
+++ b/board/arm/fvp-ebbr/patches/optee-os/0001-plat-vexpress-redirect-console-to-uart0.patch
@@ -1,34 +0,0 @@
-From 1debd0c8bd46255f8c22b128ec16586ef9154869 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Vincent=20Stehl=C3=A9?= <vincent.stehle@arm.com>
-Date: Tue, 2 Dec 2025 15:53:23 +0100
-Subject: [PATCH] plat-vexpress: redirect console to uart0
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-For consistency with TF-A, U-Boot and Linux.
-
-Upstream: Not applicable. Buildroot specific.
-Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
---
- core/arch/arm/plat-vexpress/platform_config.h | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/core/arch/arm/plat-vexpress/platform_config.h b/core/arch/arm/plat-vexpress/platform_config.h
-index 9231f3048..76c7fdb36 100644
--- a/core/arch/arm/plat-vexpress/platform_config.h
-+++ b/core/arch/arm/plat-vexpress/platform_config.h
-@@ -23,8 +23,8 @@
- 
- #define IT_UART1		38
- 
-#define CONSOLE_UART_BASE	UART1_BASE
-#define IT_CONSOLE_UART		IT_UART1
-+#define CONSOLE_UART_BASE	UART0_BASE
-+#undef IT_CONSOLE_UART
- 
- #elif defined(PLATFORM_FLAVOR_juno)
- 
-- 
-2.51.0
-
--- a/board/arm/fvp-ebbr/patches/optee-os/optee-os.hash
+++ b/board/arm/fvp-ebbr/patches/optee-os/optee-os.hash
@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  5222cd553f5edb69ae4ec7cb99b2bfec2c47a47c0be1865b49744701918e8b4d  optee-os-4.8.0.tar.gz
--- a/Show More
+++ b/Show More