Compare commits
6 Commits
| Author | SHA1 | Date | |
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8d73aa4e51 | ||
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b95825e626 | ||
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4e3dd2f881 | ||
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54d318a27f |
@@ -1,8 +0,0 @@
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# Configuration for the `b4` tool
|
||||
# See https://b4.docs.kernel.org/en/latest/config.html
|
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[b4]
|
||||
send-series-to = buildroot@buildroot.org
|
||||
send-auto-cc-cmd = "./utils/get-developers -e -"
|
||||
prep-perpatch-check-cmd = "./utils/check-package -q -p -"
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||||
|
||||
# vim: set filetype=gitconfig:
|
||||
1079
.checkpackageignore
1079
.checkpackageignore
File diff suppressed because it is too large
Load Diff
567
.clang-format
567
.clang-format
@@ -1,567 +0,0 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
#
|
||||
# clang-format configuration file. Intended for clang-format >= 4.
|
||||
#
|
||||
# For more information, see:
|
||||
#
|
||||
# Documentation/process/clang-format.rst
|
||||
# https://clang.llvm.org/docs/ClangFormat.html
|
||||
# https://clang.llvm.org/docs/ClangFormatStyleOptions.html
|
||||
#
|
||||
|
||||
# Buildroot: imported from Linux 5.15.6, with minimal modifications.
|
||||
# Please note, this is not enforced at the moment. Intended
|
||||
# as an aid when working with in-tree C files, like
|
||||
# makedevs.c
|
||||
#
|
||||
---
|
||||
AccessModifierOffset: -4
|
||||
AlignAfterOpenBracket: Align
|
||||
AlignConsecutiveAssignments: false
|
||||
AlignConsecutiveDeclarations: false
|
||||
#AlignEscapedNewlines: Left # Unknown to clang-format-4.0
|
||||
AlignOperands: true
|
||||
AlignTrailingComments: false
|
||||
AllowAllParametersOfDeclarationOnNextLine: false
|
||||
AllowShortBlocksOnASingleLine: false
|
||||
AllowShortCaseLabelsOnASingleLine: false
|
||||
AllowShortFunctionsOnASingleLine: None
|
||||
AllowShortIfStatementsOnASingleLine: false
|
||||
AllowShortLoopsOnASingleLine: false
|
||||
AlwaysBreakAfterDefinitionReturnType: None
|
||||
AlwaysBreakAfterReturnType: None
|
||||
AlwaysBreakBeforeMultilineStrings: false
|
||||
AlwaysBreakTemplateDeclarations: false
|
||||
BinPackArguments: true
|
||||
BinPackParameters: true
|
||||
BraceWrapping:
|
||||
AfterClass: false
|
||||
AfterControlStatement: false
|
||||
AfterEnum: false
|
||||
AfterFunction: true
|
||||
AfterNamespace: true
|
||||
AfterObjCDeclaration: false
|
||||
AfterStruct: false
|
||||
AfterUnion: false
|
||||
#AfterExternBlock: false # Unknown to clang-format-5.0
|
||||
BeforeCatch: false
|
||||
BeforeElse: false
|
||||
IndentBraces: false
|
||||
#SplitEmptyFunction: true # Unknown to clang-format-4.0
|
||||
#SplitEmptyRecord: true # Unknown to clang-format-4.0
|
||||
#SplitEmptyNamespace: true # Unknown to clang-format-4.0
|
||||
BreakBeforeBinaryOperators: None
|
||||
BreakBeforeBraces: Custom
|
||||
#BreakBeforeInheritanceComma: false # Unknown to clang-format-4.0
|
||||
BreakBeforeTernaryOperators: false
|
||||
BreakConstructorInitializersBeforeComma: false
|
||||
#BreakConstructorInitializers: BeforeComma # Unknown to clang-format-4.0
|
||||
BreakAfterJavaFieldAnnotations: false
|
||||
BreakStringLiterals: false
|
||||
ColumnLimit: 132 # Specially for Buildroot
|
||||
CommentPragmas: '^ IWYU pragma:'
|
||||
#CompactNamespaces: false # Unknown to clang-format-4.0
|
||||
ConstructorInitializerAllOnOneLineOrOnePerLine: false
|
||||
ConstructorInitializerIndentWidth: 8
|
||||
ContinuationIndentWidth: 8
|
||||
Cpp11BracedListStyle: false
|
||||
DerivePointerAlignment: false
|
||||
DisableFormat: false
|
||||
ExperimentalAutoDetectBinPacking: false
|
||||
#FixNamespaceComments: false # Unknown to clang-format-4.0
|
||||
|
||||
# Taken from:
|
||||
# git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ \
|
||||
# | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$, - '\1'," \
|
||||
# | sort | uniq
|
||||
ForEachMacros:
|
||||
- 'apei_estatus_for_each_section'
|
||||
- 'ata_for_each_dev'
|
||||
- 'ata_for_each_link'
|
||||
- '__ata_qc_for_each'
|
||||
- 'ata_qc_for_each'
|
||||
- 'ata_qc_for_each_raw'
|
||||
- 'ata_qc_for_each_with_internal'
|
||||
- 'ax25_for_each'
|
||||
- 'ax25_uid_for_each'
|
||||
- '__bio_for_each_bvec'
|
||||
- 'bio_for_each_bvec'
|
||||
- 'bio_for_each_bvec_all'
|
||||
- 'bio_for_each_integrity_vec'
|
||||
- '__bio_for_each_segment'
|
||||
- 'bio_for_each_segment'
|
||||
- 'bio_for_each_segment_all'
|
||||
- 'bio_list_for_each'
|
||||
- 'bip_for_each_vec'
|
||||
- 'bitmap_for_each_clear_region'
|
||||
- 'bitmap_for_each_set_region'
|
||||
- 'blkg_for_each_descendant_post'
|
||||
- 'blkg_for_each_descendant_pre'
|
||||
- 'blk_queue_for_each_rl'
|
||||
- 'bond_for_each_slave'
|
||||
- 'bond_for_each_slave_rcu'
|
||||
- 'bpf_for_each_spilled_reg'
|
||||
- 'btree_for_each_safe128'
|
||||
- 'btree_for_each_safe32'
|
||||
- 'btree_for_each_safe64'
|
||||
- 'btree_for_each_safel'
|
||||
- 'card_for_each_dev'
|
||||
- 'cgroup_taskset_for_each'
|
||||
- 'cgroup_taskset_for_each_leader'
|
||||
- 'cpufreq_for_each_entry'
|
||||
- 'cpufreq_for_each_entry_idx'
|
||||
- 'cpufreq_for_each_valid_entry'
|
||||
- 'cpufreq_for_each_valid_entry_idx'
|
||||
- 'css_for_each_child'
|
||||
- 'css_for_each_descendant_post'
|
||||
- 'css_for_each_descendant_pre'
|
||||
- 'device_for_each_child_node'
|
||||
- 'displayid_iter_for_each'
|
||||
- 'dma_fence_chain_for_each'
|
||||
- 'do_for_each_ftrace_op'
|
||||
- 'drm_atomic_crtc_for_each_plane'
|
||||
- 'drm_atomic_crtc_state_for_each_plane'
|
||||
- 'drm_atomic_crtc_state_for_each_plane_state'
|
||||
- 'drm_atomic_for_each_plane_damage'
|
||||
- 'drm_client_for_each_connector_iter'
|
||||
- 'drm_client_for_each_modeset'
|
||||
- 'drm_connector_for_each_possible_encoder'
|
||||
- 'drm_for_each_bridge_in_chain'
|
||||
- 'drm_for_each_connector_iter'
|
||||
- 'drm_for_each_crtc'
|
||||
- 'drm_for_each_crtc_reverse'
|
||||
- 'drm_for_each_encoder'
|
||||
- 'drm_for_each_encoder_mask'
|
||||
- 'drm_for_each_fb'
|
||||
- 'drm_for_each_legacy_plane'
|
||||
- 'drm_for_each_plane'
|
||||
- 'drm_for_each_plane_mask'
|
||||
- 'drm_for_each_privobj'
|
||||
- 'drm_mm_for_each_hole'
|
||||
- 'drm_mm_for_each_node'
|
||||
- 'drm_mm_for_each_node_in_range'
|
||||
- 'drm_mm_for_each_node_safe'
|
||||
- 'flow_action_for_each'
|
||||
- 'for_each_acpi_dev_match'
|
||||
- 'for_each_active_dev_scope'
|
||||
- 'for_each_active_drhd_unit'
|
||||
- 'for_each_active_iommu'
|
||||
- 'for_each_aggr_pgid'
|
||||
- 'for_each_available_child_of_node'
|
||||
- 'for_each_bio'
|
||||
- 'for_each_board_func_rsrc'
|
||||
- 'for_each_bvec'
|
||||
- 'for_each_card_auxs'
|
||||
- 'for_each_card_auxs_safe'
|
||||
- 'for_each_card_components'
|
||||
- 'for_each_card_dapms'
|
||||
- 'for_each_card_pre_auxs'
|
||||
- 'for_each_card_prelinks'
|
||||
- 'for_each_card_rtds'
|
||||
- 'for_each_card_rtds_safe'
|
||||
- 'for_each_card_widgets'
|
||||
- 'for_each_card_widgets_safe'
|
||||
- 'for_each_cgroup_storage_type'
|
||||
- 'for_each_child_of_node'
|
||||
- 'for_each_clear_bit'
|
||||
- 'for_each_clear_bit_from'
|
||||
- 'for_each_cmsghdr'
|
||||
- 'for_each_compatible_node'
|
||||
- 'for_each_component_dais'
|
||||
- 'for_each_component_dais_safe'
|
||||
- 'for_each_comp_order'
|
||||
- 'for_each_console'
|
||||
- 'for_each_cpu'
|
||||
- 'for_each_cpu_and'
|
||||
- 'for_each_cpu_not'
|
||||
- 'for_each_cpu_wrap'
|
||||
- 'for_each_dapm_widgets'
|
||||
- 'for_each_dev_addr'
|
||||
- 'for_each_dev_scope'
|
||||
- 'for_each_dma_cap_mask'
|
||||
- 'for_each_dpcm_be'
|
||||
- 'for_each_dpcm_be_rollback'
|
||||
- 'for_each_dpcm_be_safe'
|
||||
- 'for_each_dpcm_fe'
|
||||
- 'for_each_drhd_unit'
|
||||
- 'for_each_dss_dev'
|
||||
- 'for_each_dtpm_table'
|
||||
- 'for_each_efi_memory_desc'
|
||||
- 'for_each_efi_memory_desc_in_map'
|
||||
- 'for_each_element'
|
||||
- 'for_each_element_extid'
|
||||
- 'for_each_element_id'
|
||||
- 'for_each_endpoint_of_node'
|
||||
- 'for_each_evictable_lru'
|
||||
- 'for_each_fib6_node_rt_rcu'
|
||||
- 'for_each_fib6_walker_rt'
|
||||
- 'for_each_free_mem_pfn_range_in_zone'
|
||||
- 'for_each_free_mem_pfn_range_in_zone_from'
|
||||
- 'for_each_free_mem_range'
|
||||
- 'for_each_free_mem_range_reverse'
|
||||
- 'for_each_func_rsrc'
|
||||
- 'for_each_hstate'
|
||||
- 'for_each_if'
|
||||
- 'for_each_iommu'
|
||||
- 'for_each_ip_tunnel_rcu'
|
||||
- 'for_each_irq_nr'
|
||||
- 'for_each_link_codecs'
|
||||
- 'for_each_link_cpus'
|
||||
- 'for_each_link_platforms'
|
||||
- 'for_each_lru'
|
||||
- 'for_each_matching_node'
|
||||
- 'for_each_matching_node_and_match'
|
||||
- 'for_each_member'
|
||||
- 'for_each_memcg_cache_index'
|
||||
- 'for_each_mem_pfn_range'
|
||||
- '__for_each_mem_range'
|
||||
- 'for_each_mem_range'
|
||||
- '__for_each_mem_range_rev'
|
||||
- 'for_each_mem_range_rev'
|
||||
- 'for_each_mem_region'
|
||||
- 'for_each_migratetype_order'
|
||||
- 'for_each_msi_entry'
|
||||
- 'for_each_msi_entry_safe'
|
||||
- 'for_each_msi_vector'
|
||||
- 'for_each_net'
|
||||
- 'for_each_net_continue_reverse'
|
||||
- 'for_each_netdev'
|
||||
- 'for_each_netdev_continue'
|
||||
- 'for_each_netdev_continue_rcu'
|
||||
- 'for_each_netdev_continue_reverse'
|
||||
- 'for_each_netdev_feature'
|
||||
- 'for_each_netdev_in_bond_rcu'
|
||||
- 'for_each_netdev_rcu'
|
||||
- 'for_each_netdev_reverse'
|
||||
- 'for_each_netdev_safe'
|
||||
- 'for_each_net_rcu'
|
||||
- 'for_each_new_connector_in_state'
|
||||
- 'for_each_new_crtc_in_state'
|
||||
- 'for_each_new_mst_mgr_in_state'
|
||||
- 'for_each_new_plane_in_state'
|
||||
- 'for_each_new_private_obj_in_state'
|
||||
- 'for_each_node'
|
||||
- 'for_each_node_by_name'
|
||||
- 'for_each_node_by_type'
|
||||
- 'for_each_node_mask'
|
||||
- 'for_each_node_state'
|
||||
- 'for_each_node_with_cpus'
|
||||
- 'for_each_node_with_property'
|
||||
- 'for_each_nonreserved_multicast_dest_pgid'
|
||||
- 'for_each_of_allnodes'
|
||||
- 'for_each_of_allnodes_from'
|
||||
- 'for_each_of_cpu_node'
|
||||
- 'for_each_of_pci_range'
|
||||
- 'for_each_old_connector_in_state'
|
||||
- 'for_each_old_crtc_in_state'
|
||||
- 'for_each_old_mst_mgr_in_state'
|
||||
- 'for_each_oldnew_connector_in_state'
|
||||
- 'for_each_oldnew_crtc_in_state'
|
||||
- 'for_each_oldnew_mst_mgr_in_state'
|
||||
- 'for_each_oldnew_plane_in_state'
|
||||
- 'for_each_oldnew_plane_in_state_reverse'
|
||||
- 'for_each_oldnew_private_obj_in_state'
|
||||
- 'for_each_old_plane_in_state'
|
||||
- 'for_each_old_private_obj_in_state'
|
||||
- 'for_each_online_cpu'
|
||||
- 'for_each_online_node'
|
||||
- 'for_each_online_pgdat'
|
||||
- 'for_each_pci_bridge'
|
||||
- 'for_each_pci_dev'
|
||||
- 'for_each_pci_msi_entry'
|
||||
- 'for_each_pcm_streams'
|
||||
- 'for_each_physmem_range'
|
||||
- 'for_each_populated_zone'
|
||||
- 'for_each_possible_cpu'
|
||||
- 'for_each_present_cpu'
|
||||
- 'for_each_prime_number'
|
||||
- 'for_each_prime_number_from'
|
||||
- 'for_each_process'
|
||||
- 'for_each_process_thread'
|
||||
- 'for_each_prop_codec_conf'
|
||||
- 'for_each_prop_dai_codec'
|
||||
- 'for_each_prop_dai_cpu'
|
||||
- 'for_each_prop_dlc_codecs'
|
||||
- 'for_each_prop_dlc_cpus'
|
||||
- 'for_each_prop_dlc_platforms'
|
||||
- 'for_each_property_of_node'
|
||||
- 'for_each_registered_fb'
|
||||
- 'for_each_requested_gpio'
|
||||
- 'for_each_requested_gpio_in_range'
|
||||
- 'for_each_reserved_mem_range'
|
||||
- 'for_each_reserved_mem_region'
|
||||
- 'for_each_rtd_codec_dais'
|
||||
- 'for_each_rtd_components'
|
||||
- 'for_each_rtd_cpu_dais'
|
||||
- 'for_each_rtd_dais'
|
||||
- 'for_each_set_bit'
|
||||
- 'for_each_set_bit_from'
|
||||
- 'for_each_set_clump8'
|
||||
- 'for_each_sg'
|
||||
- 'for_each_sg_dma_page'
|
||||
- 'for_each_sg_page'
|
||||
- 'for_each_sgtable_dma_page'
|
||||
- 'for_each_sgtable_dma_sg'
|
||||
- 'for_each_sgtable_page'
|
||||
- 'for_each_sgtable_sg'
|
||||
- 'for_each_sibling_event'
|
||||
- 'for_each_subelement'
|
||||
- 'for_each_subelement_extid'
|
||||
- 'for_each_subelement_id'
|
||||
- '__for_each_thread'
|
||||
- 'for_each_thread'
|
||||
- 'for_each_unicast_dest_pgid'
|
||||
- 'for_each_vsi'
|
||||
- 'for_each_wakeup_source'
|
||||
- 'for_each_zone'
|
||||
- 'for_each_zone_zonelist'
|
||||
- 'for_each_zone_zonelist_nodemask'
|
||||
- 'fwnode_for_each_available_child_node'
|
||||
- 'fwnode_for_each_child_node'
|
||||
- 'fwnode_graph_for_each_endpoint'
|
||||
- 'gadget_for_each_ep'
|
||||
- 'genradix_for_each'
|
||||
- 'genradix_for_each_from'
|
||||
- 'hash_for_each'
|
||||
- 'hash_for_each_possible'
|
||||
- 'hash_for_each_possible_rcu'
|
||||
- 'hash_for_each_possible_rcu_notrace'
|
||||
- 'hash_for_each_possible_safe'
|
||||
- 'hash_for_each_rcu'
|
||||
- 'hash_for_each_safe'
|
||||
- 'hctx_for_each_ctx'
|
||||
- 'hlist_bl_for_each_entry'
|
||||
- 'hlist_bl_for_each_entry_rcu'
|
||||
- 'hlist_bl_for_each_entry_safe'
|
||||
- 'hlist_for_each'
|
||||
- 'hlist_for_each_entry'
|
||||
- 'hlist_for_each_entry_continue'
|
||||
- 'hlist_for_each_entry_continue_rcu'
|
||||
- 'hlist_for_each_entry_continue_rcu_bh'
|
||||
- 'hlist_for_each_entry_from'
|
||||
- 'hlist_for_each_entry_from_rcu'
|
||||
- 'hlist_for_each_entry_rcu'
|
||||
- 'hlist_for_each_entry_rcu_bh'
|
||||
- 'hlist_for_each_entry_rcu_notrace'
|
||||
- 'hlist_for_each_entry_safe'
|
||||
- 'hlist_for_each_entry_srcu'
|
||||
- '__hlist_for_each_rcu'
|
||||
- 'hlist_for_each_safe'
|
||||
- 'hlist_nulls_for_each_entry'
|
||||
- 'hlist_nulls_for_each_entry_from'
|
||||
- 'hlist_nulls_for_each_entry_rcu'
|
||||
- 'hlist_nulls_for_each_entry_safe'
|
||||
- 'i3c_bus_for_each_i2cdev'
|
||||
- 'i3c_bus_for_each_i3cdev'
|
||||
- 'ide_host_for_each_port'
|
||||
- 'ide_port_for_each_dev'
|
||||
- 'ide_port_for_each_present_dev'
|
||||
- 'idr_for_each_entry'
|
||||
- 'idr_for_each_entry_continue'
|
||||
- 'idr_for_each_entry_continue_ul'
|
||||
- 'idr_for_each_entry_ul'
|
||||
- 'in_dev_for_each_ifa_rcu'
|
||||
- 'in_dev_for_each_ifa_rtnl'
|
||||
- 'inet_bind_bucket_for_each'
|
||||
- 'inet_lhash2_for_each_icsk_rcu'
|
||||
- 'key_for_each'
|
||||
- 'key_for_each_safe'
|
||||
- 'klp_for_each_func'
|
||||
- 'klp_for_each_func_safe'
|
||||
- 'klp_for_each_func_static'
|
||||
- 'klp_for_each_object'
|
||||
- 'klp_for_each_object_safe'
|
||||
- 'klp_for_each_object_static'
|
||||
- 'kunit_suite_for_each_test_case'
|
||||
- 'kvm_for_each_memslot'
|
||||
- 'kvm_for_each_vcpu'
|
||||
- 'list_for_each'
|
||||
- 'list_for_each_codec'
|
||||
- 'list_for_each_codec_safe'
|
||||
- 'list_for_each_continue'
|
||||
- 'list_for_each_entry'
|
||||
- 'list_for_each_entry_continue'
|
||||
- 'list_for_each_entry_continue_rcu'
|
||||
- 'list_for_each_entry_continue_reverse'
|
||||
- 'list_for_each_entry_from'
|
||||
- 'list_for_each_entry_from_rcu'
|
||||
- 'list_for_each_entry_from_reverse'
|
||||
- 'list_for_each_entry_lockless'
|
||||
- 'list_for_each_entry_rcu'
|
||||
- 'list_for_each_entry_reverse'
|
||||
- 'list_for_each_entry_safe'
|
||||
- 'list_for_each_entry_safe_continue'
|
||||
- 'list_for_each_entry_safe_from'
|
||||
- 'list_for_each_entry_safe_reverse'
|
||||
- 'list_for_each_entry_srcu'
|
||||
- 'list_for_each_prev'
|
||||
- 'list_for_each_prev_safe'
|
||||
- 'list_for_each_safe'
|
||||
- 'llist_for_each'
|
||||
- 'llist_for_each_entry'
|
||||
- 'llist_for_each_entry_safe'
|
||||
- 'llist_for_each_safe'
|
||||
- 'mci_for_each_dimm'
|
||||
- 'media_device_for_each_entity'
|
||||
- 'media_device_for_each_intf'
|
||||
- 'media_device_for_each_link'
|
||||
- 'media_device_for_each_pad'
|
||||
- 'nanddev_io_for_each_page'
|
||||
- 'netdev_for_each_lower_dev'
|
||||
- 'netdev_for_each_lower_private'
|
||||
- 'netdev_for_each_lower_private_rcu'
|
||||
- 'netdev_for_each_mc_addr'
|
||||
- 'netdev_for_each_uc_addr'
|
||||
- 'netdev_for_each_upper_dev_rcu'
|
||||
- 'netdev_hw_addr_list_for_each'
|
||||
- 'nft_rule_for_each_expr'
|
||||
- 'nla_for_each_attr'
|
||||
- 'nla_for_each_nested'
|
||||
- 'nlmsg_for_each_attr'
|
||||
- 'nlmsg_for_each_msg'
|
||||
- 'nr_neigh_for_each'
|
||||
- 'nr_neigh_for_each_safe'
|
||||
- 'nr_node_for_each'
|
||||
- 'nr_node_for_each_safe'
|
||||
- 'of_for_each_phandle'
|
||||
- 'of_property_for_each_string'
|
||||
- 'of_property_for_each_u32'
|
||||
- 'pci_bus_for_each_resource'
|
||||
- 'pcl_for_each_chunk'
|
||||
- 'pcl_for_each_segment'
|
||||
- 'pcm_for_each_format'
|
||||
- 'ping_portaddr_for_each_entry'
|
||||
- 'plist_for_each'
|
||||
- 'plist_for_each_continue'
|
||||
- 'plist_for_each_entry'
|
||||
- 'plist_for_each_entry_continue'
|
||||
- 'plist_for_each_entry_safe'
|
||||
- 'plist_for_each_safe'
|
||||
- 'pnp_for_each_card'
|
||||
- 'pnp_for_each_dev'
|
||||
- 'protocol_for_each_card'
|
||||
- 'protocol_for_each_dev'
|
||||
- 'queue_for_each_hw_ctx'
|
||||
- 'radix_tree_for_each_slot'
|
||||
- 'radix_tree_for_each_tagged'
|
||||
- 'rb_for_each'
|
||||
- 'rbtree_postorder_for_each_entry_safe'
|
||||
- 'rdma_for_each_block'
|
||||
- 'rdma_for_each_port'
|
||||
- 'rdma_umem_for_each_dma_block'
|
||||
- 'resource_list_for_each_entry'
|
||||
- 'resource_list_for_each_entry_safe'
|
||||
- 'rhl_for_each_entry_rcu'
|
||||
- 'rhl_for_each_rcu'
|
||||
- 'rht_for_each'
|
||||
- 'rht_for_each_entry'
|
||||
- 'rht_for_each_entry_from'
|
||||
- 'rht_for_each_entry_rcu'
|
||||
- 'rht_for_each_entry_rcu_from'
|
||||
- 'rht_for_each_entry_safe'
|
||||
- 'rht_for_each_from'
|
||||
- 'rht_for_each_rcu'
|
||||
- 'rht_for_each_rcu_from'
|
||||
- '__rq_for_each_bio'
|
||||
- 'rq_for_each_bvec'
|
||||
- 'rq_for_each_segment'
|
||||
- 'scsi_for_each_prot_sg'
|
||||
- 'scsi_for_each_sg'
|
||||
- 'sctp_for_each_hentry'
|
||||
- 'sctp_skb_for_each'
|
||||
- 'shdma_for_each_chan'
|
||||
- '__shost_for_each_device'
|
||||
- 'shost_for_each_device'
|
||||
- 'sk_for_each'
|
||||
- 'sk_for_each_bound'
|
||||
- 'sk_for_each_entry_offset_rcu'
|
||||
- 'sk_for_each_from'
|
||||
- 'sk_for_each_rcu'
|
||||
- 'sk_for_each_safe'
|
||||
- 'sk_nulls_for_each'
|
||||
- 'sk_nulls_for_each_from'
|
||||
- 'sk_nulls_for_each_rcu'
|
||||
- 'snd_array_for_each'
|
||||
- 'snd_pcm_group_for_each_entry'
|
||||
- 'snd_soc_dapm_widget_for_each_path'
|
||||
- 'snd_soc_dapm_widget_for_each_path_safe'
|
||||
- 'snd_soc_dapm_widget_for_each_sink_path'
|
||||
- 'snd_soc_dapm_widget_for_each_source_path'
|
||||
- 'tb_property_for_each'
|
||||
- 'tcf_exts_for_each_action'
|
||||
- 'udp_portaddr_for_each_entry'
|
||||
- 'udp_portaddr_for_each_entry_rcu'
|
||||
- 'usb_hub_for_each_child'
|
||||
- 'v4l2_device_for_each_subdev'
|
||||
- 'v4l2_m2m_for_each_dst_buf'
|
||||
- 'v4l2_m2m_for_each_dst_buf_safe'
|
||||
- 'v4l2_m2m_for_each_src_buf'
|
||||
- 'v4l2_m2m_for_each_src_buf_safe'
|
||||
- 'virtio_device_for_each_vq'
|
||||
- 'while_for_each_ftrace_op'
|
||||
- 'xa_for_each'
|
||||
- 'xa_for_each_marked'
|
||||
- 'xa_for_each_range'
|
||||
- 'xa_for_each_start'
|
||||
- 'xas_for_each'
|
||||
- 'xas_for_each_conflict'
|
||||
- 'xas_for_each_marked'
|
||||
- 'xbc_array_for_each_value'
|
||||
- 'xbc_for_each_key_value'
|
||||
- 'xbc_node_for_each_array_value'
|
||||
- 'xbc_node_for_each_child'
|
||||
- 'xbc_node_for_each_key_value'
|
||||
- 'zorro_for_each_dev'
|
||||
|
||||
#IncludeBlocks: Preserve # Unknown to clang-format-5.0
|
||||
IncludeCategories:
|
||||
- Regex: '.*'
|
||||
Priority: 1
|
||||
IncludeIsMainRegex: '(Test)?$'
|
||||
IndentCaseLabels: false
|
||||
#IndentPPDirectives: None # Unknown to clang-format-5.0
|
||||
IndentWidth: 8
|
||||
IndentWrappedFunctionNames: false
|
||||
JavaScriptQuotes: Leave
|
||||
JavaScriptWrapImports: true
|
||||
KeepEmptyLinesAtTheStartOfBlocks: false
|
||||
MacroBlockBegin: ''
|
||||
MacroBlockEnd: ''
|
||||
MaxEmptyLinesToKeep: 1
|
||||
NamespaceIndentation: None
|
||||
#ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0
|
||||
ObjCBlockIndentWidth: 8
|
||||
ObjCSpaceAfterProperty: true
|
||||
ObjCSpaceBeforeProtocolList: true
|
||||
|
||||
# Taken from git's rules
|
||||
#PenaltyBreakAssignment: 10 # Unknown to clang-format-4.0
|
||||
PenaltyBreakBeforeFirstCallParameter: 30
|
||||
PenaltyBreakComment: 10
|
||||
PenaltyBreakFirstLessLess: 0
|
||||
PenaltyBreakString: 10
|
||||
PenaltyExcessCharacter: 100
|
||||
PenaltyReturnTypeOnItsOwnLine: 60
|
||||
|
||||
PointerAlignment: Right
|
||||
ReflowComments: false
|
||||
SortIncludes: false
|
||||
#SortUsingDeclarations: false # Unknown to clang-format-4.0
|
||||
SpaceAfterCStyleCast: false
|
||||
SpaceAfterTemplateKeyword: true
|
||||
SpaceBeforeAssignmentOperators: true
|
||||
#SpaceBeforeCtorInitializerColon: true # Unknown to clang-format-5.0
|
||||
#SpaceBeforeInheritanceColon: true # Unknown to clang-format-5.0
|
||||
SpaceBeforeParens: ControlStatements
|
||||
#SpaceBeforeRangeBasedForLoopColon: true # Unknown to clang-format-5.0
|
||||
SpaceInEmptyParentheses: false
|
||||
SpacesBeforeTrailingComments: 1
|
||||
SpacesInAngles: false
|
||||
SpacesInContainerLiterals: false
|
||||
SpacesInCStyleCastParentheses: false
|
||||
SpacesInParentheses: false
|
||||
SpacesInSquareBrackets: false
|
||||
Standard: Cpp03
|
||||
TabWidth: 8
|
||||
UseTab: Always
|
||||
...
|
||||
@@ -6,17 +6,21 @@ BR2_HAVE_DOT_CONFIG=y
|
||||
# BR2_alpha is not set
|
||||
# BR2_arm is not set
|
||||
# BR2_armeb is not set
|
||||
# BR2_avr32 is not set
|
||||
# BR2_cris is not set
|
||||
# BR2_ia64 is not set
|
||||
BR2_i386=y
|
||||
# BR2_m68k is not set
|
||||
# BR2_mips is not set
|
||||
# BR2_mipsel is not set
|
||||
# BR2_nios2 is not set
|
||||
# BR2_powerpc is not set
|
||||
# BR2_sh is not set
|
||||
# BR2_sh64 is not set
|
||||
# BR2_sparc is not set
|
||||
# BR2_sparc64 is not set
|
||||
# BR2_x86_64 is not set
|
||||
# BR2_x86_i386 is not set
|
||||
# BR2_x86_i486 is not set
|
||||
# BR2_x86_i586 is not set
|
||||
BR2_x86_i686=y
|
||||
|
||||
@@ -1,40 +0,0 @@
|
||||
root = true
|
||||
|
||||
[*]
|
||||
charset = utf-8
|
||||
end_of_line = lf
|
||||
indent_style = space
|
||||
indent_size = 4
|
||||
tab_width = 8
|
||||
trim_trailing_whitespace = true
|
||||
insert_final_newline = true
|
||||
|
||||
[DEVELOPERS]
|
||||
indent_style = tab
|
||||
indent_size = tab
|
||||
|
||||
[Config*.in*]
|
||||
indent_style = tab
|
||||
indent_size = tab
|
||||
|
||||
[linux/Config.ext.in]
|
||||
indent_style = tab
|
||||
indent_size = tab
|
||||
|
||||
[Makefile*]
|
||||
indent_style = tab
|
||||
indent_size = tab
|
||||
|
||||
[*.mk]
|
||||
indent_style = tab
|
||||
indent_size = tab
|
||||
|
||||
[*.patch]
|
||||
trim_trailing_whitespace = false
|
||||
|
||||
[S{0..9}{0..9}*]
|
||||
indent_style = tab
|
||||
indent_size = tab
|
||||
|
||||
[*.adoc]
|
||||
trim_trailing_whitespace = false
|
||||
5
.flake8
5
.flake8
@@ -1,5 +0,0 @@
|
||||
[flake8]
|
||||
exclude=
|
||||
# copied from the kernel sources
|
||||
utils/diffconfig
|
||||
max-line-length=132
|
||||
6
.github/pull_request_template.md
vendored
6
.github/pull_request_template.md
vendored
@@ -1,6 +0,0 @@
|
||||
Please do not submit a Pull Request via GitHub. Buildroot makes use of a
|
||||
[mailing list](http://lists.buildroot.org/mailman/listinfo/buildroot) for patch submission and review.
|
||||
See [submitting your own patches](http://buildroot.org/manual.html#submitting-patches) for more info.
|
||||
|
||||
Thanks for your help!
|
||||
|
||||
25
.github/workflows/repo-lockdown.yml
vendored
25
.github/workflows/repo-lockdown.yml
vendored
@@ -1,25 +0,0 @@
|
||||
name: 'Repo Lockdown'
|
||||
|
||||
on:
|
||||
pull_request_target:
|
||||
types: opened
|
||||
|
||||
permissions:
|
||||
pull-requests: write
|
||||
|
||||
jobs:
|
||||
action:
|
||||
if: github.repository == 'buildroot/buildroot'
|
||||
runs-on: ubuntu-latest
|
||||
steps:
|
||||
- uses: dessant/repo-lockdown@v4
|
||||
with:
|
||||
pr-comment: |
|
||||
Please do not submit a Pull Request via GitHub. Buildroot makes use of a
|
||||
[mailing list](http://lists.buildroot.org/mailman/listinfo/buildroot) for patch submission and review.
|
||||
See [submitting your own patches](http://buildroot.org/manual.html#submitting-patches) for more info.
|
||||
|
||||
Thanks for your help!
|
||||
lock-pr: true
|
||||
close-pr: true
|
||||
|
||||
4
.gitignore
vendored
4
.gitignore
vendored
@@ -1,4 +1,4 @@
|
||||
/output*
|
||||
/output
|
||||
/dl
|
||||
/.auto.deps
|
||||
/.config.cmd
|
||||
@@ -12,5 +12,3 @@
|
||||
*.orig
|
||||
*.rej
|
||||
*~
|
||||
*.pyc
|
||||
/br.log
|
||||
|
||||
@@ -1,33 +0,0 @@
|
||||
# Configuration for Gitlab-CI.
|
||||
# Builds appear on https://gitlab.com/buildroot.org/buildroot/pipelines
|
||||
|
||||
image: $CI_REGISTRY/buildroot.org/buildroot/base:20250218.2110
|
||||
|
||||
stages:
|
||||
- generate-gitlab-ci
|
||||
- build
|
||||
|
||||
generate-gitlab-ci-yml:
|
||||
stage: generate-gitlab-ci
|
||||
script: ./support/scripts/generate-gitlab-ci-yml support/misc/gitlab-ci.yml.in > generated-gitlab-ci.yml
|
||||
retry:
|
||||
max: 2
|
||||
when:
|
||||
- runner_system_failure
|
||||
- stuck_or_timeout_failure
|
||||
artifacts:
|
||||
when: always
|
||||
paths:
|
||||
- generated-gitlab-ci.yml
|
||||
- br-test-pkg/*/.config
|
||||
- br-test-pkg/*/missing.config
|
||||
|
||||
buildroot-pipeline:
|
||||
stage: build
|
||||
trigger:
|
||||
include:
|
||||
- artifact: generated-gitlab-ci.yml
|
||||
job: generate-gitlab-ci-yml
|
||||
strategy: depend
|
||||
variables:
|
||||
PARENT_PIPELINE_ID: $CI_PIPELINE_ID
|
||||
@@ -1,60 +0,0 @@
|
||||
Thank you for opening a new issue. To help solve it faster and more easily,
|
||||
please review this check-list, and fill in the sections below. Adapt as
|
||||
needed.
|
||||
|
||||
Do not open an issue to request a new feature; instead, post a message to
|
||||
[the mailing list](https://lists.buildroot.org/mailman/listinfo/buildroot).
|
||||
|
||||
_Note: issues missing any information may get closed without further ado._
|
||||
|
||||
---
|
||||
### Check-list
|
||||
|
||||
- [ ] I did not find the issue in the existing issues
|
||||
- [ ] I can reproduce the issue with unmodified Buildroot from [this
|
||||
repository](https://gitlab.com/buildroot.org/buildroot), not from a
|
||||
fork somewhere else
|
||||
- [ ] I can reproduce the issue on the latest commit of the branch I'm using:
|
||||
- [ ] master
|
||||
- [ ] stable (i.e. 20NN.MM.x - please specify)
|
||||
- [ ] LTS (i.e. 20NN.02.x - please specify)
|
||||
- [ ] I can reproduce the issue after running `make clean; make`
|
||||
- [ ] I attached the full build log file (e.g. `make 2>&1 |tee build.log`)
|
||||
- [ ] I attached a **minimal** defconfig file that can reproduce the
|
||||
issue (`make BR2_DEFCONFIG=$(pwd)/issue_defconfig savedefconfig`)
|
||||
- [ ] I also attached the configuration for kconfig-based packages that
|
||||
are enabled (and necessary to reproduce the issue), most notably:
|
||||
- [ ] busybox
|
||||
- [ ] linux
|
||||
- [ ] uclibc
|
||||
- [ ] uboot
|
||||
- [ ] …
|
||||
|
||||
---
|
||||
### What I did
|
||||
|
||||
- **Buildroot commit sha1**: _get this with `git describe HEAD`_
|
||||
- **Distribution of the build machine**: _get this with `NAME` and `VERSION` from `/etc/os-release`_
|
||||
|
||||
_Here, describe what you did:_
|
||||
- _any special environment variables: CC, CXX, TARGET, CROSS_COMPILE, etc…_
|
||||
- _the commands you ran:_
|
||||
```sh
|
||||
$ make [...]
|
||||
```
|
||||
- _anything else that you might think is important…_
|
||||
|
||||
---
|
||||
### What happens
|
||||
|
||||
_Here, describe what happens that you believe was incorrect._
|
||||
|
||||
---
|
||||
### What was expected
|
||||
|
||||
_Here, describe the behaviour you expected._
|
||||
|
||||
---
|
||||
### Extra information
|
||||
|
||||
_Here, you may write additional information that does not fit above_
|
||||
16
COPYING
16
COPYING
@@ -1,19 +1,3 @@
|
||||
With the exceptions below, Buildroot is distributed under the terms of
|
||||
the GNU General Public License, reproduced below; either version 2 of
|
||||
the License, or (at your option) any later version.
|
||||
|
||||
Some files in Buildroot contain a different license statement. Those
|
||||
files are licensed under the license contained in the file itself.
|
||||
|
||||
Buildroot also bundles patch files, which are applied to the sources
|
||||
of the various packages. Those patches are not covered by the license
|
||||
of Buildroot. Instead, they are covered by the license of the software
|
||||
to which the patches are applied. When said software is available
|
||||
under multiple licenses, the Buildroot patches are only provided under
|
||||
the publicly accessible licenses.
|
||||
|
||||
-----------------------------------------------------------------
|
||||
|
||||
GNU GENERAL PUBLIC LICENSE
|
||||
Version 2, June 1991
|
||||
|
||||
|
||||
7040
Config.in.legacy
7040
Config.in.legacy
File diff suppressed because it is too large
Load Diff
3563
DEVELOPERS
3563
DEVELOPERS
File diff suppressed because it is too large
Load Diff
@@ -4,43 +4,14 @@
|
||||
# This file contains placeholders to detect backward-compatibility problems.
|
||||
# When a buildroot "API" feature is being deprecated, a rule should be added
|
||||
# here that issues an error when the old feature is used.
|
||||
#
|
||||
# This file is not included if BR2_DEPRECATED is selected, so it is possible
|
||||
# to bypass the errors (although that's usually a bad idea).
|
||||
|
||||
ifeq ($(BR2_LEGACY),y)
|
||||
$(error "You have legacy configuration in your .config! Please check your configuration.")
|
||||
endif
|
||||
|
||||
#
|
||||
# Legacy options from 2014.02
|
||||
#
|
||||
|
||||
# The BUILDROOT_DL_DIR environment variable was renamed by BR2_DL_DIR. We
|
||||
# want to detect someone using the old variable, _except_ if also the new
|
||||
# variable was set. By the time we get here, however, we no longer have
|
||||
# access to the BR2_DL_DIR environment variable (because it has been overridden
|
||||
# by the .config inclusion). However, the environment variable (if defined) was
|
||||
# saved in DL_DIR, so we can use that.
|
||||
ifneq ($(BUILDROOT_DL_DIR),)
|
||||
ifneq ($(BUILDROOT_DL_DIR),$(DL_DIR))
|
||||
$(error "The BUILDROOT_DL_DIR environment variable was renamed to BR2_DL_DIR.")
|
||||
endif
|
||||
endif
|
||||
|
||||
# If a script is using the deprecated BUILDROOT_CONFIG, make sure it fails.
|
||||
# Add some directories in front just in case someone used dirname on it.
|
||||
BUILDROOT_CONFIG_FAKE = /tmp/deprecated/The-BUILDROOT_CONFIG-environment-variable-was-renamed-to-BR2_CONFIG
|
||||
|
||||
# Similar to above for BUILDROOT_CONFIG, but here we have no .config equivalent.
|
||||
ifneq ($(BUILDROOT_CONFIG),)
|
||||
ifneq ($(BUILDROOT_CONFIG),$(BR2_CONFIG))
|
||||
ifneq ($(BUILDROOT_CONFIG),$(BUILDROOT_CONFIG_FAKE))
|
||||
$(error "The BUILDROOT_CONFIG environment variable was renamed to BR2_CONFIG.")
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
BUILDROOT_CONFIG = $(BUILDROOT_CONFIG_FAKE)
|
||||
export BUILDROOT_CONFIG
|
||||
|
||||
#
|
||||
# Legacy options from 2012.08
|
||||
#
|
||||
|
||||
26
README
26
README
@@ -1,26 +0,0 @@
|
||||
Buildroot is a simple, efficient and easy-to-use tool to generate embedded
|
||||
Linux systems through cross-compilation.
|
||||
|
||||
The documentation can be found in docs/manual. You can generate a text
|
||||
document with 'make manual-text' and read output/docs/manual/manual.text.
|
||||
Online documentation can be found at https://buildroot.org/docs.html
|
||||
|
||||
To build and use the buildroot stuff, do the following:
|
||||
|
||||
1) run 'make menuconfig'
|
||||
2) select the target architecture and the packages you wish to compile
|
||||
3) run 'make'
|
||||
4) wait while it compiles
|
||||
5) find the kernel, bootloader, root filesystem, etc. in output/images
|
||||
|
||||
You do not need to be root to build or run buildroot. Have fun!
|
||||
|
||||
Buildroot comes with a basic configuration for a number of boards. Run
|
||||
'make list-defconfigs' to view the list of provided configurations.
|
||||
|
||||
Please feed suggestions, bug reports, insults, and bribes back to the
|
||||
buildroot mailing list: buildroot@buildroot.org
|
||||
You can also find us on #buildroot on OFTC IRC.
|
||||
|
||||
If you would like to contribute patches, please read
|
||||
https://buildroot.org/manual.html#submitting-patches
|
||||
370
arch/Config.in
370
arch/Config.in
@@ -1,19 +1,5 @@
|
||||
menu "Target options"
|
||||
|
||||
config BR2_ARCH_IS_64
|
||||
bool
|
||||
|
||||
config BR2_KERNEL_64_USERLAND_32
|
||||
bool
|
||||
|
||||
config BR2_SOFT_FLOAT
|
||||
bool
|
||||
|
||||
config BR2_USE_MMU
|
||||
bool
|
||||
|
||||
config BR2_ARCH_HAS_FDPIC_SUPPORT
|
||||
bool
|
||||
bool
|
||||
|
||||
choice
|
||||
prompt "Target Architecture"
|
||||
@@ -21,228 +7,139 @@ choice
|
||||
help
|
||||
Select the target architecture family to build for.
|
||||
|
||||
config BR2_arcle
|
||||
bool "ARC (little endian)"
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
Synopsys' DesignWare ARC Processor Cores are a family of
|
||||
32-bit CPUs that can be used from deeply embedded to high
|
||||
performance host applications. Little endian.
|
||||
|
||||
config BR2_arm
|
||||
bool "ARM (little endian)"
|
||||
# MMU support is set by the subarchitecture file, arch/Config.in.arm
|
||||
help
|
||||
ARM is a 32-bit reduced instruction set computer (RISC)
|
||||
instruction set architecture (ISA) developed by ARM Holdings.
|
||||
Little endian.
|
||||
ARM is a 32-bit reduced instruction set computer (RISC) instruction
|
||||
set architecture (ISA) developed by ARM Holdings. Little endian.
|
||||
http://www.arm.com/
|
||||
http://en.wikipedia.org/wiki/ARM
|
||||
|
||||
config BR2_armeb
|
||||
bool "ARM (big endian)"
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
ARM is a 32-bit reduced instruction set computer (RISC)
|
||||
instruction set architecture (ISA) developed by ARM Holdings.
|
||||
Big endian.
|
||||
ARM is a 32-bit reduced instruction set computer (RISC) instruction
|
||||
set architecture (ISA) developed by ARM Holdings. Big endian.
|
||||
http://www.arm.com/
|
||||
http://en.wikipedia.org/wiki/ARM
|
||||
|
||||
config BR2_aarch64
|
||||
bool "AArch64 (little endian)"
|
||||
select BR2_ARCH_IS_64
|
||||
bool "AArch64"
|
||||
help
|
||||
Aarch64 is a 64-bit architecture developed by ARM Holdings.
|
||||
http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
|
||||
http://en.wikipedia.org/wiki/ARM
|
||||
|
||||
config BR2_aarch64_be
|
||||
bool "AArch64 (big endian)"
|
||||
select BR2_ARCH_IS_64
|
||||
config BR2_avr32
|
||||
bool "AVR32"
|
||||
select BR2_SOFT_FLOAT
|
||||
help
|
||||
Aarch64 is a 64-bit architecture developed by ARM Holdings.
|
||||
http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
|
||||
http://en.wikipedia.org/wiki/ARM
|
||||
The AVR32 is a 32-bit RISC microprocessor architecture designed by
|
||||
Atmel.
|
||||
http://www.atmel.com/
|
||||
http://en.wikipedia.org/wiki/Avr32
|
||||
|
||||
config BR2_hppa
|
||||
bool "HPPA"
|
||||
select BR2_USE_MMU
|
||||
config BR2_bfin
|
||||
bool "Blackfin"
|
||||
help
|
||||
Precision Architecture (a.k.a. PA-RISC) is a 32-bit
|
||||
(big endian) architecture developed by Hewlett Packard.
|
||||
https://en.wikipedia.org/wiki/PA-RISC
|
||||
The Blackfin is a family of 16 or 32-bit microprocessors developed,
|
||||
manufactured and marketed by Analog Devices.
|
||||
http://www.analog.com/
|
||||
http://en.wikipedia.org/wiki/Blackfin
|
||||
|
||||
config BR2_i386
|
||||
bool "i386"
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
Intel i386 architecture compatible microprocessor
|
||||
http://en.wikipedia.org/wiki/I386
|
||||
|
||||
config BR2_loongarch64
|
||||
bool "LoongArch64"
|
||||
select BR2_USE_MMU
|
||||
select BR2_ARCH_IS_64
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
|
||||
help
|
||||
LoongArch64 is 64-bit architecture developed by Loongson.
|
||||
http://www.loongson.cn/
|
||||
https://en.wikipedia.org/wiki/Loongson
|
||||
|
||||
config BR2_m68k
|
||||
bool "m68k"
|
||||
# MMU support is set by the subarchitecture file, arch/Config.in.m68k
|
||||
depends on BROKEN # ice in uclibc / inet_ntoa_r
|
||||
help
|
||||
Motorola 68000 family microprocessor
|
||||
http://en.wikipedia.org/wiki/M68k
|
||||
|
||||
config BR2_microblazeel
|
||||
bool "Microblaze AXI (little endian)"
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
Soft processor core designed for Xilinx FPGAs from Xilinx. AXI
|
||||
bus based architecture (little endian)
|
||||
Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
|
||||
based architecture (little endian)
|
||||
http://www.xilinx.com
|
||||
http://en.wikipedia.org/wiki/Microblaze
|
||||
|
||||
config BR2_microblazebe
|
||||
bool "Microblaze non-AXI (big endian)"
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
Soft processor core designed for Xilinx FPGAs from Xilinx. PLB
|
||||
bus based architecture (non-AXI, big endian)
|
||||
Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
|
||||
based architecture (non-AXI, big endian)
|
||||
http://www.xilinx.com
|
||||
http://en.wikipedia.org/wiki/Microblaze
|
||||
|
||||
config BR2_mips
|
||||
bool "MIPS (big endian)"
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
MIPS is a RISC microprocessor from MIPS Technologies. Big
|
||||
endian.
|
||||
MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
|
||||
http://www.mips.com/
|
||||
http://en.wikipedia.org/wiki/MIPS_Technologies
|
||||
|
||||
config BR2_mipsel
|
||||
bool "MIPS (little endian)"
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
MIPS is a RISC microprocessor from MIPS Technologies. Little
|
||||
endian.
|
||||
MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
|
||||
http://www.mips.com/
|
||||
http://en.wikipedia.org/wiki/MIPS_Technologies
|
||||
|
||||
config BR2_mips64
|
||||
bool "MIPS64 (big endian)"
|
||||
select BR2_ARCH_IS_64
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
MIPS is a RISC microprocessor from MIPS Technologies. Big
|
||||
endian.
|
||||
MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
|
||||
http://www.mips.com/
|
||||
http://en.wikipedia.org/wiki/MIPS_Technologies
|
||||
|
||||
config BR2_mips64el
|
||||
bool "MIPS64 (little endian)"
|
||||
select BR2_ARCH_IS_64
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
MIPS is a RISC microprocessor from MIPS Technologies. Little
|
||||
endian.
|
||||
MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
|
||||
http://www.mips.com/
|
||||
http://en.wikipedia.org/wiki/MIPS_Technologies
|
||||
|
||||
config BR2_or1k
|
||||
bool "OpenRISC"
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
OpenRISC is a free and open processor for embedded system.
|
||||
http://openrisc.io
|
||||
|
||||
config BR2_powerpc
|
||||
bool "PowerPC"
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
PowerPC is a RISC architecture created by Apple-IBM-Motorola
|
||||
alliance. Big endian.
|
||||
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
|
||||
http://www.power.org/
|
||||
http://en.wikipedia.org/wiki/Powerpc
|
||||
|
||||
config BR2_powerpc64
|
||||
bool "PowerPC64 (big endian)"
|
||||
select BR2_ARCH_IS_64
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
PowerPC is a RISC architecture created by Apple-IBM-Motorola
|
||||
alliance. Big endian.
|
||||
http://www.power.org/
|
||||
http://en.wikipedia.org/wiki/Powerpc
|
||||
|
||||
config BR2_powerpc64le
|
||||
bool "PowerPC64 (little endian)"
|
||||
select BR2_ARCH_IS_64
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
PowerPC is a RISC architecture created by Apple-IBM-Motorola
|
||||
alliance. Little endian.
|
||||
http://www.power.org/
|
||||
http://en.wikipedia.org/wiki/Powerpc
|
||||
|
||||
config BR2_riscv
|
||||
bool "RISCV"
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
|
||||
help
|
||||
RISC-V is an open, free Instruction Set Architecture created
|
||||
by the UC Berkeley Architecture Research group and supported
|
||||
and promoted by RISC-V Foundation.
|
||||
https://riscv.org/
|
||||
https://en.wikipedia.org/wiki/RISC-V
|
||||
|
||||
config BR2_s390x
|
||||
bool "s390x"
|
||||
select BR2_ARCH_IS_64
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
s390x is a big-endian architecture made by IBM.
|
||||
http://www.ibm.com/
|
||||
http://en.wikipedia.org/wiki/IBM_System/390
|
||||
|
||||
config BR2_sh
|
||||
bool "SuperH"
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
SuperH (or SH) is a 32-bit reduced instruction set computer
|
||||
(RISC) instruction set architecture (ISA) developed by
|
||||
Hitachi.
|
||||
SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
|
||||
instruction set architecture (ISA) developed by Hitachi.
|
||||
http://www.hitachi.com/
|
||||
http://en.wikipedia.org/wiki/SuperH
|
||||
|
||||
config BR2_sh64
|
||||
bool "SuperH64"
|
||||
help
|
||||
SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
|
||||
instruction set architecture (ISA) developed by Hitachi.
|
||||
http://www.hitachi.com/
|
||||
http://en.wikipedia.org/wiki/SuperH
|
||||
|
||||
config BR2_sparc
|
||||
bool "SPARC"
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
SPARC (from Scalable Processor Architecture) is a RISC
|
||||
instruction set architecture (ISA) developed by Sun
|
||||
Microsystems.
|
||||
http://www.oracle.com/sun
|
||||
http://en.wikipedia.org/wiki/Sparc
|
||||
|
||||
config BR2_sparc64
|
||||
bool "SPARC64"
|
||||
select BR2_ARCH_IS_64
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
SPARC (from Scalable Processor Architecture) is a RISC
|
||||
instruction set architecture (ISA) developed by Sun
|
||||
Microsystems.
|
||||
SPARC (from Scalable Processor Architecture) is a RISC instruction
|
||||
set architecture (ISA) developed by Sun Microsystems.
|
||||
http://www.oracle.com/sun
|
||||
http://en.wikipedia.org/wiki/Sparc
|
||||
|
||||
config BR2_x86_64
|
||||
bool "x86_64"
|
||||
select BR2_ARCH_IS_64
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
x86-64 is an extension of the x86 instruction set (Intel i386
|
||||
architecture compatible microprocessor).
|
||||
@@ -250,7 +147,6 @@ config BR2_x86_64
|
||||
|
||||
config BR2_xtensa
|
||||
bool "Xtensa"
|
||||
# MMU support is set by the subarchitecture file, arch/Config.in.xtensa
|
||||
help
|
||||
Xtensa is a Tensilica processor IP architecture.
|
||||
http://en.wikipedia.org/wiki/Xtensa
|
||||
@@ -258,82 +154,15 @@ config BR2_xtensa
|
||||
|
||||
endchoice
|
||||
|
||||
# For some architectures or specific cores, our internal toolchain
|
||||
# backend is not suitable (like, missing support in upstream gcc, or
|
||||
# no ChipCo fork exists...)
|
||||
config BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
|
||||
bool
|
||||
|
||||
config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
|
||||
bool
|
||||
default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
|
||||
|
||||
# The following symbols are selected by the individual
|
||||
# Config.in.$ARCH files
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
|
||||
bool
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_8
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_9
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_10
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_11
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_12
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_13
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_14
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_15
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_14
|
||||
|
||||
config BR2_ARCH_NEEDS_GCC_AT_LEAST_16
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_15
|
||||
|
||||
# The following string values are defined by the individual
|
||||
# Config.in.$ARCH files
|
||||
config BR2_ARCH
|
||||
string
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
config BR2_ENDIAN
|
||||
string
|
||||
|
||||
config BR2_ENDIAN
|
||||
config BR2_GCC_TARGET_TUNE
|
||||
string
|
||||
|
||||
config BR2_GCC_TARGET_ARCH
|
||||
@@ -342,63 +171,23 @@ config BR2_GCC_TARGET_ARCH
|
||||
config BR2_GCC_TARGET_ABI
|
||||
string
|
||||
|
||||
config BR2_GCC_TARGET_NAN
|
||||
string
|
||||
|
||||
config BR2_GCC_TARGET_FP32_MODE
|
||||
string
|
||||
|
||||
config BR2_GCC_TARGET_CPU
|
||||
string
|
||||
|
||||
# The value of this option will be passed as --with-fpu=<value> when
|
||||
# building gcc (internal backend) or -mfpu=<value> in the toolchain
|
||||
# wrapper (external toolchain)
|
||||
config BR2_GCC_TARGET_FPU
|
||||
string
|
||||
|
||||
# The value of this option will be passed as --with-float=<value> when
|
||||
# building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
|
||||
# wrapper (external toolchain)
|
||||
config BR2_GCC_TARGET_FLOAT_ABI
|
||||
string
|
||||
|
||||
# The value of this option will be passed as --with-simd=<value> when
|
||||
# building gcc (internal backend) or -simd=<value> in the toolchain
|
||||
# wrapper (external toolchain)
|
||||
config BR2_GCC_TARGET_SIMD
|
||||
string
|
||||
|
||||
# The value of this option will be passed as --with-mode=<value> when
|
||||
# building gcc (internal backend) or -m<value> in the toolchain
|
||||
# wrapper (external toolchain)
|
||||
config BR2_GCC_TARGET_MODE
|
||||
string
|
||||
|
||||
# Must be selected by binary formats that support shared libraries.
|
||||
config BR2_BINFMT_SUPPORTS_SHARED
|
||||
bool
|
||||
|
||||
# Must match the name of the architecture from readelf point of view,
|
||||
# i.e the "Machine:" field of readelf output. See get_machine_name()
|
||||
# in binutils/readelf.c for the list of possible values.
|
||||
config BR2_READELF_ARCH_NAME
|
||||
string
|
||||
|
||||
if BR2_arcle
|
||||
source "arch/Config.in.arc"
|
||||
endif
|
||||
|
||||
if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
|
||||
if BR2_arm || BR2_armeb
|
||||
source "arch/Config.in.arm"
|
||||
endif
|
||||
|
||||
if BR2_hppa
|
||||
source "arch/Config.in.hppa"
|
||||
if BR2_aarch64
|
||||
source "arch/Config.in.aarch64"
|
||||
endif
|
||||
|
||||
if BR2_loongarch64
|
||||
source "arch/Config.in.loongarch"
|
||||
if BR2_avr32
|
||||
source "arch/Config.in.avr32"
|
||||
endif
|
||||
|
||||
if BR2_bfin
|
||||
source "arch/Config.in.bfin"
|
||||
endif
|
||||
|
||||
if BR2_m68k
|
||||
@@ -413,27 +202,15 @@ if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
|
||||
source "arch/Config.in.mips"
|
||||
endif
|
||||
|
||||
if BR2_or1k
|
||||
source "arch/Config.in.or1k"
|
||||
endif
|
||||
|
||||
if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
|
||||
if BR2_powerpc
|
||||
source "arch/Config.in.powerpc"
|
||||
endif
|
||||
|
||||
if BR2_riscv
|
||||
source "arch/Config.in.riscv"
|
||||
endif
|
||||
|
||||
if BR2_s390x
|
||||
source "arch/Config.in.s390x"
|
||||
endif
|
||||
|
||||
if BR2_sh
|
||||
if BR2_sh || BR2_sh64
|
||||
source "arch/Config.in.sh"
|
||||
endif
|
||||
|
||||
if BR2_sparc || BR2_sparc64
|
||||
if BR2_sparc
|
||||
source "arch/Config.in.sparc"
|
||||
endif
|
||||
|
||||
@@ -444,40 +221,3 @@ endif
|
||||
if BR2_xtensa
|
||||
source "arch/Config.in.xtensa"
|
||||
endif
|
||||
|
||||
# Set up target binary format
|
||||
choice
|
||||
prompt "Target Binary Format"
|
||||
default BR2_BINFMT_ELF if BR2_USE_MMU
|
||||
default BR2_BINFMT_FLAT
|
||||
|
||||
config BR2_BINFMT_ELF
|
||||
bool "ELF"
|
||||
depends on BR2_USE_MMU
|
||||
select BR2_BINFMT_SUPPORTS_SHARED
|
||||
help
|
||||
ELF (Executable and Linkable Format) is a format for libraries
|
||||
and executables used across different architectures and
|
||||
operating systems.
|
||||
|
||||
config BR2_BINFMT_FDPIC
|
||||
bool "FDPIC"
|
||||
depends on BR2_ARCH_HAS_FDPIC_SUPPORT
|
||||
select BR2_BINFMT_SUPPORTS_SHARED
|
||||
help
|
||||
ELF FDPIC binaries are based on ELF, but allow the individual
|
||||
load segments of a binary to be located in memory
|
||||
independently of each other. This makes this format ideal for
|
||||
use in environments where no MMU is available.
|
||||
|
||||
config BR2_BINFMT_FLAT
|
||||
bool "FLAT"
|
||||
depends on !BR2_USE_MMU
|
||||
help
|
||||
FLAT binary is a relatively simple and lightweight executable
|
||||
format based on the original a.out format. It is widely used
|
||||
in environment where no MMU is available.
|
||||
|
||||
endchoice
|
||||
|
||||
endmenu # Target options
|
||||
|
||||
5
arch/Config.in.aarch64
Normal file
5
arch/Config.in.aarch64
Normal file
@@ -0,0 +1,5 @@
|
||||
config BR2_ARCH
|
||||
default "aarch64" if BR2_aarch64
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "LITTLE"
|
||||
@@ -1,127 +0,0 @@
|
||||
choice
|
||||
prompt "Target CPU"
|
||||
default BR2_arc770d
|
||||
depends on BR2_arc
|
||||
help
|
||||
Specific CPU to use
|
||||
|
||||
config BR2_arc750d
|
||||
bool "ARC 750D"
|
||||
|
||||
config BR2_arc770d
|
||||
bool "ARC 770D"
|
||||
|
||||
config BR2_archs38
|
||||
bool "ARC HS38"
|
||||
help
|
||||
Generic ARC HS capable of running Linux, i.e. with MMU,
|
||||
caches and 32-bit multiplier. Also it corresponds to the
|
||||
default configuration in older GNU toolchain versions.
|
||||
|
||||
config BR2_archs38_64mpy
|
||||
bool "ARC HS38 with 64-bit mpy"
|
||||
help
|
||||
Fully featured ARC HS capable of running Linux, i.e. with
|
||||
MMU, caches and 64-bit multiplier.
|
||||
|
||||
If you're not sure which version of ARC HS core you build
|
||||
for use this one.
|
||||
|
||||
config BR2_archs38_full
|
||||
bool "ARC HS38 with Quad MAC & FPU"
|
||||
help
|
||||
Fully featured ARC HS with additional support for
|
||||
- Dual- and quad multiply and MC operations
|
||||
- Double-precision FPU
|
||||
|
||||
It corresponds to "hs38_slc_full" ARC HS template in
|
||||
ARChitect.
|
||||
|
||||
config BR2_archs4x_rel31
|
||||
bool "ARC HS48 rel 31"
|
||||
help
|
||||
Build for HS48 release 3.1
|
||||
|
||||
config BR2_archs4x
|
||||
bool "ARC HS48"
|
||||
help
|
||||
Latest release of HS48 processor
|
||||
- Dual and Quad multiply and MAC operations
|
||||
- Double-precision FPU
|
||||
|
||||
endchoice
|
||||
|
||||
# Choice of atomic instructions presence
|
||||
config BR2_ARC_ATOMIC_EXT
|
||||
bool "Atomic extension (LLOCK/SCOND instructions)"
|
||||
default y if BR2_arc770d
|
||||
default y if BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full
|
||||
default y if BR2_archs4x_rel31 || BR2_archs4x
|
||||
|
||||
config BR2_ARCH
|
||||
default "arc"
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "arc"
|
||||
|
||||
config BR2_arc
|
||||
bool
|
||||
default y
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "LITTLE"
|
||||
|
||||
config BR2_GCC_TARGET_CPU
|
||||
default "arc700" if BR2_arc750d
|
||||
default "arc700" if BR2_arc770d
|
||||
default "archs" if BR2_archs38
|
||||
default "hs38" if BR2_archs38_64mpy
|
||||
default "hs38_linux" if BR2_archs38_full
|
||||
default "hs4x_rel31" if BR2_archs4x_rel31
|
||||
default "hs4x" if BR2_archs4x
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "ARCompact" if BR2_arc750d || BR2_arc770d
|
||||
default "ARCv2" if BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full
|
||||
default "ARCv2" if BR2_archs4x_rel31 || BR2_archs4x
|
||||
|
||||
choice
|
||||
prompt "MMU Page Size"
|
||||
default BR2_ARC_PAGE_SIZE_8K
|
||||
help
|
||||
MMU starting from version 3 (found in ARC 770) and now
|
||||
version 4 (found in ARC HS38) allows the selection of the
|
||||
page size during ASIC design creation.
|
||||
|
||||
The following options are available for MMU v3 and v4: 4kB,
|
||||
8kB and 16 kB.
|
||||
|
||||
The default is 8 kB (that really matches the only page size
|
||||
in MMU v2). It is important to build a toolchain with page
|
||||
size matching the hardware configuration. Otherwise
|
||||
user-space applications will fail at runtime.
|
||||
|
||||
config BR2_ARC_PAGE_SIZE_4K
|
||||
bool "4KB"
|
||||
depends on !BR2_arc750d
|
||||
|
||||
config BR2_ARC_PAGE_SIZE_8K
|
||||
bool "8KB"
|
||||
help
|
||||
This is the one and only option available for MMUv2 and
|
||||
default value for MMU v3 and v4.
|
||||
|
||||
config BR2_ARC_PAGE_SIZE_16K
|
||||
bool "16KB"
|
||||
depends on !BR2_arc750d
|
||||
|
||||
endchoice
|
||||
|
||||
config BR2_ARC_PAGE_SIZE
|
||||
string
|
||||
default "4K" if BR2_ARC_PAGE_SIZE_4K
|
||||
default "8K" if BR2_ARC_PAGE_SIZE_8K
|
||||
default "16K" if BR2_ARC_PAGE_SIZE_16K
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
1011
arch/Config.in.arm
1011
arch/Config.in.arm
File diff suppressed because it is too large
Load Diff
5
arch/Config.in.avr32
Normal file
5
arch/Config.in.avr32
Normal file
@@ -0,0 +1,5 @@
|
||||
config BR2_ARCH
|
||||
default "avr32"
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "BIG"
|
||||
16
arch/Config.in.bfin
Normal file
16
arch/Config.in.bfin
Normal file
@@ -0,0 +1,16 @@
|
||||
choice
|
||||
prompt "Target ABI"
|
||||
depends on BR2_bfin
|
||||
default BR2_BFIN_FDPIC
|
||||
config BR2_BFIN_FDPIC
|
||||
bool "FDPIC"
|
||||
config BR2_BFIN_FLAT
|
||||
bool "FLAT"
|
||||
select BR2_PREFER_STATIC_LIB
|
||||
endchoice
|
||||
|
||||
config BR2_ARCH
|
||||
default "bfin"
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "LITTLE"
|
||||
@@ -1,22 +0,0 @@
|
||||
choice
|
||||
prompt "Target Architecture Type"
|
||||
help
|
||||
Architecture type (or version) to use.
|
||||
|
||||
config BR2_parisc10
|
||||
bool "PA-RISC 1.0"
|
||||
config BR2_parisc11
|
||||
bool "PA-RISC 1.1"
|
||||
endchoice
|
||||
|
||||
config BR2_ARCH
|
||||
default "hppa"
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "parisc"
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "BIG"
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "HPPA"
|
||||
@@ -1,138 +0,0 @@
|
||||
# LoongArch CPU
|
||||
|
||||
choice
|
||||
prompt "Target Architecture Variant"
|
||||
default BR2_loongarch64_generic if BR2_ARCH_IS_64
|
||||
|
||||
config BR2_loongarch64_generic
|
||||
bool "Generic LoongArch 64-bit"
|
||||
depends on BR2_ARCH_IS_64
|
||||
help
|
||||
Generic LoongArch 64-bit processor.
|
||||
|
||||
config BR2_loongarch64_v1_0
|
||||
bool "LoongArch64 ISA version 1.0"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_14
|
||||
help
|
||||
LoongArch64 ISA version 1.0 processor.
|
||||
|
||||
config BR2_loongarch64_v1_1
|
||||
bool "LoongArch64 ISA version 1.1"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_14
|
||||
help
|
||||
LoongArch64 ISA version 1.1 processor.
|
||||
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "FPU Type"
|
||||
default BR2_LOONGARCH_FPU_64
|
||||
|
||||
config BR2_LOONGARCH_FPU_64
|
||||
bool "64"
|
||||
help
|
||||
Allow the use of hardware floating-point instructions for
|
||||
32-bit and 64-bit operations.
|
||||
|
||||
config BR2_LOONGARCH_FPU_32
|
||||
bool "32"
|
||||
# Only supported by lp64s and lp64f ABIs which are marked as broken
|
||||
depends on BR2_BROKEN
|
||||
help
|
||||
Allow the use of hardware floating-point instructions for
|
||||
32-bit operations only.
|
||||
|
||||
config BR2_LOONGARCH_FPU_NONE
|
||||
bool "none"
|
||||
# Only supported by lp64s ABI which is marked as broken
|
||||
depends on BR2_BROKEN
|
||||
help
|
||||
Prevent the use of hardware floating-point instructions.
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "SIMD Type"
|
||||
default BR2_LOONGARCH_SIMD_NONE
|
||||
|
||||
config BR2_LOONGARCH_SIMD_NONE
|
||||
bool "none"
|
||||
help
|
||||
Prevent the use of hardware SIMD instructions.
|
||||
|
||||
config BR2_LOONGARCH_SIMD_LSX
|
||||
bool "LSX"
|
||||
depends on BR2_LOONGARCH_FPU_64
|
||||
help
|
||||
Enable generating instructions from the 128-bit LoongArch SIMD
|
||||
Extension (LSX).
|
||||
|
||||
config BR2_LOONGARCH_SIMD_LASX
|
||||
bool "LASX"
|
||||
depends on BR2_LOONGARCH_FPU_64
|
||||
help
|
||||
Enable generating instructions from the 256-bit LoongArch
|
||||
Advanced SIMD Extension (LASX) and the 128-bit LoongArch
|
||||
SIMD Extension (LSX).
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "Target ABI"
|
||||
default BR2_LOONGARCH_ABI_LP64D if BR2_ARCH_IS_64 && BR2_LOONGARCH_FPU_64
|
||||
default BR2_LOONGARCH_ABI_LP64F if BR2_ARCH_IS_64 && BR2_LOONGARCH_FPU_32
|
||||
default BR2_LOONGARCH_ABI_LP64S if BR2_ARCH_IS_64 && BR2_LOONGARCH_SIMD_NONE
|
||||
|
||||
config BR2_LOONGARCH_ABI_LP64D
|
||||
bool "lp64d"
|
||||
depends on BR2_ARCH_IS_64
|
||||
depends on BR2_LOONGARCH_FPU_64
|
||||
|
||||
config BR2_LOONGARCH_ABI_LP64F
|
||||
bool "lp64f"
|
||||
depends on BR2_ARCH_IS_64
|
||||
# Failed to build host GCC initial, pending investigation
|
||||
depends on BR2_BROKEN
|
||||
depends on BR2_LOONGARCH_FPU_64 || BR2_LOONGARCH_FPU_32
|
||||
|
||||
config BR2_LOONGARCH_ABI_LP64S
|
||||
bool "lp64s"
|
||||
depends on BR2_ARCH_IS_64
|
||||
# GCC can't find libraries, pending investigation
|
||||
depends on BR2_BROKEN
|
||||
endchoice
|
||||
|
||||
config BR2_ARCH
|
||||
default "loongarch64" if BR2_ARCH_IS_64
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "loongarch"
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "LITTLE"
|
||||
|
||||
config BR2_GCC_TARGET_ARCH
|
||||
default "loongarch64" if BR2_loongarch64_generic
|
||||
default "la64v1.0" if BR2_loongarch64_v1_0
|
||||
default "la64v1.1" if BR2_loongarch64_v1_1
|
||||
|
||||
config BR2_GCC_TARGET_FPU
|
||||
default "64" if BR2_LOONGARCH_FPU_64
|
||||
default "32" if BR2_LOONGARCH_FPU_32
|
||||
default "none" if BR2_LOONGARCH_FPU_NONE
|
||||
|
||||
config BR2_GCC_TARGET_SIMD
|
||||
default "lasx" if BR2_LOONGARCH_SIMD_LASX
|
||||
default "lsx" if BR2_LOONGARCH_SIMD_LSX
|
||||
default "none" if BR2_LOONGARCH_FPU_NONE
|
||||
|
||||
config BR2_GCC_TARGET_ABI
|
||||
default "lp64d" if BR2_LOONGARCH_ABI_LP64D
|
||||
default "lp64f" if BR2_LOONGARCH_ABI_LP64F
|
||||
default "lp64s" if BR2_LOONGARCH_ABI_LP64S
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "LoongArch"
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
@@ -1,52 +1,21 @@
|
||||
config BR2_ARCH
|
||||
default "m68k" if BR2_m68k
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "m68k"
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "BIG"
|
||||
|
||||
# symbols used to distinguish between m68k and coldfire
|
||||
# for gcc multilib
|
||||
config BR2_m68k_m68k
|
||||
bool
|
||||
|
||||
config BR2_m68k_cf
|
||||
bool
|
||||
|
||||
# coldfire variants will be added later
|
||||
choice
|
||||
prompt "Target CPU"
|
||||
default BR2_m68k_68040
|
||||
depends on BR2_m68k
|
||||
help
|
||||
Specific CPU variant to use
|
||||
|
||||
config BR2_m68k_68030
|
||||
bool "68030"
|
||||
select BR2_m68k_m68k
|
||||
select BR2_USE_MMU
|
||||
|
||||
config BR2_m68k_68040
|
||||
bool "68040"
|
||||
select BR2_m68k_m68k
|
||||
select BR2_USE_MMU
|
||||
|
||||
config BR2_m68k_cf5208
|
||||
bool "5208"
|
||||
select BR2_m68k_cf
|
||||
select BR2_SOFT_FLOAT
|
||||
|
||||
endchoice
|
||||
|
||||
config BR2_GCC_TARGET_CPU
|
||||
config BR2_GCC_TARGET_TUNE
|
||||
default "68000" if BR2_m68k_68000
|
||||
default "68010" if BR2_m68k_68010
|
||||
default "68020" if BR2_m68k_68020
|
||||
default "68030" if BR2_m68k_68030
|
||||
default "68040" if BR2_m68k_68040
|
||||
default "5208" if BR2_m68k_cf5208
|
||||
default "68060" if BR2_m68k_68060
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "MC68000"
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
config BR2_GCC_TARGET_ARCH
|
||||
default "68000" if BR2_m68k_68000
|
||||
default "68010" if BR2_m68k_68010
|
||||
default "68020" if BR2_m68k_68020
|
||||
default "68030" if BR2_m68k_68030
|
||||
default "68040" if BR2_m68k_68040
|
||||
default "68060" if BR2_m68k_68060
|
||||
|
||||
@@ -1,20 +1,10 @@
|
||||
config BR2_ARCH
|
||||
default "microblazeel" if BR2_microblazeel
|
||||
default "microblaze" if BR2_microblazebe
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "microblaze"
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "LITTLE" if BR2_microblazeel
|
||||
default "BIG" if BR2_microblazebe
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "Xilinx MicroBlaze"
|
||||
|
||||
config BR2_microblaze
|
||||
bool
|
||||
default y if BR2_microblazeel || BR2_microblazebe
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
|
||||
@@ -1,282 +1,78 @@
|
||||
# mips default CPU ISAs
|
||||
config BR2_MIPS_CPU_MIPS32
|
||||
bool
|
||||
select BR2_MIPS_NAN_LEGACY
|
||||
config BR2_MIPS_CPU_MIPS32R2
|
||||
bool
|
||||
select BR2_MIPS_NAN_LEGACY
|
||||
config BR2_MIPS_CPU_MIPS32R3
|
||||
bool
|
||||
select BR2_MIPS_NAN_LEGACY
|
||||
config BR2_MIPS_CPU_MIPS32R5
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
|
||||
config BR2_MIPS_CPU_MIPS32R6
|
||||
bool
|
||||
select BR2_MIPS_NAN_2008
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
|
||||
config BR2_MIPS_CPU_MIPS64
|
||||
bool
|
||||
select BR2_MIPS_NAN_LEGACY
|
||||
config BR2_MIPS_CPU_MIPS64R2
|
||||
bool
|
||||
select BR2_MIPS_NAN_LEGACY
|
||||
config BR2_MIPS_CPU_MIPS64R3
|
||||
bool
|
||||
select BR2_MIPS_NAN_LEGACY
|
||||
config BR2_MIPS_CPU_MIPS64R5
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
|
||||
config BR2_MIPS_CPU_MIPS64R6
|
||||
bool
|
||||
select BR2_MIPS_NAN_2008
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
|
||||
|
||||
choice
|
||||
prompt "Target Architecture Variant"
|
||||
default BR2_mips_32 if BR2_mips || BR2_mipsel
|
||||
default BR2_mips_64 if BR2_mips64 || BR2_mips64el
|
||||
depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
|
||||
default BR2_mips_3 if BR2_mips
|
||||
default BR2_mips_1 if BR2_mipsel
|
||||
default BR2_mips_64 if BR2_mips64 || BR2_mips64el
|
||||
help
|
||||
Specific CPU variant to use
|
||||
|
||||
64bit capable: mips4, 64, 64r2, 64r3, 64r5, 64r6
|
||||
non-64bit capable: mips4, 32, 32r2, 32r3, 32r5, 32r6
|
||||
64bit cabable: 3, 4, 64, 64r2
|
||||
non-64bit capable: 1, 2, 32, 32r2
|
||||
|
||||
config BR2_mips_1
|
||||
bool "mips I (generic)"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
config BR2_mips_2
|
||||
bool "mips II"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
config BR2_mips_3
|
||||
bool "mips III"
|
||||
config BR2_mips_4
|
||||
bool "mips IV"
|
||||
config BR2_mips_32
|
||||
bool "Generic MIPS32"
|
||||
bool "mips 32"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS32
|
||||
config BR2_mips_32r2
|
||||
bool "Generic MIPS32R2"
|
||||
bool "mips 32r2"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS32R2
|
||||
config BR2_mips_32r3
|
||||
bool "Generic MIPS32R3"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS32R3
|
||||
config BR2_mips_32r5
|
||||
bool "Generic MIPS32R5"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS32R5
|
||||
config BR2_mips_32r6
|
||||
bool "Generic MIPS32R6"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS32R6
|
||||
config BR2_mips_interaptiv
|
||||
bool "interAptiv"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS32R2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
|
||||
config BR2_mips_m5150
|
||||
bool "M5150"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS32R5
|
||||
select BR2_MIPS_NAN_2008
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
|
||||
config BR2_mips_m6250
|
||||
bool "M6250"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
|
||||
select BR2_MIPS_CPU_MIPS32R6
|
||||
config BR2_mips_p5600
|
||||
bool "P5600"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS32R5
|
||||
select BR2_MIPS_NAN_2008
|
||||
config BR2_mips_xburst
|
||||
bool "XBurst"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS32R2
|
||||
help
|
||||
The Ingenic XBurst is a MIPS32R2 microprocessor. It has a
|
||||
bug in the FPU that can generate incorrect results in
|
||||
certain cases. The problem shows up when you have several
|
||||
fused madd instructions in sequence with dependant
|
||||
operands. This requires the -mno-fused-madd compiler option
|
||||
to be used in order to prevent emitting these instructions.
|
||||
|
||||
See http://www.ingenic.com/en/?xburst.html
|
||||
config BR2_mips4
|
||||
bool "MIPS IV"
|
||||
config BR2_mips_64
|
||||
bool "Generic MIPS64"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS64
|
||||
bool "mips 64"
|
||||
config BR2_mips_64r2
|
||||
bool "Generic MIPS64R2"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS64R2
|
||||
config BR2_mips_64r3
|
||||
bool "Generic MIPS64R3"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS64R3
|
||||
config BR2_mips_64r5
|
||||
bool "Generic MIPS64R5"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS64R5
|
||||
config BR2_mips_64r6
|
||||
bool "Generic MIPS64R6"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS64R6
|
||||
config BR2_mips_i6400
|
||||
bool "I6400"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS64R6
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
|
||||
config BR2_mips_octeon2
|
||||
bool "Octeon II"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS64R2
|
||||
help
|
||||
Marvell (formerly Cavium Networks) Octeon II CN60XX
|
||||
processors.
|
||||
config BR2_mips_octeon3
|
||||
bool "Octeon III"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_MIPS_CPU_MIPS64R3
|
||||
help
|
||||
Marvell (formerly Cavium Networks) Octeon III CN7XXX
|
||||
processors.
|
||||
config BR2_mips_p6600
|
||||
bool "P6600"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
|
||||
select BR2_MIPS_CPU_MIPS64R6
|
||||
bool "mips 64r2"
|
||||
endchoice
|
||||
|
||||
|
||||
choice
|
||||
prompt "Target ABI"
|
||||
default BR2_MIPS_NABI32
|
||||
depends on BR2_mips64 || BR2_mips64el
|
||||
depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
|
||||
default BR2_MIPS_OABI32 if !BR2_ARCH_IS_64
|
||||
default BR2_MIPS_NABI32 if BR2_ARCH_IS_64
|
||||
|
||||
help
|
||||
Application Binary Interface to use
|
||||
|
||||
config BR2_MIPS_OABI32
|
||||
bool "o32"
|
||||
config BR2_MIPS_NABI32
|
||||
bool "n32"
|
||||
depends on BR2_ARCH_IS_64
|
||||
select BR2_KERNEL_64_USERLAND_32
|
||||
config BR2_MIPS_NABI64
|
||||
bool "n64"
|
||||
depends on BR2_ARCH_IS_64
|
||||
endchoice
|
||||
|
||||
config BR2_MIPS_SOFT_FLOAT
|
||||
bool "Use soft-float"
|
||||
default y
|
||||
depends on !BR2_mips_octeon3 # hard-float only
|
||||
select BR2_SOFT_FLOAT
|
||||
help
|
||||
If your target CPU does not have a Floating Point Unit (FPU)
|
||||
or a kernel FPU emulator, but you still wish to support
|
||||
floating point functions, then everything will need to be
|
||||
compiled with soft floating point support (-msoft-float).
|
||||
|
||||
choice
|
||||
prompt "FP mode"
|
||||
default BR2_MIPS_FP32_MODE_XX
|
||||
depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT
|
||||
help
|
||||
MIPS32 supports different FP modes (32,xx,64). Information
|
||||
about FP modes can be found here:
|
||||
https://sourceware.org/binutils/docs/as/MIPS-Options.html
|
||||
https://dmz-portal.imgtec.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#5._Generating_modeless_code
|
||||
|
||||
config BR2_MIPS_FP32_MODE_32
|
||||
bool "32"
|
||||
depends on !BR2_MIPS_CPU_MIPS32R6
|
||||
|
||||
config BR2_MIPS_FP32_MODE_XX
|
||||
bool "xx"
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
|
||||
|
||||
config BR2_MIPS_FP32_MODE_64
|
||||
bool "64"
|
||||
depends on !BR2_MIPS_CPU_MIPS32
|
||||
endchoice
|
||||
|
||||
config BR2_GCC_TARGET_FP32_MODE
|
||||
default "32" if BR2_MIPS_FP32_MODE_32
|
||||
default "xx" if BR2_MIPS_FP32_MODE_XX
|
||||
default "64" if BR2_MIPS_FP32_MODE_64
|
||||
|
||||
config BR2_MIPS_NAN_LEGACY
|
||||
bool
|
||||
|
||||
config BR2_MIPS_NAN_2008
|
||||
bool
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
|
||||
choice
|
||||
prompt "Target NaN"
|
||||
default BR2_MIPS_ENABLE_NAN_2008
|
||||
depends on BR2_mips_32r5 || BR2_mips_64r5
|
||||
help
|
||||
MIPS supports two different NaN encodings, legacy and 2008.
|
||||
Information about MIPS NaN encodings can be found here:
|
||||
https://sourceware.org/binutils/docs/as/MIPS-NaN-Encodings.html
|
||||
|
||||
config BR2_MIPS_ENABLE_NAN_LEGACY
|
||||
bool "legacy"
|
||||
select BR2_MIPS_NAN_LEGACY
|
||||
|
||||
config BR2_MIPS_ENABLE_NAN_2008
|
||||
bool "2008"
|
||||
depends on !BR2_MIPS_SOFT_FLOAT
|
||||
select BR2_MIPS_NAN_2008
|
||||
endchoice
|
||||
|
||||
config BR2_GCC_TARGET_NAN
|
||||
default "legacy" if BR2_MIPS_NAN_LEGACY
|
||||
default "2008" if BR2_MIPS_NAN_2008
|
||||
|
||||
config BR2_ARCH
|
||||
default "mips" if BR2_mips
|
||||
default "mipsel" if BR2_mipsel
|
||||
default "mips64" if BR2_mips64
|
||||
default "mips64el" if BR2_mips64el
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "mips"
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "LITTLE" if BR2_mipsel || BR2_mips64el
|
||||
default "BIG" if BR2_mips || BR2_mips64
|
||||
default "BIG" if BR2_mips || BR2_mips64
|
||||
|
||||
config BR2_GCC_TARGET_ARCH
|
||||
config BR2_GCC_TARGET_TUNE
|
||||
default "mips1" if BR2_mips_1
|
||||
default "mips2" if BR2_mips_2
|
||||
default "mips3" if BR2_mips_3
|
||||
default "mips4" if BR2_mips_4
|
||||
default "mips32" if BR2_mips_32
|
||||
default "mips32r2" if BR2_mips_32r2
|
||||
default "mips32r3" if BR2_mips_32r3
|
||||
default "mips32r5" if BR2_mips_32r5
|
||||
default "mips32r6" if BR2_mips_32r6
|
||||
default "interaptiv" if BR2_mips_interaptiv
|
||||
default "m5101" if BR2_mips_m5150
|
||||
default "m6201" if BR2_mips_m6250
|
||||
default "p5600" if BR2_mips_p5600
|
||||
default "mips32r2" if BR2_mips_xburst
|
||||
default "mips64" if BR2_mips_64
|
||||
default "mips64r2" if BR2_mips_64r2
|
||||
default "mips64r3" if BR2_mips_64r3
|
||||
default "mips64r5" if BR2_mips_64r5
|
||||
default "mips64r6" if BR2_mips_64r6
|
||||
default "i6400" if BR2_mips_i6400
|
||||
default "octeon2" if BR2_mips_octeon2
|
||||
default "octeon3" if BR2_mips_octeon3
|
||||
default "p6600" if BR2_mips_p6600
|
||||
default "mips4" if BR2_mips4
|
||||
|
||||
config BR2_MIPS_OABI32
|
||||
bool
|
||||
default y if BR2_mips || BR2_mipsel
|
||||
|
||||
config BR2_GCC_TARGET_ABI
|
||||
default "32" if BR2_MIPS_OABI32
|
||||
default "n32" if BR2_MIPS_NABI32
|
||||
default "64" if BR2_MIPS_NABI64
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "MIPS R3000"
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
|
||||
@@ -1,14 +0,0 @@
|
||||
config BR2_ARCH
|
||||
default "or1k"
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "openrisc"
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "BIG"
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "OpenRISC 1000"
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
@@ -1,184 +1,102 @@
|
||||
config BR2_POWERPC_CPU_HAS_ALTIVEC
|
||||
bool
|
||||
|
||||
config BR2_POWERPC_CPU_HAS_VSX
|
||||
bool
|
||||
select BR2_POWERPC_CPU_HAS_ALTIVEC
|
||||
|
||||
config BR2_POWERPC_CPU_HAS_SPE
|
||||
bool
|
||||
|
||||
choice
|
||||
prompt "Target Architecture Variant"
|
||||
depends on BR2_powerpc
|
||||
default BR2_generic_powerpc
|
||||
help
|
||||
Specific CPU variant to use
|
||||
config BR2_generic_powerpc
|
||||
bool "generic"
|
||||
# No C library supports this variant on ppc64le
|
||||
depends on BR2_powerpc || BR2_powerpc64
|
||||
config BR2_powerpc_401
|
||||
bool "401"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_403
|
||||
bool "403"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_405
|
||||
bool "405"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_405fp
|
||||
bool "405 with FPU"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_440
|
||||
bool "440"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_440fp
|
||||
bool "440 with FPU"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_464
|
||||
bool "464"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_464fp
|
||||
bool "464 with FPU"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_476
|
||||
bool "476"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_476fp
|
||||
bool "476 with FPU"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_505
|
||||
bool "505"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_601
|
||||
bool "601"
|
||||
config BR2_powerpc_602
|
||||
bool "602"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_603
|
||||
bool "603"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_603e
|
||||
bool "603e"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_604
|
||||
bool "604"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_604e
|
||||
bool "604e"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_620
|
||||
bool "620"
|
||||
depends on BR2_powerpc || BR2_powerpc64
|
||||
config BR2_powerpc_630
|
||||
bool "630"
|
||||
depends on BR2_powerpc || BR2_powerpc64
|
||||
config BR2_powerpc_740
|
||||
bool "740"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_7400
|
||||
bool "7400"
|
||||
depends on BR2_powerpc
|
||||
select BR2_POWERPC_CPU_HAS_ALTIVEC
|
||||
config BR2_powerpc_7450
|
||||
bool "7450"
|
||||
depends on BR2_powerpc
|
||||
select BR2_POWERPC_CPU_HAS_ALTIVEC
|
||||
config BR2_powerpc_750
|
||||
bool "750"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_801
|
||||
bool "801"
|
||||
config BR2_powerpc_821
|
||||
bool "821"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_823
|
||||
bool "823"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_860
|
||||
bool "860"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_970
|
||||
bool "970"
|
||||
depends on BR2_powerpc || BR2_powerpc64
|
||||
select BR2_POWERPC_CPU_HAS_ALTIVEC
|
||||
config BR2_powerpc_8540
|
||||
bool "8540 / e500v1"
|
||||
depends on BR2_powerpc
|
||||
select BR2_POWERPC_CPU_HAS_SPE
|
||||
config BR2_powerpc_8548
|
||||
bool "8548 / e500v2"
|
||||
depends on BR2_powerpc
|
||||
select BR2_POWERPC_CPU_HAS_SPE
|
||||
config BR2_powerpc_e300c2
|
||||
bool "e300c2"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_e300c3
|
||||
bool "e300c3"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_e500mc
|
||||
bool "e500mc"
|
||||
depends on BR2_powerpc
|
||||
config BR2_powerpc_e5500
|
||||
bool "e5500"
|
||||
depends on BR2_powerpc || BR2_powerpc64
|
||||
config BR2_powerpc_e6500
|
||||
bool "e6500"
|
||||
depends on BR2_powerpc || BR2_powerpc64
|
||||
select BR2_POWERPC_CPU_HAS_ALTIVEC
|
||||
config BR2_powerpc_power4
|
||||
bool "power4"
|
||||
depends on BR2_powerpc || BR2_powerpc64
|
||||
config BR2_powerpc_power5
|
||||
bool "power5"
|
||||
depends on BR2_powerpc || BR2_powerpc64
|
||||
config BR2_powerpc_power6
|
||||
bool "power6"
|
||||
depends on BR2_powerpc || BR2_powerpc64
|
||||
select BR2_POWERPC_CPU_HAS_ALTIVEC
|
||||
config BR2_powerpc_power7
|
||||
bool "power7"
|
||||
depends on BR2_powerpc || BR2_powerpc64
|
||||
select BR2_POWERPC_CPU_HAS_VSX
|
||||
config BR2_powerpc_power8
|
||||
bool "power8"
|
||||
select BR2_POWERPC_CPU_HAS_VSX
|
||||
config BR2_powerpc_power9
|
||||
bool "power9"
|
||||
select BR2_POWERPC_CPU_HAS_ALTIVEC
|
||||
select BR2_POWERPC_CPU_HAS_VSX
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
|
||||
endchoice
|
||||
|
||||
config BR2_POWERPC_SOFT_FLOAT
|
||||
bool "Use soft-float"
|
||||
select BR2_SOFT_FLOAT
|
||||
choice
|
||||
prompt "Target ABI"
|
||||
depends on BR2_powerpc
|
||||
default BR2_powerpc_SPE if BR2_powerpc_8540 || BR2_powerpc_8548
|
||||
default BR2_powerpc_CLASSIC
|
||||
help
|
||||
If your target CPU does not have a Floating Point Unit (FPU)
|
||||
or a kernel FPU emulator, but you still wish to support
|
||||
floating point functions, then everything will need to be
|
||||
compiled with soft floating point support (-msoft-float).
|
||||
Application Binary Interface to use
|
||||
|
||||
config BR2_powerpc_CLASSIC
|
||||
bool "Classic"
|
||||
depends on !(BR2_powerpc_8540 || BR2_powerpc_8548)
|
||||
config BR2_powerpc_SPE
|
||||
bool "SPE"
|
||||
depends on BR2_powerpc_8540 || BR2_powerpc_8548
|
||||
endchoice
|
||||
|
||||
config BR2_ARCH
|
||||
default "powerpc" if BR2_powerpc
|
||||
default "powerpc64" if BR2_powerpc64
|
||||
default "powerpc64le" if BR2_powerpc64le
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "powerpc"
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "BIG" if BR2_powerpc || BR2_powerpc64
|
||||
default "LITTLE" if BR2_powerpc64le
|
||||
default "BIG"
|
||||
|
||||
config BR2_GCC_TARGET_CPU
|
||||
config BR2_GCC_TARGET_TUNE
|
||||
default "401" if BR2_powerpc_401
|
||||
default "403" if BR2_powerpc_403
|
||||
default "405" if BR2_powerpc_405
|
||||
default "405fp" if BR2_powerpc_405fp
|
||||
default "440" if BR2_powerpc_440
|
||||
default "440fp" if BR2_powerpc_440fp
|
||||
default "464" if BR2_powerpc_464
|
||||
default "464fp" if BR2_powerpc_464fp
|
||||
default "476" if BR2_powerpc_476
|
||||
default "476fp" if BR2_powerpc_476fp
|
||||
default "505" if BR2_powerpc_505
|
||||
default "601" if BR2_powerpc_601
|
||||
default "602" if BR2_powerpc_602
|
||||
default "603" if BR2_powerpc_603
|
||||
default "603e" if BR2_powerpc_603e
|
||||
@@ -190,6 +108,7 @@ config BR2_GCC_TARGET_CPU
|
||||
default "7400" if BR2_powerpc_7400
|
||||
default "7450" if BR2_powerpc_7450
|
||||
default "750" if BR2_powerpc_750
|
||||
default "801" if BR2_powerpc_801
|
||||
default "821" if BR2_powerpc_821
|
||||
default "823" if BR2_powerpc_823
|
||||
default "860" if BR2_powerpc_860
|
||||
@@ -199,18 +118,11 @@ config BR2_GCC_TARGET_CPU
|
||||
default "e300c2" if BR2_powerpc_e300c2
|
||||
default "e300c3" if BR2_powerpc_e300c3
|
||||
default "e500mc" if BR2_powerpc_e500mc
|
||||
default "e5500" if BR2_powerpc_e5500
|
||||
default "e6500" if BR2_powerpc_e6500
|
||||
default "power4" if BR2_powerpc_power4
|
||||
default "power5" if BR2_powerpc_power5
|
||||
default "power6" if BR2_powerpc_power6
|
||||
default "power7" if BR2_powerpc_power7
|
||||
default "power8" if BR2_powerpc_power8
|
||||
default "power9" if BR2_powerpc_power9
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "PowerPC" if BR2_powerpc
|
||||
default "PowerPC64" if BR2_powerpc64 || BR2_powerpc64le
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
config BR2_GCC_TARGET_ABI
|
||||
default "altivec" if BR2_PPC_ABI_altivec
|
||||
default "no-altivec" if BR2_PPC_ABI_no-altivec
|
||||
default "spe" if BR2_PPC_ABI_spe
|
||||
default "no-spe" if BR2_PPC_ABI_no-spe
|
||||
default "ibmlongdouble" if BR2_PPC_ABI_ibmlongdouble
|
||||
default "ieeelongdouble" if BR2_PPC_ABI_ieeelongdouble
|
||||
|
||||
@@ -1,133 +0,0 @@
|
||||
# RISC-V CPU ISA extensions.
|
||||
|
||||
choice
|
||||
prompt "Target Architecture Variant"
|
||||
default BR2_riscv_g
|
||||
|
||||
config BR2_riscv_g
|
||||
bool "General purpose (G)"
|
||||
select BR2_RISCV_ISA_RVI
|
||||
select BR2_RISCV_ISA_RVM
|
||||
select BR2_RISCV_ISA_RVA
|
||||
select BR2_RISCV_ISA_RVF
|
||||
select BR2_RISCV_ISA_RVD
|
||||
help
|
||||
General purpose (G) is equivalent to IMAFD.
|
||||
|
||||
config BR2_riscv_custom
|
||||
bool "Custom architecture"
|
||||
select BR2_RISCV_ISA_RVI
|
||||
|
||||
endchoice
|
||||
|
||||
comment "Instruction Set Extensions"
|
||||
|
||||
config BR2_RISCV_ISA_RVI
|
||||
bool "Base Integer (I)"
|
||||
|
||||
config BR2_RISCV_ISA_RVM
|
||||
bool "Integer Multiplication and Division (M)"
|
||||
|
||||
config BR2_RISCV_ISA_RVA
|
||||
bool "Atomic Instructions (A)"
|
||||
|
||||
config BR2_RISCV_ISA_RVF
|
||||
bool "Single-precision Floating-point (F)"
|
||||
|
||||
config BR2_RISCV_ISA_RVD
|
||||
bool "Double-precision Floating-point (D)"
|
||||
depends on BR2_RISCV_ISA_RVF
|
||||
|
||||
config BR2_RISCV_ISA_RVC
|
||||
bool "Compressed Instructions (C)"
|
||||
|
||||
config BR2_RISCV_ISA_RVV
|
||||
bool "Vector Instructions (V)"
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
|
||||
|
||||
config BR2_RISCV_ISA_EXTRA
|
||||
string "Append extra RISC-V ISA extensions"
|
||||
help
|
||||
Extra ISA extensions to append to the ISA extensions string.
|
||||
They are underscore-separated. For example,
|
||||
"zba_zbb_zvl256b".
|
||||
|
||||
choice
|
||||
prompt "Target Architecture Size"
|
||||
default BR2_RISCV_64
|
||||
|
||||
config BR2_RISCV_32
|
||||
bool "32-bit"
|
||||
|
||||
config BR2_RISCV_64
|
||||
bool "64-bit"
|
||||
select BR2_ARCH_IS_64
|
||||
|
||||
endchoice
|
||||
|
||||
config BR2_RISCV_USE_MMU
|
||||
bool "MMU support"
|
||||
default y
|
||||
select BR2_USE_MMU
|
||||
help
|
||||
Enable this option if your RISC-V core has a MMU (Memory
|
||||
Management Unit).
|
||||
|
||||
choice
|
||||
prompt "Target ABI"
|
||||
default BR2_RISCV_ABI_ILP32D if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
|
||||
default BR2_RISCV_ABI_ILP32F if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
|
||||
default BR2_RISCV_ABI_ILP32 if !BR2_ARCH_IS_64
|
||||
default BR2_RISCV_ABI_LP64D if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
|
||||
default BR2_RISCV_ABI_LP64F if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
|
||||
default BR2_RISCV_ABI_LP64 if BR2_ARCH_IS_64
|
||||
|
||||
config BR2_RISCV_ABI_ILP32
|
||||
bool "ilp32"
|
||||
depends on !BR2_ARCH_IS_64
|
||||
|
||||
config BR2_RISCV_ABI_ILP32F
|
||||
bool "ilp32f"
|
||||
depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
|
||||
|
||||
config BR2_RISCV_ABI_ILP32D
|
||||
bool "ilp32d"
|
||||
depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
|
||||
|
||||
config BR2_RISCV_ABI_LP64
|
||||
bool "lp64"
|
||||
depends on BR2_ARCH_IS_64
|
||||
|
||||
config BR2_RISCV_ABI_LP64F
|
||||
bool "lp64f"
|
||||
depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
|
||||
depends on BR2_USE_MMU
|
||||
|
||||
config BR2_RISCV_ABI_LP64D
|
||||
bool "lp64d"
|
||||
depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
|
||||
endchoice
|
||||
|
||||
config BR2_ARCH
|
||||
default "riscv32" if !BR2_ARCH_IS_64
|
||||
default "riscv64" if BR2_ARCH_IS_64
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "riscv"
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "LITTLE"
|
||||
|
||||
config BR2_GCC_TARGET_ABI
|
||||
default "ilp32" if BR2_RISCV_ABI_ILP32
|
||||
default "ilp32f" if BR2_RISCV_ABI_ILP32F
|
||||
default "ilp32d" if BR2_RISCV_ABI_ILP32D
|
||||
default "lp64" if BR2_RISCV_ABI_LP64
|
||||
default "lp64f" if BR2_RISCV_ABI_LP64F
|
||||
default "lp64d" if BR2_RISCV_ABI_LP64D
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "RISC-V"
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
@@ -1,32 +0,0 @@
|
||||
choice
|
||||
prompt "Target Architecture Variant"
|
||||
help
|
||||
Specific CPU variant to use
|
||||
|
||||
config BR2_s390x_z13
|
||||
bool "z13"
|
||||
|
||||
config BR2_s390x_z14
|
||||
bool "z14"
|
||||
|
||||
config BR2_s390x_z15
|
||||
bool "z15"
|
||||
|
||||
endchoice
|
||||
|
||||
config BR2_ARCH
|
||||
default "s390x" if BR2_s390x
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "s390"
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "BIG"
|
||||
|
||||
config BR2_GCC_TARGET_ARCH
|
||||
default "arch11" if BR2_s390x_z13
|
||||
default "arch12" if BR2_s390x_z14
|
||||
default "arch13" if BR2_s390x_z15
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "IBM S/390" if BR2_s390x
|
||||
@@ -1,10 +1,18 @@
|
||||
choice
|
||||
prompt "Target Architecture Variant"
|
||||
default BR2_sh4
|
||||
depends on BR2_sh
|
||||
default BR2_sh4
|
||||
help
|
||||
Specific CPU variant to use
|
||||
|
||||
config BR2_sh2
|
||||
bool "sh2 (SH2 big endian)"
|
||||
config BR2_sh2a
|
||||
bool "sh2a (SH2A big endian)"
|
||||
config BR2_sh3
|
||||
bool "sh3 (SH3 little endian)"
|
||||
config BR2_sh3eb
|
||||
bool "sh3eb (SH3 big endian)"
|
||||
config BR2_sh4
|
||||
bool "sh4 (SH4 little endian)"
|
||||
config BR2_sh4eb
|
||||
@@ -16,20 +24,18 @@ config BR2_sh4aeb
|
||||
endchoice
|
||||
|
||||
config BR2_ARCH
|
||||
default "sh2" if BR2_sh2
|
||||
default "sh2a" if BR2_sh2a
|
||||
default "sh3" if BR2_sh3
|
||||
default "sh3eb" if BR2_sh3eb
|
||||
default "sh4" if BR2_sh4
|
||||
default "sh4eb" if BR2_sh4eb
|
||||
default "sh4a" if BR2_sh4a
|
||||
default "sh4aeb" if BR2_sh4aeb
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "sh"
|
||||
default "sh64" if BR2_sh64
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "LITTLE" if BR2_sh4 || BR2_sh4a
|
||||
default "BIG" if BR2_sh4eb || BR2_sh4aeb
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "Renesas / SuperH SH"
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
default "LITTLE" if BR2_sh3 || BR2_sh4 || BR2_sh4a || \
|
||||
BR2_x86_64 || BR2_sh64
|
||||
default "BIG" if BR2_sh2 || BR2_sh2a || BR2_sh3eb || \
|
||||
BR2_sh4eb || BR2_sh4aeb
|
||||
|
||||
@@ -1,41 +1,69 @@
|
||||
choice
|
||||
prompt "Target Architecture Variant"
|
||||
default BR2_sparc_v8 if BR2_sparc
|
||||
default BR2_sparc_v9 if BR2_sparc64
|
||||
depends on BR2_sparc || BR2_sparc64
|
||||
depends on BR2_sparc
|
||||
default BR2_sparc_v7
|
||||
help
|
||||
Specific CPU variant to use
|
||||
|
||||
config BR2_sparc_v7
|
||||
bool "v7"
|
||||
config BR2_sparc_cypress
|
||||
bool "cypress"
|
||||
config BR2_sparc_v8
|
||||
bool "v8"
|
||||
depends on BR2_sparc
|
||||
config BR2_sparc_leon3
|
||||
bool "leon3"
|
||||
depends on BR2_sparc
|
||||
config BR2_sparc_v9
|
||||
bool "v9"
|
||||
depends on BR2_sparc64
|
||||
config BR2_sparc_sparchfleon
|
||||
bool "hfleon"
|
||||
config BR2_sparc_sparchfleonv8
|
||||
bool "hfleonv8"
|
||||
config BR2_sparc_sparcsfleon
|
||||
bool "sfleon"
|
||||
config BR2_sparc_sparcsfleonv8
|
||||
bool "sfleonv8"
|
||||
config BR2_sparc_supersparc
|
||||
bool "supersparc"
|
||||
config BR2_sparc_sparclite
|
||||
bool "sparclite"
|
||||
config BR2_sparc_f930
|
||||
bool "f930"
|
||||
config BR2_sparc_f934
|
||||
bool "f934"
|
||||
config BR2_sparc_hypersparc
|
||||
bool "hypersparc"
|
||||
config BR2_sparc_sparclite86x
|
||||
bool "sparclite86x"
|
||||
config BR2_sparc_sparclet
|
||||
bool "sparclet"
|
||||
config BR2_sparc_tsc701
|
||||
bool "tsc701"
|
||||
endchoice
|
||||
|
||||
config BR2_ARCH
|
||||
default "sparc" if BR2_sparc
|
||||
default "sparc64" if BR2_sparc64
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "sparc" if BR2_sparc
|
||||
default "sparc64" if BR2_sparc64
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "BIG"
|
||||
|
||||
config BR2_GCC_TARGET_CPU
|
||||
default "leon3" if BR2_sparc_leon3
|
||||
config BR2_GCC_TARGET_TUNE
|
||||
default "v7" if BR2_sparc_v7
|
||||
default "cypress" if BR2_sparc_cypress
|
||||
default "v8" if BR2_sparc_v8
|
||||
default "ultrasparc" if BR2_sparc_v9
|
||||
default "supersparc" if BR2_sparc_supersparc
|
||||
default "hypersparc" if BR2_sparc_hypersparc
|
||||
default "sparclite" if BR2_sparc_sparclite
|
||||
default "f930" if BR2_sparc_f930
|
||||
default "f934" if BR2_sparc_f934
|
||||
default "sparclite86x" if BR2_sparc_sparclite86x
|
||||
default "sparclet" if BR2_sparc_sparclet
|
||||
default "tsc701" if BR2_sparc_tsc701
|
||||
default "v9" if BR2_sparc_v9
|
||||
default "v9" if BR2_sparc_v9a
|
||||
default "v9" if BR2_sparc_v9b
|
||||
default "ultrasparc" if BR2_sparc_ultrasparc
|
||||
default "ultrasparc3" if BR2_sparc_ultrasparc3
|
||||
default "niagara" if BR2_sparc_niagara
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "Sparc" if BR2_sparc
|
||||
default "Sparc v9" if BR2_sparc64
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
config BR2_GCC_TARGET_CPU
|
||||
default "sparchfleon" if BR2_sparc_sparchfleon
|
||||
default "sparchfleonv8" if BR2_sparc_sparchfleonv8
|
||||
default "sparcsfleon" if BR2_sparc_sparcsfleon
|
||||
default "sparcsfleonv8" if BR2_sparc_sparcsfleonv8
|
||||
|
||||
@@ -1,8 +1,6 @@
|
||||
# i386/x86_64 cpu features
|
||||
config BR2_X86_CPU_HAS_MMX
|
||||
bool
|
||||
config BR2_X86_CPU_HAS_3DNOW
|
||||
bool
|
||||
config BR2_X86_CPU_HAS_SSE
|
||||
bool
|
||||
config BR2_X86_CPU_HAS_SSE2
|
||||
@@ -11,52 +9,26 @@ config BR2_X86_CPU_HAS_SSE3
|
||||
bool
|
||||
config BR2_X86_CPU_HAS_SSSE3
|
||||
bool
|
||||
config BR2_X86_CPU_HAS_SSE4
|
||||
bool
|
||||
config BR2_X86_CPU_HAS_SSE42
|
||||
bool
|
||||
config BR2_X86_CPU_HAS_AVX
|
||||
bool
|
||||
config BR2_X86_CPU_HAS_AVX2
|
||||
bool
|
||||
|
||||
# BR2_X86_CPU_HAS_AVX512 implies the following AVX512 extensions:
|
||||
# AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL
|
||||
# This subset is common to Intel Xeon (excl Xeon Phi), AMD Zen 4, and
|
||||
# the x86-64-v4 psABI.
|
||||
#
|
||||
# Only select BR2_X86_CPU_HAS_AVX512 if the CPU supports this entire
|
||||
# subset of extensions.
|
||||
config BR2_X86_CPU_HAS_AVX512
|
||||
bool
|
||||
|
||||
# This list of CPU architecture variant is (loosely) ordered according
|
||||
# to the gcc documentation at
|
||||
# https://gcc.gnu.org/onlinedocs/gcc-13.2.0/gcc/x86-Options.html
|
||||
choice
|
||||
prompt "Target Architecture Variant"
|
||||
default BR2_x86_i586 if BR2_i386
|
||||
depends on BR2_i386 || BR2_x86_64
|
||||
default BR2_x86_i586 if BR2_i386
|
||||
default BR2_x86_generic if BR2_x86_64
|
||||
help
|
||||
Specific CPU variant to use
|
||||
|
||||
config BR2_x86_generic
|
||||
bool "generic"
|
||||
config BR2_x86_i386
|
||||
bool "i386"
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_i486
|
||||
bool "i486"
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_i586
|
||||
bool "i586"
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_x1000
|
||||
bool "x1000"
|
||||
depends on !BR2_x86_64
|
||||
help
|
||||
The Intel X1000 is a Pentium class microprocessor in the
|
||||
Quark (sub-Atom) Product Line. The X1000 has a bug on the
|
||||
lock prefix requiring that prefix must be stripped at build
|
||||
time.
|
||||
|
||||
See https://en.wikipedia.org/wiki/Intel_Quark
|
||||
|
||||
config BR2_x86_i686
|
||||
bool "i686"
|
||||
depends on !BR2_x86_64
|
||||
@@ -65,108 +37,35 @@ config BR2_x86_pentiumpro
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_pentium_mmx
|
||||
bool "pentium MMX"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_pentium_m
|
||||
bool "pentium mobile"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_pentium2
|
||||
bool "pentium2"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_pentium3
|
||||
bool "pentium3"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_pentium4
|
||||
bool "pentium4"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_prescott
|
||||
bool "prescott"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
config BR2_x86_x86_64
|
||||
bool "x86-64"
|
||||
depends on BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
help
|
||||
This option corresponds to -march=x86-64, documented as a
|
||||
"Generic CPU with 64-bit extensions" by the GCC
|
||||
documentation. It is a 64-bit CPU with MMX, SSE and SSE2
|
||||
support.
|
||||
config BR2_x86_x86_64_v2
|
||||
bool "x86-64-v2"
|
||||
depends on BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
|
||||
help
|
||||
This option corresponds to the x86-64-v2 micro-architecture
|
||||
level, as defined by the x86-64 psABI document, see
|
||||
https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
|
||||
|
||||
It is close to the Nehalem CPU architecture, and is
|
||||
applicable for CPUs that support CMPXCHG16B, LAHF-SAHF,
|
||||
POPCNT, SSE3, SSE4.1, SSE4.2, SSSE3.
|
||||
config BR2_x86_x86_64_v3
|
||||
bool "x86-64-v3"
|
||||
depends on BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
|
||||
help
|
||||
This option corresponds to the x86-64-v3 micro-architecture
|
||||
level, as defined by the x86-64 psABI document, see
|
||||
https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
|
||||
|
||||
It is close to the Haswell CPU architecture, and is
|
||||
applicable for CPUs that support all of x86-64-v2 plus AVX,
|
||||
AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE.
|
||||
config BR2_x86_x86_64_v4
|
||||
bool "x86-64-v4"
|
||||
depends on BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
|
||||
help
|
||||
This option corresponds to the x86-64-v4 micro-architecture
|
||||
level, as defined by the x86-64 psABI document, see
|
||||
https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
|
||||
|
||||
It is applicable for CPUs that support all of x86-64-v3 plus
|
||||
AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL.
|
||||
config BR2_x86_nocona
|
||||
bool "nocona"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
@@ -180,123 +79,6 @@ config BR2_x86_core2
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
config BR2_x86_corei7
|
||||
bool "corei7"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
help
|
||||
This option is deprecated. Since gcc 4.9, the gcc option
|
||||
"nehalem" is preferred. Use BR2_x86_nehalem instead.
|
||||
config BR2_x86_nehalem
|
||||
bool "nehalem"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
config BR2_x86_westmere
|
||||
bool "westmere"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
config BR2_x86_corei7_avx
|
||||
bool "corei7-avx"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
help
|
||||
This option is deprecated. Since gcc 4.9, the gcc option
|
||||
"sandybridge" is preferred. Use BR2_x86_sandybridge instead.
|
||||
config BR2_x86_sandybridge
|
||||
bool "sandybridge"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
config BR2_x86_ivybridge
|
||||
bool "ivybridge"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
config BR2_x86_core_avx2
|
||||
bool "core-avx2"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
help
|
||||
This option is deprecated. Since gcc 4.9, the gcc option
|
||||
"haswell" is preferred. Use BR2_x86_haswell instead.
|
||||
config BR2_x86_haswell
|
||||
bool "haswell"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
config BR2_x86_broadwell
|
||||
bool "broadwell"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
config BR2_x86_skylake
|
||||
bool "skylake"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
|
||||
config BR2_x86_atom
|
||||
bool "atom"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
@@ -304,260 +86,23 @@ config BR2_x86_atom
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
help
|
||||
This option is deprecated. Since gcc 4.9, the gcc option
|
||||
"bonnell" is preferred. Use BR2_x86_bonnell instead.
|
||||
config BR2_x86_bonnell
|
||||
bool "bonnell"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
config BR2_x86_silvermont
|
||||
bool "silvermont"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
config BR2_x86_goldmont
|
||||
bool "goldmont"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
|
||||
config BR2_x86_goldmont_plus
|
||||
bool "goldmont-plus"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
|
||||
config BR2_x86_tremont
|
||||
bool "tremont"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
|
||||
config BR2_x86_sierraforest
|
||||
bool "sierraforest"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
|
||||
config BR2_x86_grandridge
|
||||
bool "grandridge"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
|
||||
config BR2_x86_skylake_avx512
|
||||
bool "skylake-avx512"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
|
||||
config BR2_x86_cannonlake
|
||||
bool "cannonlake"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
|
||||
config BR2_x86_icelake_client
|
||||
bool "icelake-client"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
|
||||
config BR2_x86_icelake_server
|
||||
bool "icelake-server"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
|
||||
config BR2_x86_cascadelake
|
||||
bool "cascadelake"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
|
||||
config BR2_x86_cooperlake
|
||||
bool "cooperlake"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
|
||||
config BR2_x86_tigerlake
|
||||
bool "tigerlake"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
|
||||
config BR2_x86_sapphirerapids
|
||||
bool "sapphirerapids"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
|
||||
help
|
||||
Use for Sapphire Rapids, Emerald Rapids
|
||||
config BR2_x86_alderlake
|
||||
bool "alderlake"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
|
||||
help
|
||||
Use for Alder Lake, Raptor Lake, Meteor Lake
|
||||
config BR2_x86_rocketlake
|
||||
bool "rocketlake"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
|
||||
config BR2_x86_graniterapids
|
||||
bool "graniterapids"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
|
||||
config BR2_x86_graniterapids_d
|
||||
bool "graniterapids-d"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
|
||||
config BR2_x86_k6
|
||||
bool "k6"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_k6_2
|
||||
bool "k6-2"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_3DNOW
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_athlon
|
||||
bool "athlon"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_3DNOW
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_athlon_4
|
||||
bool "athlon-4"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_3DNOW
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_opteron
|
||||
bool "opteron"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
@@ -575,166 +120,68 @@ config BR2_x86_barcelona
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
config BR2_x86_bobcat
|
||||
bool "bobcat"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
config BR2_x86_jaguar
|
||||
bool "jaguar"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
|
||||
config BR2_x86_bulldozer
|
||||
bool "bulldozer"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
config BR2_x86_piledriver
|
||||
bool "piledriver"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
config BR2_x86_steamroller
|
||||
bool "steamroller"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
|
||||
config BR2_x86_excavator
|
||||
bool "excavator"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
|
||||
config BR2_x86_zen
|
||||
bool "zen"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
|
||||
config BR2_x86_zen2
|
||||
bool "zen 2"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
|
||||
config BR2_x86_zen3
|
||||
bool "zen 3"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
|
||||
config BR2_x86_zen4
|
||||
bool "zen 4"
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
select BR2_X86_CPU_HAS_SSE2
|
||||
select BR2_X86_CPU_HAS_SSE3
|
||||
select BR2_X86_CPU_HAS_SSSE3
|
||||
select BR2_X86_CPU_HAS_SSE4
|
||||
select BR2_X86_CPU_HAS_SSE42
|
||||
select BR2_X86_CPU_HAS_AVX
|
||||
select BR2_X86_CPU_HAS_AVX2
|
||||
select BR2_X86_CPU_HAS_AVX512
|
||||
select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
|
||||
config BR2_x86_geode
|
||||
bool "AMD Geode"
|
||||
bool "geode"
|
||||
# Don't include MMX support because there several variant of geode
|
||||
# processor, some with MMX support, some without.
|
||||
# See: http://en.wikipedia.org/wiki/Geode_%28processor%29
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_3DNOW
|
||||
config BR2_x86_c3
|
||||
bool "Via/Cyrix C3 (Samuel/Ezra cores)"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_3DNOW
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_c32
|
||||
bool "Via C3-2 (Nehemiah cores)"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
select BR2_X86_CPU_HAS_SSE
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_winchip_c6
|
||||
bool "IDT Winchip C6"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
depends on !BR2_x86_64
|
||||
config BR2_x86_winchip2
|
||||
bool "IDT Winchip 2"
|
||||
depends on !BR2_x86_64
|
||||
select BR2_X86_CPU_HAS_MMX
|
||||
depends on !BR2_x86_64
|
||||
endchoice
|
||||
|
||||
config BR2_ARCH
|
||||
default "i386" if BR2_x86_i386
|
||||
default "i486" if BR2_x86_i486
|
||||
default "i586" if BR2_x86_i586
|
||||
default "i586" if BR2_x86_x1000
|
||||
default "i586" if BR2_x86_pentium_mmx
|
||||
default "i586" if BR2_x86_geode
|
||||
default "i586" if BR2_x86_c3
|
||||
default "i686" if BR2_x86_c32
|
||||
default "i586" if BR2_x86_winchip_c6
|
||||
default "i586" if BR2_x86_winchip2
|
||||
# We use the property of Kconfig that the first match of a
|
||||
# list of default will be chosen. So the following entry will
|
||||
# not match for all BR2_i386=y configurations, but only the
|
||||
# ones that didn't match any of the previous cases (i486,
|
||||
# i586).
|
||||
default "i686" if BR2_i386
|
||||
default "x86_64" if BR2_x86_64
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "i386" if !BR2_x86_64
|
||||
default "i686" if BR2_x86_i686
|
||||
default "i686" if BR2_x86_pentium2
|
||||
default "i686" if BR2_x86_pentium3
|
||||
default "i686" if BR2_x86_pentium4
|
||||
default "i686" if BR2_x86_pentium_m
|
||||
default "i686" if BR2_x86_pentiumpro
|
||||
default "i686" if BR2_x86_prescott
|
||||
default "i686" if BR2_x86_nocona && BR2_i386
|
||||
default "i686" if BR2_x86_core2 && BR2_i386
|
||||
default "i686" if BR2_x86_atom && BR2_i386
|
||||
default "i686" if BR2_x86_opteron && BR2_i386
|
||||
default "i686" if BR2_x86_opteron_sse3 && BR2_i386
|
||||
default "i686" if BR2_x86_barcelona && BR2_i386
|
||||
default "i686" if BR2_x86_k6
|
||||
default "i686" if BR2_x86_k6_2
|
||||
default "i686" if BR2_x86_athlon
|
||||
default "i686" if BR2_x86_athlon_4
|
||||
default "x86_64" if BR2_x86_64
|
||||
default "i386" if BR2_x86_generic
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "LITTLE"
|
||||
|
||||
config BR2_GCC_TARGET_ARCH
|
||||
config BR2_GCC_TARGET_TUNE
|
||||
default "i386" if BR2_x86_i386
|
||||
default "i486" if BR2_x86_i486
|
||||
default "i586" if BR2_x86_i586
|
||||
default "i586" if BR2_x86_x1000
|
||||
default "pentium-mmx" if BR2_x86_pentium_mmx
|
||||
default "i686" if BR2_x86_i686
|
||||
default "pentiumpro" if BR2_x86_pentiumpro
|
||||
@@ -743,55 +190,12 @@ config BR2_GCC_TARGET_ARCH
|
||||
default "pentium3" if BR2_x86_pentium3
|
||||
default "pentium4" if BR2_x86_pentium4
|
||||
default "prescott" if BR2_x86_prescott
|
||||
default "x86-64" if BR2_x86_x86_64
|
||||
default "x86-64-v2" if BR2_x86_x86_64_v2
|
||||
default "x86-64-v3" if BR2_x86_x86_64_v3
|
||||
default "x86-64-v4" if BR2_x86_x86_64_v4
|
||||
default "nocona" if BR2_x86_nocona
|
||||
default "core2" if BR2_x86_core2
|
||||
default "corei7" if BR2_x86_corei7
|
||||
default "nehalem" if BR2_x86_nehalem
|
||||
default "corei7-avx" if BR2_x86_corei7_avx
|
||||
default "sandybridge" if BR2_x86_sandybridge
|
||||
default "ivybridge" if BR2_x86_ivybridge
|
||||
default "core-avx2" if BR2_x86_core_avx2
|
||||
default "haswell" if BR2_x86_haswell
|
||||
default "broadwell" if BR2_x86_broadwell
|
||||
default "skylake" if BR2_x86_skylake
|
||||
default "atom" if BR2_x86_atom
|
||||
default "bonnell" if BR2_x86_bonnell
|
||||
default "westmere" if BR2_x86_westmere
|
||||
default "silvermont" if BR2_x86_silvermont
|
||||
default "goldmont" if BR2_x86_goldmont
|
||||
default "goldmont-plus" if BR2_x86_goldmont_plus
|
||||
default "tremont" if BR2_x86_tremont
|
||||
default "sierraforest" if BR2_x86_sierraforest
|
||||
default "grandridge" if BR2_x86_grandridge
|
||||
default "skylake-avx512" if BR2_x86_skylake_avx512
|
||||
default "cannonlake" if BR2_x86_cannonlake
|
||||
default "icelake-client" if BR2_x86_icelake_client
|
||||
default "icelake-server" if BR2_x86_icelake_server
|
||||
default "cascadelake" if BR2_x86_cascadelake
|
||||
default "cooperlake" if BR2_x86_cooperlake
|
||||
default "tigerlake" if BR2_x86_tigerlake
|
||||
default "sapphirerapids" if BR2_x86_sapphirerapids
|
||||
default "alderlake" if BR2_x86_alderlake
|
||||
default "rocketlake" if BR2_x86_rocketlake
|
||||
default "graniterapids" if BR2_x86_graniterapids
|
||||
default "graniterapids-d" if BR2_x86_graniterapids_d
|
||||
default "k8" if BR2_x86_opteron
|
||||
default "k8-sse3" if BR2_x86_opteron_sse3
|
||||
default "barcelona" if BR2_x86_barcelona
|
||||
default "btver1" if BR2_x86_bobcat
|
||||
default "btver2" if BR2_x86_jaguar
|
||||
default "bdver1" if BR2_x86_bulldozer
|
||||
default "bdver2" if BR2_x86_piledriver
|
||||
default "bdver3" if BR2_x86_steamroller
|
||||
default "bdver4" if BR2_x86_excavator
|
||||
default "znver1" if BR2_x86_zen
|
||||
default "znver2" if BR2_x86_zen2
|
||||
default "znver3" if BR2_x86_zen3
|
||||
default "znver4" if BR2_x86_zen4
|
||||
default "k6" if BR2_x86_k6
|
||||
default "k6-2" if BR2_x86_k6_2
|
||||
default "athlon" if BR2_x86_athlon
|
||||
@@ -801,10 +205,32 @@ config BR2_GCC_TARGET_ARCH
|
||||
default "c3" if BR2_x86_c3
|
||||
default "c3-2" if BR2_x86_c32
|
||||
default "geode" if BR2_x86_geode
|
||||
default "generic" if BR2_x86_generic
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "Intel 80386" if BR2_i386
|
||||
default "Advanced Micro Devices X86-64" if BR2_x86_64
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
config BR2_GCC_TARGET_ARCH
|
||||
default "i386" if BR2_x86_i386
|
||||
default "i486" if BR2_x86_i486
|
||||
default "i586" if BR2_x86_i586
|
||||
default "pentium-mmx" if BR2_x86_pentium_mmx
|
||||
default "i686" if BR2_x86_i686
|
||||
default "pentiumpro" if BR2_x86_pentiumpro
|
||||
default "pentium-m" if BR2_x86_pentium_m
|
||||
default "pentium2" if BR2_x86_pentium2
|
||||
default "pentium3" if BR2_x86_pentium3
|
||||
default "pentium4" if BR2_x86_pentium4
|
||||
default "prescott" if BR2_x86_prescott
|
||||
default "nocona" if BR2_x86_nocona
|
||||
default "core2" if BR2_x86_core2
|
||||
default "atom" if BR2_x86_atom
|
||||
default "k8" if BR2_x86_opteron
|
||||
default "k8-sse3" if BR2_x86_opteron_sse3
|
||||
default "barcelona" if BR2_x86_barcelona
|
||||
default "k6" if BR2_x86_k6
|
||||
default "k6-2" if BR2_x86_k6_2
|
||||
default "athlon" if BR2_x86_athlon
|
||||
default "athlon-4" if BR2_x86_athlon_4
|
||||
default "winchip-c6" if BR2_x86_winchip_c6
|
||||
default "winchip2" if BR2_x86_winchip2
|
||||
default "c3" if BR2_x86_c3
|
||||
default "c3-2" if BR2_x86_c32
|
||||
default "geode" if BR2_x86_geode
|
||||
|
||||
@@ -1,66 +1,37 @@
|
||||
choice
|
||||
prompt "Target Architecture Variant"
|
||||
default BR2_xtensa_fsf
|
||||
depends on BR2_xtensa
|
||||
|
||||
default BR2_xtensa_fsf
|
||||
config BR2_XTENSA_CUSTOM
|
||||
bool "Custom Xtensa processor configuration"
|
||||
|
||||
config BR2_xtensa_fsf
|
||||
bool "fsf - Default configuration"
|
||||
select BR2_USE_MMU
|
||||
|
||||
endchoice
|
||||
|
||||
config BR2_XTENSA_OVERLAY_FILE
|
||||
string "Overlay file for custom configuration"
|
||||
config BR2_XTENSA_CUSTOM_NAME
|
||||
string "Custom Xtensa processor configuration name"
|
||||
depends on BR2_XTENSA_CUSTOM
|
||||
default ""
|
||||
help
|
||||
Enter the path to the overlay tarball for a custom processor
|
||||
configuration.
|
||||
Name given to a custom Xtensa processor configuration.
|
||||
|
||||
These overlay files are tar packages with updated
|
||||
configuration files for various toolchain packages and Xtensa
|
||||
processor configurations. They are provided by the processor
|
||||
vendor or directly from Tensilica.
|
||||
config BR2_XTENSA_CORE_NAME
|
||||
string
|
||||
default BR2_XTENSA_CUSTOM_NAME if BR2_XTENSA_CUSTOM
|
||||
default "" if BR2_xtensa_fsf
|
||||
|
||||
The path can be either absolute, or relative to the top
|
||||
directory of buildroot.
|
||||
|
||||
choice
|
||||
prompt "Target Architecture Endianness"
|
||||
default BR2_XTENSA_LITTLE_ENDIAN
|
||||
config BR2_XTENSA_OVERLAY_DIR
|
||||
string "Overlay directory for custom configuration"
|
||||
depends on BR2_XTENSA_CUSTOM
|
||||
|
||||
config BR2_XTENSA_LITTLE_ENDIAN
|
||||
bool "Little endian"
|
||||
|
||||
config BR2_XTENSA_BIG_ENDIAN
|
||||
bool "Big endian"
|
||||
|
||||
endchoice
|
||||
|
||||
config BR2_XTENSA_USE_MMU
|
||||
bool "MMU support"
|
||||
default y
|
||||
depends on BR2_XTENSA_CUSTOM
|
||||
select BR2_USE_MMU
|
||||
default ""
|
||||
help
|
||||
Enable this option if your Xtensa core has a MMU (Memory
|
||||
Management Unit).
|
||||
|
||||
config BR2_ENDIAN
|
||||
default "LITTLE" if BR2_XTENSA_LITTLE_ENDIAN
|
||||
default "BIG" if BR2_xtensa_fsf || BR2_XTENSA_BIG_ENDIAN
|
||||
Provide the directory path that contains the overlay file
|
||||
for a custom processor configuration. The path is relative
|
||||
to the top directory of buildroot.
|
||||
These overlay files are tar packages with updated configuration
|
||||
files for various toolchain packages and Xtensa processor
|
||||
configurations. They are provided by the processor vendor or
|
||||
directly from Tensilica.
|
||||
|
||||
config BR2_ARCH
|
||||
default "xtensa" if BR2_xtensa
|
||||
|
||||
config BR2_NORMALIZED_ARCH
|
||||
default "xtensa"
|
||||
|
||||
config BR2_READELF_ARCH_NAME
|
||||
default "Tensilica Xtensa Processor"
|
||||
|
||||
# vim: ft=kconfig
|
||||
# -*- mode:kconfig; -*-
|
||||
|
||||
34
arch/arch.mk
34
arch/arch.mk
@@ -1,34 +0,0 @@
|
||||
################################################################################
|
||||
#
|
||||
# Architecture-specific definitions
|
||||
#
|
||||
################################################################################
|
||||
|
||||
# Allow GCC target configuration settings to be optionally
|
||||
# overwritten by architecture specific makefiles.
|
||||
|
||||
# Makefiles must use the GCC_TARGET_* variables below instead
|
||||
# of the BR2_GCC_TARGET_* versions.
|
||||
GCC_TARGET_ARCH := $(call qstrip,$(BR2_GCC_TARGET_ARCH))
|
||||
GCC_TARGET_ABI := $(call qstrip,$(BR2_GCC_TARGET_ABI))
|
||||
GCC_TARGET_NAN := $(call qstrip,$(BR2_GCC_TARGET_NAN))
|
||||
GCC_TARGET_FP32_MODE := $(call qstrip,$(BR2_GCC_TARGET_FP32_MODE))
|
||||
GCC_TARGET_CPU := $(call qstrip,$(BR2_GCC_TARGET_CPU))
|
||||
GCC_TARGET_FPU := $(call qstrip,$(BR2_GCC_TARGET_FPU))
|
||||
GCC_TARGET_FLOAT_ABI := $(call qstrip,$(BR2_GCC_TARGET_FLOAT_ABI))
|
||||
GCC_TARGET_SIMD := $(call qstrip,$(BR2_GCC_TARGET_SIMD))
|
||||
GCC_TARGET_MODE := $(call qstrip,$(BR2_GCC_TARGET_MODE))
|
||||
|
||||
# Explicitly set LD's "max-page-size" instead of relying on some defaults
|
||||
ifeq ($(BR2_ARC_PAGE_SIZE_4K)$(BR2_ARM64_PAGE_SIZE_4K),y)
|
||||
ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096
|
||||
else ifeq ($(BR2_ARC_PAGE_SIZE_8K),y)
|
||||
ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=8192 -Wl,-z,common-page-size=8192
|
||||
else ifeq ($(BR2_ARC_PAGE_SIZE_16K)$(BR2_ARM64_PAGE_SIZE_16K),y)
|
||||
ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=16384 -Wl,-z,common-page-size=16384
|
||||
else ifeq ($(BR2_ARM64_PAGE_SIZE_64K),y)
|
||||
ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=65536 -Wl,-z,common-page-size=65536
|
||||
endif
|
||||
|
||||
# Include any architecture specific makefiles.
|
||||
-include $(sort $(wildcard arch/arch.mk.*))
|
||||
@@ -1,8 +0,0 @@
|
||||
ifeq ($(BR2_arc),y)
|
||||
|
||||
# -matomic is always required when the ARC core has the atomic extensions
|
||||
ifeq ($(BR2_ARC_ATOMIC_EXT),y)
|
||||
ARCH_TOOLCHAIN_WRAPPER_OPTS += -matomic
|
||||
endif
|
||||
|
||||
endif
|
||||
@@ -1,13 +0,0 @@
|
||||
#
|
||||
# Configure the GCC_TARGET_ARCH variable.
|
||||
#
|
||||
|
||||
ifeq ($(BR2_hppa),y)
|
||||
|
||||
ifeq ($(BR2_parisc10),y)
|
||||
GCC_TARGET_ARCH := 1.0
|
||||
else ifeq ($(BR2_parisc11),y)
|
||||
GCC_TARGET_ARCH := 1.1
|
||||
endif
|
||||
|
||||
endif
|
||||
@@ -1,47 +0,0 @@
|
||||
#
|
||||
# Configure the GCC_TARGET_ARCH variable and append the
|
||||
# appropriate RISC-V ISA extensions.
|
||||
#
|
||||
|
||||
ifeq ($(BR2_riscv),y)
|
||||
|
||||
ifeq ($(BR2_RISCV_64),y)
|
||||
GCC_TARGET_ARCH := rv64i
|
||||
else
|
||||
GCC_TARGET_ARCH := rv32i
|
||||
endif
|
||||
|
||||
ifeq ($(BR2_RISCV_ISA_RVM),y)
|
||||
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)m
|
||||
endif
|
||||
ifeq ($(BR2_RISCV_ISA_RVA),y)
|
||||
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)a
|
||||
endif
|
||||
ifeq ($(BR2_RISCV_ISA_RVF),y)
|
||||
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)f
|
||||
endif
|
||||
ifeq ($(BR2_RISCV_ISA_RVD),y)
|
||||
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)d
|
||||
endif
|
||||
ifeq ($(BR2_RISCV_ISA_RVC),y)
|
||||
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)c
|
||||
endif
|
||||
ifeq ($(BR2_RISCV_ISA_RVV),y)
|
||||
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)v
|
||||
endif
|
||||
|
||||
# Starting from gcc 12.x, csr and fence instructions have been
|
||||
# separated from the base I instruction set, and special -march
|
||||
# suffixes are needed to enable their support. In Buildroot, we assume
|
||||
# all RISC-V cores that support Linux implement those instructions, so
|
||||
# we unconditionally enable those extensions.
|
||||
ifeq ($(BR2_TOOLCHAIN_GCC_AT_LEAST_12),y)
|
||||
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)_zicsr_zifencei
|
||||
endif
|
||||
|
||||
ARCH_RISV_ISA_EXTRA = $(call qstrip, $(BR2_RISCV_ISA_EXTRA))
|
||||
ifneq ($(ARCH_RISV_ISA_EXTRA),)
|
||||
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)_$(ARCH_RISV_ISA_EXTRA)
|
||||
endif
|
||||
|
||||
endif
|
||||
@@ -1,41 +0,0 @@
|
||||
BR_ARCH_XTENSA_OVERLAY_FILE = $(call qstrip,$(BR2_XTENSA_OVERLAY_FILE))
|
||||
|
||||
ifeq ($(BR_BUILDING)$(BR2_XTENSA_CUSTOM)$(BR2_TOOLCHAIN_BUILDROOT):$(BR_ARCH_XTENSA_OVERLAY_FILE),yyy:)
|
||||
$(error No xtensa overlay file provided. Check your BR2_XTENSA_OVERLAY_FILE setting)
|
||||
endif
|
||||
|
||||
################################################################################
|
||||
# This variable can be used by packages that need to extract the overlay.
|
||||
#
|
||||
# ARCH_XTENSA_OVERLAY_FILE is the path to the overlay tarball; empty if not
|
||||
# using any overlay
|
||||
#
|
||||
# Example:
|
||||
# ifneq ($(ARCH_XTENSA_OVERLAY_FILE),)
|
||||
# tar xf $(ARCH_XTENSA_OVERLAY_FILE) -C $(@D) --strip-components=1 gcc
|
||||
# endif
|
||||
################################################################################
|
||||
ifneq ($(filter http://% https://% ftp://% scp://%,$(BR_ARCH_XTENSA_OVERLAY_FILE)),)
|
||||
ARCH_XTENSA_OVERLAY_URL = $(BR_ARCH_XTENSA_OVERLAY_FILE)
|
||||
ARCH_XTENSA_OVERLAY_FILE = $($(PKG)_DL_DIR)/$(notdir $(BR_ARCH_XTENSA_OVERLAY_FILE))
|
||||
# Do not check that file, we can't know its hash
|
||||
BR_NO_CHECK_HASH_FOR += $(notdir $(ARCH_XTENSA_OVERLAY_URL))
|
||||
else
|
||||
ARCH_XTENSA_OVERLAY_FILE = $(BR_ARCH_XTENSA_OVERLAY_FILE)
|
||||
endif
|
||||
|
||||
################################################################################
|
||||
# arch-xtensa-overlay-extract -- extract an extensa overlay
|
||||
#
|
||||
# argument 1 is the path in which to extract
|
||||
# argument 2 is the component to extract, one of: gcc, binutils, gdb, linux,
|
||||
# u-boot
|
||||
#
|
||||
# Example:
|
||||
# $(call arch-xtensa-overlay-extract,/path/to/overlay.tar,$(@D),gcc)
|
||||
################################################################################
|
||||
define arch-xtensa-overlay-extract
|
||||
$(call suitable-extractor,$(ARCH_XTENSA_OVERLAY_FILE)) \
|
||||
$(ARCH_XTENSA_OVERLAY_FILE) | \
|
||||
$(TAR) --strip-components=1 -C $(1) $(TAR_OPTIONS) - $(2)
|
||||
endef
|
||||
@@ -1,30 +0,0 @@
|
||||
image efi-part.vfat {
|
||||
vfat {
|
||||
file EFI {
|
||||
image = "efi-part/EFI"
|
||||
}
|
||||
file Image {
|
||||
image = "Image"
|
||||
}
|
||||
}
|
||||
|
||||
size = 64M
|
||||
}
|
||||
|
||||
image disk.img {
|
||||
hdimage {
|
||||
partition-table-type = "gpt"
|
||||
}
|
||||
|
||||
partition boot {
|
||||
image = "efi-part.vfat"
|
||||
partition-type-uuid = U
|
||||
offset = 32K
|
||||
bootable = true
|
||||
}
|
||||
|
||||
partition root {
|
||||
partition-type-uuid = root-arm64
|
||||
image = "rootfs.ext2"
|
||||
}
|
||||
}
|
||||
@@ -1,6 +0,0 @@
|
||||
set default="0"
|
||||
set timeout="5"
|
||||
|
||||
menuentry "Buildroot" {
|
||||
linux /Image root=PARTLABEL=root rootwait
|
||||
}
|
||||
@@ -1,2 +0,0 @@
|
||||
# From https://www.kernel.org/pub/linux/kernel/v6.x/sha256sums.asc
|
||||
sha256 8d1934a72a185f1be6b56e3ad8ea31fd9a381ffec0346c69f06c90d776da7cb8 linux-6.18.14.tar.xz
|
||||
@@ -1,5 +0,0 @@
|
||||
#!/bin/sh
|
||||
|
||||
BOARD_DIR=$(dirname "$0")
|
||||
|
||||
cp -f "${BOARD_DIR}/grub.cfg" "${BINARIES_DIR}/efi-part/EFI/BOOT/grub.cfg"
|
||||
@@ -1,53 +0,0 @@
|
||||
|
||||
The aarch64_efi_defconfig allows to build a minimal Linux system that
|
||||
can boot on all AArch64 servers providing an EFI firmware.
|
||||
|
||||
This includes all Arm EBBR[1] compliant systems, and all Arm SystemReady[2]
|
||||
compliant systems for example.
|
||||
|
||||
|
||||
Building and booting
|
||||
====================
|
||||
|
||||
$ make aarch64_efi_defconfig
|
||||
$ make
|
||||
|
||||
The file output/images/disk.img is a complete disk image that can be
|
||||
booted, it includes the grub2 bootloader, Linux kernel and root
|
||||
filesystem.
|
||||
|
||||
Testing under Qemu
|
||||
==================
|
||||
|
||||
This image can also be tested using Qemu:
|
||||
|
||||
qemu-system-aarch64 \
|
||||
-M virt \
|
||||
-cpu cortex-a57 \
|
||||
-m 512 \
|
||||
-nographic \
|
||||
-bios </path/to/QEMU_EFI.fd> \
|
||||
-drive file=output/images/disk.img,if=none,format=raw,id=hd0 \
|
||||
-device virtio-blk-device,drive=hd0 \
|
||||
-netdev user,id=eth0 \
|
||||
-device virtio-net-device,netdev=eth0
|
||||
|
||||
Note that </path/to/QEMU_EFI.fd> needs to point to a valid aarch64 UEFI
|
||||
firmware image for qemu.
|
||||
It may be provided by your distribution as a edk2-aarch64 or AAVMF
|
||||
package, in path such as /usr/share/edk2/aarch64/QEMU_EFI.fd .
|
||||
|
||||
U-Boot based qemu firmware
|
||||
==========================
|
||||
|
||||
A qemu firmware with support for UEFI based on U-Boot can be built following
|
||||
the instructions in [3], with qemu_arm64_defconfig.
|
||||
|
||||
This should give you a nor_flash.bin, which you can use with qemu as an
|
||||
alternative to QEMU_EFI.fd. You will also need to change the machine
|
||||
specification to "-M virt,secure=on" on qemu command line, to enable TrustZone
|
||||
support, and you will need to increase the memory with "-m 1024".
|
||||
|
||||
[1]: https://github.com/ARM-software/ebbr
|
||||
[2]: https://developer.arm.com/architectures/system-architectures/arm-systemready
|
||||
[3]: https://github.com/glikely/u-boot-tfa-build
|
||||
@@ -1,340 +0,0 @@
|
||||
/*
|
||||
* acme-acqua.dts - Device Tree file for Acqua A5 Board
|
||||
*
|
||||
* Copyright (C) 2014 Atmel,
|
||||
* 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* 2022 Sergio Tanzilli <tanzilli@acmesystems.it>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "sama5d31.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Acme Systems Acqua SOM";
|
||||
compatible = "acme,acqua", "atmel,sama5d3", "atmel,sama5";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
bootargs = "mem=256M console=ttyS0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait net.ifnames=0";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x10000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
main_xtal {
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
hlcdc: hlcdc@f0030000 {
|
||||
status = "disabled";
|
||||
hlcdc-display-controller {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888_alt>;
|
||||
port@0 {
|
||||
hlcdc_panel_output: endpoint@0 {
|
||||
remote-endpoint = <&panel_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* MicroSD mounted on the SOM */
|
||||
|
||||
mmc0: mmc@f0000000 {
|
||||
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Optional MicroSD to mount on the carrier board */
|
||||
|
||||
mmc1: mmc@f8000000 {
|
||||
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
|
||||
status = "disabled";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioE 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@f0004000 {
|
||||
cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can0: can@f000c000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tcb0: timer@f0010000 {
|
||||
timer0: timer@0 {
|
||||
compatible = "atmel,tcb-timer";
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
timer1: timer@1 {
|
||||
compatible = "atmel,tcb-timer";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0: i2c@f0014000 {
|
||||
pinctrl-0 = <&pinctrl_i2c0_pu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@f0018000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
macb1: ethernet@f802c000 {
|
||||
compatible = "atmel,sama5d3-macb", "cdns,at91sam9260-macb", "cdns,macb";
|
||||
|
||||
status = "okay";
|
||||
phy-mode = "rmii";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
nvmem-cells = <ð0_addr>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
phy0: ethernet-phy@1 {
|
||||
interrupt-parent = <&pioE>;
|
||||
interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
/*ethernet-phy@1 {
|
||||
reg = <0x1>;
|
||||
};*/
|
||||
};
|
||||
|
||||
/* Bit banging internal I2C to manage the AT24MAC402 chip */
|
||||
|
||||
i2c3@ {
|
||||
compatible = "i2c-gpio";
|
||||
|
||||
sda-gpios = <&pioE 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
|
||||
scl-gpios = <&pioE 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3_gpio>;
|
||||
|
||||
i2c-gpio,delay-us = <4>; /* ~178 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* EEPROM contains the eth0 MAC address */
|
||||
|
||||
eeprom@58 {
|
||||
compatible = "atmel,24mac402";
|
||||
pagesize = <256>;
|
||||
read-only;
|
||||
reg = <0x58>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
eth0_addr: eth-mac-addr@9A {
|
||||
reg = <0x0 0x06>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pwm0: pwm@f002c000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@f001c000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@f0020000 {
|
||||
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: serial@f0024000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
spi1: spi@f8008000 {
|
||||
cs-gpios = <&pioC 25 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
adc0: adc@f8018000 {
|
||||
atmel,adc-vref = <3300>;
|
||||
atmel,adc-channels-used = <0xfe>;
|
||||
pinctrl-0 = <
|
||||
&pinctrl_adc0_adtrg
|
||||
&pinctrl_adc0_ad1
|
||||
&pinctrl_adc0_ad2
|
||||
&pinctrl_adc0_ad3
|
||||
&pinctrl_adc0_ad4
|
||||
&pinctrl_adc0_ad5
|
||||
&pinctrl_adc0_ad6
|
||||
&pinctrl_adc0_ad7
|
||||
>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@f801c000 {
|
||||
dmas = <0>, <0>; /* Do not use DMA for i2c2 */
|
||||
pinctrl-0 = <&pinctrl_i2c2_pu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
dbgu: serial@ffffee00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl@fffff200 {
|
||||
|
||||
atmel,mux-mask = <
|
||||
/* A B C */
|
||||
0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
|
||||
0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
|
||||
0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
|
||||
0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
|
||||
0xfffffff9 0xbf9f8000 0x18000000 /* pioE */
|
||||
/* 0xffffffff 0xb8000000 0x18000000 */ /* pioE */
|
||||
>;
|
||||
|
||||
board {
|
||||
pinctrl_i2c0_pu: i2c0_pu {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2_pu: i2c2_pu {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3_gpio: i2c3-gpio {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
|
||||
AT91_PIOE 2 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
|
||||
pinctrl_key_gpio: key_gpio_0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
};
|
||||
|
||||
pinctrl_mmc0_cd: mmc0_cd {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
};
|
||||
|
||||
pinctrl_mmc1_cd: mmc1_cd {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
};
|
||||
|
||||
pinctrl_usba_vbus: usba_vbus {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PE9, conflicts with A9 */
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpio_leds_default {
|
||||
atmel,pins =
|
||||
<AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
|
||||
AT91_PIOE 4 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
|
||||
AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
|
||||
AT91_PIOE 6 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb0: gadget@500000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb1: usb@600000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb2: usb@700000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
|
||||
panel: panel {
|
||||
/* compatible = "acme,43inch", "simple-panel"; */
|
||||
compatible = "acme,50inch", "simple-panel";
|
||||
/* compatible = "acme,70inch", "simple-panel"; */
|
||||
|
||||
status = "disable";
|
||||
|
||||
port@0 {
|
||||
panel_input: endpoint@0 {
|
||||
remote-endpoint = <&hlcdc_panel_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0 {
|
||||
label = "led0";
|
||||
gpios = <&pioE 3 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led1 {
|
||||
label = "led1";
|
||||
gpios = <&pioE 4 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2 {
|
||||
label = "led2";
|
||||
gpios = <&pioE 5 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led3 {
|
||||
label = "led3";
|
||||
gpios = <&pioE 6 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -1,29 +0,0 @@
|
||||
# Minimal SD card image for the Acme Systems Acqua A5
|
||||
|
||||
image boot.vfat {
|
||||
vfat {
|
||||
files = {
|
||||
"boot.bin",
|
||||
"zImage",
|
||||
"at91-sama5d3_acqua.dtb"
|
||||
}
|
||||
}
|
||||
|
||||
size = 16M
|
||||
}
|
||||
|
||||
image sdcard.img {
|
||||
hdimage {
|
||||
}
|
||||
|
||||
partition boot {
|
||||
partition-type = 0xC
|
||||
bootable = "true"
|
||||
image = "boot.vfat"
|
||||
}
|
||||
|
||||
partition rootfs {
|
||||
partition-type = 0x83
|
||||
image = "rootfs.ext4"
|
||||
}
|
||||
}
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 5ea2a8fed1ba0024229c6f6d77176679e1b24791bdbce8e285634013d4a93551 at91bootstrap3-v3.10.3-git4.tar.gz
|
||||
@@ -1 +0,0 @@
|
||||
../linux/linux.hash
|
||||
@@ -1,2 +0,0 @@
|
||||
# From https://www.kernel.org/pub/linux/kernel/v6.x/sha256sums.asc
|
||||
sha256 37f0c5d5c242c1d604e87d48f08795e861a5a85f725b4ca11d0a538f12ff8cff linux-6.18.8.tar.xz
|
||||
@@ -1,44 +0,0 @@
|
||||
Acme Systems Acqua A5
|
||||
|
||||
Intro
|
||||
=====
|
||||
|
||||
The Acqua A5 is a system on module based on the Microchip SAMA5D31 SoC:
|
||||
|
||||
https://www.acmesystems.it/acqua
|
||||
|
||||
The files here support configurations that build a microSD image for a
|
||||
minimal system that can be accessed through the serial console. You will
|
||||
need an USB-to-serial interface in order to access that console from
|
||||
your computer:
|
||||
|
||||
https://www.acmesystems.it/DPI
|
||||
|
||||
How to build the image
|
||||
======================
|
||||
|
||||
If you have an Acqua module with 256 MiB of RAM, type:
|
||||
|
||||
$ make acmesystems_acqua_a5_256mb_defconfig
|
||||
|
||||
If you have the 512 MiB version, type instead:
|
||||
|
||||
$ make acmesystems_acqua_a5_512mb_defconfig
|
||||
|
||||
You can optionally tweak the configuration and add packages by typing:
|
||||
|
||||
$ make menuconfig
|
||||
|
||||
Then, proceed with the build:
|
||||
|
||||
$ make
|
||||
|
||||
How to write the microSD card
|
||||
=============================
|
||||
|
||||
The system image is the file "sdcard.img" in the "output/images"
|
||||
directory. Write it to the card by invoking:
|
||||
|
||||
$ sudo dd if=output/images/sdcard.img of=/dev/sdX bs=1M
|
||||
|
||||
where `sdX' is the block device representing the microSD card.
|
||||
@@ -1,36 +0,0 @@
|
||||
# Minimal SD card image for the Acmesystems Aria G25
|
||||
|
||||
image boot.vfat {
|
||||
vfat {
|
||||
file zImage {
|
||||
image = "zImage"
|
||||
}
|
||||
|
||||
file at91-ariag25.dtb {
|
||||
image = "at91-ariag25.dtb"
|
||||
}
|
||||
|
||||
file boot.bin {
|
||||
image = "at91sam9x5_aria-sdcardboot-linux-zimage-dt-3.10.3.bin"
|
||||
}
|
||||
}
|
||||
|
||||
size = 16M
|
||||
}
|
||||
|
||||
image sdcard.img {
|
||||
hdimage {
|
||||
}
|
||||
|
||||
partition boot {
|
||||
partition-type = 0xC
|
||||
bootable = "true"
|
||||
image = "boot.vfat"
|
||||
}
|
||||
|
||||
partition rootfs {
|
||||
partition-type = 0x83
|
||||
image = "rootfs.ext4"
|
||||
size = 512M
|
||||
}
|
||||
}
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 5ea2a8fed1ba0024229c6f6d77176679e1b24791bdbce8e285634013d4a93551 at91bootstrap3-v3.10.3-git4.tar.gz
|
||||
@@ -1 +0,0 @@
|
||||
../linux/linux.hash
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 6c5e4d3c87feadbfdb9f7d2e46f3f120b00286ba380491c5956708e0b94232c8 linux-4.19.315.tar.xz
|
||||
@@ -1,44 +0,0 @@
|
||||
Acme Systems Aria G25
|
||||
|
||||
Build instructions
|
||||
==================
|
||||
|
||||
To build an image for the Aria G25 choose the configuration
|
||||
corresponding to the Aria variant.
|
||||
|
||||
For 128MB RAM variant type:
|
||||
|
||||
$ make acmesystems_aria_g25_128mb_defconfig
|
||||
|
||||
else for 256MB RAM variant type:
|
||||
|
||||
$ make acmesystems_aria_g25_256mb_defconfig
|
||||
|
||||
To customize the configuration choosed type:
|
||||
|
||||
$ make menuconfig
|
||||
|
||||
When you are ready to start building Buildroot type:
|
||||
|
||||
$ make
|
||||
|
||||
How to write the microSD card
|
||||
=============================
|
||||
|
||||
Once the build process is finished you will have an image called
|
||||
"sdcard.img" in the output/images/ directory.
|
||||
|
||||
Write the bootable SD card image "sdcard.img" onto an SD card with
|
||||
"dd" command:
|
||||
|
||||
$ sudo dd if=output/images/sdcard.img of=/dev/sdX
|
||||
|
||||
Assuming your Aria G25 baseboard has a MicroSD socket, for example
|
||||
with the Terra baseboard, insert the microSD card into the baseboard
|
||||
slot and power it.
|
||||
|
||||
To get the kernel log messages you can use a DPI cable
|
||||
(http://www.acmesystems.it/DPI)
|
||||
|
||||
You can find additional informations, tutorials and a very
|
||||
comprehensive documentation on http://www.acmesystems.it/aria.
|
||||
@@ -1,36 +0,0 @@
|
||||
# Minimal SD card image for the Acmesystems Arietta G25
|
||||
|
||||
image boot.vfat {
|
||||
vfat {
|
||||
file zImage {
|
||||
image = "zImage"
|
||||
}
|
||||
|
||||
file acme-arietta.dtb {
|
||||
image = "at91-ariettag25.dtb"
|
||||
}
|
||||
|
||||
file boot.bin {
|
||||
image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.10.3.bin"
|
||||
}
|
||||
}
|
||||
|
||||
size = 16M
|
||||
}
|
||||
|
||||
image sdcard.img {
|
||||
hdimage {
|
||||
}
|
||||
|
||||
partition boot {
|
||||
partition-type = 0xC
|
||||
bootable = "true"
|
||||
image = "boot.vfat"
|
||||
}
|
||||
|
||||
partition rootfs {
|
||||
partition-type = 0x83
|
||||
image = "rootfs.ext4"
|
||||
size = 512M
|
||||
}
|
||||
}
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 5ea2a8fed1ba0024229c6f6d77176679e1b24791bdbce8e285634013d4a93551 at91bootstrap3-v3.10.3-git4.tar.gz
|
||||
@@ -1 +0,0 @@
|
||||
../linux/linux.hash
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 6c5e4d3c87feadbfdb9f7d2e46f3f120b00286ba380491c5956708e0b94232c8 linux-4.19.315.tar.xz
|
||||
@@ -1,49 +0,0 @@
|
||||
Acme Systems Arietta G25
|
||||
|
||||
Intro
|
||||
=====
|
||||
|
||||
This default configuration will allow you to start experimenting with the
|
||||
buildroot environment for the Arietta G25. With the current configuration
|
||||
it will bring-up the board, and allow access through the serial console.
|
||||
|
||||
You can find additional informations, tutorials and a very comprehensive
|
||||
documentation on http://www.acmesystems.it/arietta.
|
||||
|
||||
Build instructions
|
||||
==================
|
||||
|
||||
To build an image for the Arietta G25 choose the configuration
|
||||
corresponding to the Arietta variant.
|
||||
|
||||
For 128MB RAM variant type:
|
||||
|
||||
$ make acmesystems_arietta_g25_128mb_defconfig
|
||||
|
||||
else for 256MB RAM variant type:
|
||||
|
||||
$ make acmesystems_arietta_g25_256mb_defconfig
|
||||
|
||||
To customize the configuration chosen type:
|
||||
|
||||
$ make menuconfig
|
||||
|
||||
When you are ready to start building Buildroot type:
|
||||
|
||||
$ make
|
||||
|
||||
How to write the microSD card
|
||||
=============================
|
||||
|
||||
Once the build process is finished you will have an image called "sdcard.img"
|
||||
in the output/images/ directory.
|
||||
|
||||
Copy the bootable "sdcard.img" onto an SD card with "dd":
|
||||
|
||||
$ sudo dd if=output/images/sdcard.img of=/dev/sdX
|
||||
|
||||
Insert the microSD card into the Arietta slot and power it.
|
||||
|
||||
The image just built is fairly basic and the only output
|
||||
you will get is on serial console, please consider to use a DPI
|
||||
cable (http://www.acmesystems.it/DPI)
|
||||
@@ -1,4 +0,0 @@
|
||||
label Vyasa linux-next
|
||||
kernel /boot/uImage
|
||||
devicetree /boot/rk3288-vyasa.dtb
|
||||
append console=ttyS2,115200n8 root=/dev/mmcblk0p1 rootwait
|
||||
@@ -1,22 +0,0 @@
|
||||
image sdcard.img {
|
||||
hdimage {
|
||||
}
|
||||
|
||||
partition u-boot-tpl-spl-dtb {
|
||||
in-partition-table = "no"
|
||||
image = "u-boot-tpl-spl-dtb.img"
|
||||
offset = 32K
|
||||
}
|
||||
|
||||
partition u-boot-dtb {
|
||||
in-partition-table = "no"
|
||||
image = "u-boot-dtb.img"
|
||||
offset = 8M
|
||||
size = 30M # falcon mode: args @ 16M args, uImage @ 17M
|
||||
}
|
||||
|
||||
partition rootfs {
|
||||
partition-type = 0x83
|
||||
image = "rootfs.ext4"
|
||||
}
|
||||
}
|
||||
@@ -1,3 +0,0 @@
|
||||
# Currently mainline kernel exhibits issues when running rockchip gmac
|
||||
# on the board, so enable it as loadable module and insert it later
|
||||
CONFIG_DWMAC_ROCKCHIP=m
|
||||
@@ -1 +0,0 @@
|
||||
../linux/linux.hash
|
||||
@@ -1,2 +0,0 @@
|
||||
# From https://www.kernel.org/pub/linux/kernel/v6.x/sha256sums.asc
|
||||
sha256 37f0c5d5c242c1d604e87d48f08795e861a5a85f725b4ca11d0a538f12ff8cff linux-6.18.8.tar.xz
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 b60d5865cefdbc75da8da4156c56c458e00de75a49b80c1a2e58a96e30ad0d54 u-boot-2026.01.tar.bz2
|
||||
@@ -1,9 +0,0 @@
|
||||
#!/bin/sh
|
||||
|
||||
MKIMAGE=$HOST_DIR/bin/mkimage
|
||||
BOARD_DIR="$(dirname $0)"
|
||||
|
||||
$MKIMAGE -n rk3288 -T rksd -d $BINARIES_DIR/u-boot-tpl.bin $BINARIES_DIR/u-boot-tpl.img
|
||||
cat $BINARIES_DIR/u-boot-tpl.img $BINARIES_DIR/u-boot-spl-dtb.bin > $BINARIES_DIR/u-boot-tpl-spl-dtb.img
|
||||
|
||||
install -m 0644 -D $BOARD_DIR/extlinux.conf $TARGET_DIR/boot/extlinux/extlinux.conf
|
||||
@@ -1,31 +0,0 @@
|
||||
Vyasa RK3288
|
||||
============
|
||||
|
||||
Vyasa is RK3288 based Single board computer with fully supported opensource software.
|
||||
|
||||
https://openedev.amarulasolutions.com/display/ODWIKI/Vyasa+RK3288
|
||||
|
||||
How to build it
|
||||
===============
|
||||
|
||||
$ make amarula_vyasa_rk3288_defconfig
|
||||
|
||||
Then you can edit the build options using
|
||||
|
||||
$ make menuconfig
|
||||
|
||||
Compile all and build rootfs image:
|
||||
|
||||
$ make
|
||||
|
||||
Prepare your SDCard
|
||||
===================
|
||||
|
||||
Buildroot generates a ready-to-use SD card image that you can flash directly to
|
||||
the card. The image will be in output/images/sdcard.img.
|
||||
You can write this image directly to an SD card device (i.e. /dev/xxx):
|
||||
|
||||
$ sudo dd if=output/images/sdcard.img of=/dev/xxx
|
||||
$ sudo sync
|
||||
|
||||
Finally, you can insert the SD card to the Vyasa RK3288 board, close J4 and boot it.
|
||||
@@ -1,26 +0,0 @@
|
||||
image boot.vfat {
|
||||
vfat {
|
||||
files = {
|
||||
"u-boot-spl.bin",
|
||||
"u-boot.itb",
|
||||
"ae350_ax45mp.dtb",
|
||||
}
|
||||
}
|
||||
size = 2M
|
||||
}
|
||||
|
||||
image sdcard.img {
|
||||
hdimage {
|
||||
}
|
||||
|
||||
partition boot {
|
||||
partition-type = 0xC
|
||||
image = "boot.vfat"
|
||||
}
|
||||
|
||||
partition rootfs {
|
||||
partition-type = 0x83
|
||||
bootable = true
|
||||
image = "rootfs.ext4"
|
||||
}
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../linux/linux.hash
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 c71af3d2c86c0a0deca4f54b51d1c35217082b030052cc3513dc42e852652733 linux-v6.0.y-andes.tar.gz
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 d11702103f177a2914e94eec57ce5ed820296d874f6b6525c4482e55d71a3667 opensbi-1.6.tar.gz
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 0f933f6c5a426895bf306e93e6ac53c60870e4b54cda56d95211bec99e63bec7 u-boot-2025.07.tar.bz2
|
||||
@@ -1,3 +0,0 @@
|
||||
#!/bin/sh
|
||||
cp "$BINARIES_DIR"/Image "$TARGET_DIR"/boot
|
||||
cp "$BINARIES_DIR"/ae350_ax45mp.dtb "$TARGET_DIR"/boot
|
||||
@@ -1,106 +0,0 @@
|
||||
Intro
|
||||
=====
|
||||
|
||||
Andestech AE350 Platform
|
||||
|
||||
The AE350 prototype demonstrates the AE350 platform on the FPGA.
|
||||
|
||||
How to build it
|
||||
===============
|
||||
|
||||
Configure Buildroot
|
||||
-------------------
|
||||
|
||||
$ make andes_ae350_45_defconfig
|
||||
|
||||
If you want to customize your configuration:
|
||||
|
||||
$ make menuconfig
|
||||
|
||||
Build everything
|
||||
----------------
|
||||
Note: you will need to access to the network, since Buildroot will
|
||||
download the packages' sources.
|
||||
|
||||
$ make
|
||||
|
||||
Result of the build
|
||||
-------------------
|
||||
|
||||
After building, you should obtain the following files:
|
||||
|
||||
output/images/
|
||||
|-- ae350_ax45mp.dtb
|
||||
|-- boot.vfat
|
||||
|-- fw_dynamic.bin
|
||||
|-- fw_dynamic.elf
|
||||
|-- Image
|
||||
|-- rootfs.ext2
|
||||
|-- rootfs.ext4 -> rootfs.ext2
|
||||
|-- sdcard.img
|
||||
|-- u-boot-spl.bin
|
||||
`-- u-boot.itb
|
||||
|
||||
How to update the bootloader and device-tree
|
||||
============================================
|
||||
|
||||
To update the bootloader and device tree, make sure you have
|
||||
an ICEman (Andes OpenOCD [1]) and AICE [2] connection set up
|
||||
as below:
|
||||
|
||||
Local Host Local/Remote Host
|
||||
.-----------------. .--------------.
|
||||
| buildroot images| | |
|
||||
| | ICEman host <IP:PORT>
|
||||
| .----------. | | .--------. |
|
||||
| | SPI_burn |<---+--socket--+->| ICEman | |
|
||||
| '----------' | | '--.-----' |
|
||||
'-----------------' '-----|--------'
|
||||
|
|
||||
USB
|
||||
.--------------. |
|
||||
| target | .-----v-----.
|
||||
| board <----JTAG---| AICE |
|
||||
| | '-----------'
|
||||
'--------------'
|
||||
|
||||
[1] https://github.com/andestech/ICEman
|
||||
[2] https://www.andestech.com/en/products-solutions/andeshape-platforms/aice-micro/
|
||||
|
||||
The Andes SPI_burn tool will be located in output/host/bin. Use
|
||||
the following commands to update the bootloader and device tree:
|
||||
|
||||
$ SPI_burn --host $ICE_IP --port $ICE_BURNER_PORT --addr 0x0 -i u-boot-spl.bin
|
||||
$ SPI_burn --host $ICE_IP --port $ICE_BURNER_PORT --addr 0x10000 -i u-boot.itb
|
||||
$ SPI_burn --host $ICE_IP --port $ICE_BURNER_PORT --addr 0xf0000 -i ae350_ax45mp.dtb
|
||||
|
||||
Note that the --addr option specifies the offset starting from
|
||||
the flash base address 0x80000000 and set by U-Boot configurations.
|
||||
e.g.
|
||||
u-boot-spl.bin : CONFIG_SPL_TEXT_BASE=0x80000000
|
||||
u-boot.itb : CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
|
||||
ae350_ax45mp.dtb: CONFIG_SYS_FDT_BASE=0x800f0000
|
||||
|
||||
How to write the SD card
|
||||
========================
|
||||
|
||||
Copy the sdcard.img to a SD card with "dd":
|
||||
|
||||
$ sudo dd if=sdcard.img of=/dev/sdX bs=4096
|
||||
$ sudo sync
|
||||
|
||||
Your SD card partition should be:
|
||||
|
||||
Disk /dev/sdb: 14.48 GiB, 15552479232 bytes, 30375936 sectors
|
||||
Disk model: Multi-Card
|
||||
Units: sectors of 1 * 512 = 512 bytes
|
||||
Sector size (logical/physical): 512 bytes / 512 bytes
|
||||
I/O size (minimum/optimal): 512 bytes / 512 bytes
|
||||
Disklabel type: dos
|
||||
Disk identifier: 0x00000000
|
||||
|
||||
Device Boot Start End Sectors Size Id Type
|
||||
/dev/sdb1 1 4096 4096 2M c W95 FAT32 (LBA)
|
||||
/dev/sdb2 * 4097 126976 122880 60M 83 Linux
|
||||
|
||||
Insert SD card and reset the board, it should boot Linux from mmc.
|
||||
@@ -1,4 +0,0 @@
|
||||
label linux
|
||||
kernel /boot/Image
|
||||
fdt /boot/ae350_ax45mp.dtb
|
||||
append earlycon=sbi root=/dev/mmcblk0p2 rootwait
|
||||
@@ -1,6 +0,0 @@
|
||||
CONFIG_SPL_FS_FAT=y
|
||||
CONFIG_SPL_MMC=y
|
||||
CONFIG_SPL_OPENSBI_LOAD_ADDR=0x0
|
||||
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
|
||||
CONFIG_DISPLAY_CPUINFO=y
|
||||
CONFIG_DISPLAY_BOARDINFO=y
|
||||
@@ -1,4 +0,0 @@
|
||||
#!/bin/sh
|
||||
|
||||
mkdir -p ${TARGET_DIR}/lib/firmware
|
||||
cp -f ${BUILD_DIR}/linux-custom/br2-ucls1012a.its ${BINARIES_DIR}/
|
||||
@@ -1,6 +0,0 @@
|
||||
#!/bin/sh
|
||||
|
||||
MKIMAGE=${HOST_DIR}/usr/bin/mkimage
|
||||
MKIMAGE_IN=${BINARIES_DIR}/br2-ucls1012a.its
|
||||
MKIMAGE_OUT=${BINARIES_DIR}/part0-000000.itb
|
||||
${MKIMAGE} -f ${MKIMAGE_IN} ${MKIMAGE_OUT}
|
||||
@@ -1,74 +0,0 @@
|
||||
Arcturus uCLS1012A SoM
|
||||
======================
|
||||
|
||||
This tutorial describes how to use the predefined Buildroot
|
||||
configuration for the Arcturus uCLS101A SoM platform.
|
||||
|
||||
Additional information about the uCLS1012A System on Module can be found at
|
||||
https://www.arcturusnetworks.com/products/ucls1012a
|
||||
and product support for registered users at
|
||||
https://www.arcturusnetworks.com/support
|
||||
|
||||
Building
|
||||
--------
|
||||
|
||||
Return to the top directory <buildrootdir> and execute the following commands.
|
||||
|
||||
make arcturus_ucls1012a_defconfig
|
||||
make
|
||||
|
||||
Result of the build
|
||||
-------------------
|
||||
|
||||
After building, you should obtain this tree:
|
||||
|
||||
output/images/
|
||||
+-- arc-ucls1012a.dtb
|
||||
+-- Image.gz
|
||||
+-- part0-000000.itb
|
||||
+-- rootfs.cpio
|
||||
+-- rootfs.cpio.gz
|
||||
+-- rootfs.tar
|
||||
+-- u-boot.bin
|
||||
+-- br2-ucls1012a.its
|
||||
|
||||
Flashing
|
||||
--------
|
||||
|
||||
You'll need to program the image created by buildroot into the SPI NOR flash.
|
||||
|
||||
1. Reboot your module and via the serial console press <escape> to enter the B$
|
||||
u-boot shell.
|
||||
From the shell you will need to update four environment variables replacing the
|
||||
IPv4 IP Address with ones that will work with your network and tftp server.
|
||||
|
||||
B$ setenv ipaddr 192.168.1.81
|
||||
B$ setenv serverip 192.168.1.80
|
||||
B$ setenv gatewayip 192.168.1.1
|
||||
B$ setenv netmask 255.255.255.0
|
||||
B$ saveenv
|
||||
|
||||
2. Enable tftp server to serve the <buildrootdir>/output/images/ folder.
|
||||
|
||||
3. Program the new U-Boot binary (optional)
|
||||
If you don't feel confident upgrading your bootloader then don't do it,
|
||||
it's unnecessary most of the time.
|
||||
|
||||
B$ tftp u-boot.bin
|
||||
B$ run program_uboot
|
||||
|
||||
4. Program the ITB image (includes Kernel, DTB and Ramdisk)
|
||||
|
||||
B$ tftp part0-000000.itb
|
||||
B$ run iprogram
|
||||
|
||||
5. Booting your new system
|
||||
|
||||
Reboot your system by reset command
|
||||
B$ reset
|
||||
|
||||
or
|
||||
|
||||
B$ run bootcmd
|
||||
|
||||
Good Luck !
|
||||
@@ -1,74 +0,0 @@
|
||||
Arcturus uCP1020 SoM
|
||||
====================
|
||||
|
||||
This tutorial describes how to use the predefined Buildroot
|
||||
configuration for the Arcturus uCP1020 SoM platform.
|
||||
|
||||
Additional information about this module can be found at
|
||||
<www.arcturusnetworks.com/products/ucp1020>
|
||||
|
||||
Building
|
||||
--------
|
||||
|
||||
make arcturus_ucp1020_defconfig
|
||||
make
|
||||
|
||||
Result of the build
|
||||
-------------------
|
||||
|
||||
After building, you should obtain this tree:
|
||||
|
||||
output/images/
|
||||
+-- rootfs.jffs2
|
||||
+-- rootfs.tar
|
||||
+-- u-boot.bin
|
||||
+-- ucp1020.dtb
|
||||
+-- uImage
|
||||
|
||||
Flashing
|
||||
--------
|
||||
|
||||
You'll need to program the files created by buildroot into the NOR flash.
|
||||
|
||||
1. Program the new U-Boot binary (optional)
|
||||
If you don't feel confident upgrading your bootloader then don't do it,
|
||||
it's unnecessary most of the time.
|
||||
|
||||
B$ tftp u-boot.bin
|
||||
B$ protect off 0xeff80000 +$filesize
|
||||
B$ erase 0xeff80000 +$filesize
|
||||
B$ cp.b $loadaddr 0xeff80000 $filesize
|
||||
B$ protect on 0xeff80000 +$filesize
|
||||
|
||||
2. Program the kernel
|
||||
|
||||
B$ tftp uImage
|
||||
B$ erase 0xec140000 +$filesize
|
||||
B$ cp.b $loadaddr 0xec140000 $filesize
|
||||
|
||||
3. Program the DTB
|
||||
|
||||
B$ tftp ucp1020.dtb
|
||||
B$ erase 0xec100000 +$filesize
|
||||
B$ cp.b $loadaddr 0xec100000 $filesize
|
||||
|
||||
4. Program the jffs2 root filesystem
|
||||
|
||||
B$ tftp rootfs.jffs2
|
||||
B$ erase 0xec800000 0xee8fffff
|
||||
B$ cp.b $loadaddr 0xec800000 $filesize
|
||||
|
||||
5. Booting your new system
|
||||
|
||||
B$ setenv norboot 'setenv bootargs root=/dev/mtdblock1 rootfstype=jffs2 console=$consoledev,$baudrate;bootm 0xec140000 - 0xec100000'
|
||||
|
||||
If you want to set this boot option as default:
|
||||
|
||||
B$ setenv bootcmd 'run norboot'
|
||||
B$ saveenv
|
||||
|
||||
...or for a single boot:
|
||||
|
||||
B$ run norboot
|
||||
|
||||
Good Luck !
|
||||
@@ -1 +0,0 @@
|
||||
../linux/linux.hash
|
||||
@@ -1,2 +0,0 @@
|
||||
# From https://cdn.kernel.org/pub/linux/kernel/v6.x/sha256sums.asc
|
||||
sha256 3507dd105b0a0e1101bd43d294472fccf853429a259a5fa7c67467bba318f8e9 linux-6.15.7.tar.xz
|
||||
@@ -1,43 +1,19 @@
|
||||
Introduction
|
||||
============
|
||||
|
||||
This is the support for the ARM Foundation v8 machine emulated by the
|
||||
ARM software simulator of the AArch64 architecture.
|
||||
|
||||
Building
|
||||
========
|
||||
First, one has to download the AArch64 software simulator from:
|
||||
|
||||
$ make arm_foundationv8_defconfig
|
||||
$ make
|
||||
https://silver.arm.com/download/download.tm?pv=1317469
|
||||
|
||||
Generated files under output/images:
|
||||
|
||||
* linux-system.axf: An image comprising the boot-wrapper-aarch64 minimal
|
||||
firmware and bootloader, a Devicetree and the Linux kernel.
|
||||
* rootfs.ext2: The OS root filesystem.
|
||||
|
||||
Running on the simulator
|
||||
========================
|
||||
|
||||
Download the AArch64 software simulator from one of the following sources,
|
||||
corresponding to your host computer:
|
||||
|
||||
- https://developer.arm.com/-/cdn-downloads/permalink/FVPs-Architecture/FM-11.29/Foundation_Platform_11.29_27_Linux64.tgz
|
||||
- https://developer.arm.com/-/cdn-downloads/permalink/FVPs-Architecture/FM-11.29/Foundation_Platform_11.29_27_Linux64_armv8l.tgz
|
||||
|
||||
The model will be located under one of the corresponding folders:
|
||||
|
||||
- Foundation_Platformpkg/models/Linux64_GCC-9.3
|
||||
- Foundation_Platformpkg/models/Linux64_armv8l_GCC-9.3
|
||||
Then, use the arm_foundationv8_defconfig configuration to build your
|
||||
Buildroot system.
|
||||
|
||||
Finally, boot your system with:
|
||||
|
||||
Foundation_Platform \
|
||||
--arm-v8.0 \
|
||||
${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/Foundation_v8 \
|
||||
--image output/images/linux-system.axf \
|
||||
--block-device output/images/rootfs.ext2 \
|
||||
--network=nat \
|
||||
--cores 4
|
||||
--network=nat
|
||||
|
||||
You can get network access from within the simulated environment
|
||||
by requesting an IP address using DHCP (run the command 'udhcpc').
|
||||
|
||||
@@ -1,19 +0,0 @@
|
||||
# Arm A-Profile Base RevC AEM FVP config
|
||||
bp.secure_memory=1
|
||||
bp.terminal_1.start_telnet=0
|
||||
bp.ve_sysregs.exit_on_shutdown=1
|
||||
bp.virtio_net.enabled=1
|
||||
bp.virtio_net.hostbridge.userNetworking=1
|
||||
bp.vis.rate_limit-enable=1
|
||||
cache_state_modelled=0
|
||||
cluster0.NUM_CORES=4
|
||||
cluster0.cpu0.enable_crc32=1
|
||||
cluster0.cpu1.enable_crc32=1
|
||||
cluster0.cpu2.enable_crc32=1
|
||||
cluster0.cpu3.enable_crc32=1
|
||||
cluster1.NUM_CORES=4
|
||||
cluster1.cpu0.enable_crc32=1
|
||||
cluster1.cpu1.enable_crc32=1
|
||||
cluster1.cpu2.enable_crc32=1
|
||||
cluster1.cpu3.enable_crc32=1
|
||||
pctl.startup=0.0.0.0
|
||||
@@ -1,18 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2024, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include "fvp-base-gicv3-psci-1t.dts"
|
||||
|
||||
/* The TF-A Devicetree does not have the OP-TEE node; let's add it. */
|
||||
|
||||
/ {
|
||||
firmware {
|
||||
optee {
|
||||
compatible = "linaro,optee-tz";
|
||||
method = "smc";
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -1,31 +0,0 @@
|
||||
image efi-part.vfat {
|
||||
vfat {
|
||||
file EFI {
|
||||
image = "efi-part/EFI"
|
||||
}
|
||||
|
||||
file Image {
|
||||
image = "Image"
|
||||
}
|
||||
}
|
||||
|
||||
size = 128M
|
||||
}
|
||||
|
||||
image disk.img {
|
||||
hdimage {
|
||||
partition-table-type = "gpt"
|
||||
}
|
||||
|
||||
partition boot {
|
||||
image = "efi-part.vfat"
|
||||
partition-type-uuid = U
|
||||
offset = 32K
|
||||
bootable = true
|
||||
}
|
||||
|
||||
partition root {
|
||||
partition-type-uuid = b921b045-1df0-41c3-af44-4c6f280d3fae
|
||||
image = "rootfs.ext2"
|
||||
}
|
||||
}
|
||||
@@ -1,6 +0,0 @@
|
||||
set default="0"
|
||||
set timeout="5"
|
||||
|
||||
menuentry "Buildroot" {
|
||||
linux /Image root=PARTLABEL=root rootwait
|
||||
}
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 a899100d9d92ceb1290fd4d61f5dd3b8af6b0e937cebc3c711cb514ac5acfaed arm-trusted-firmware-v2.14.0-git4.tar.gz
|
||||
@@ -1 +0,0 @@
|
||||
../linux/linux.hash
|
||||
@@ -1,2 +0,0 @@
|
||||
# From https://cdn.kernel.org/pub/linux/kernel/v6.x/sha256sums.asc
|
||||
sha256 9106a4605da9e31ff17659d958782b815f9591ab308d03b0ee21aad6c7dced4b linux-6.18.tar.xz
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 464b3bf5bc4a61830357dbf81a0e5b89414d3bca1c2a752570cb0e40d2f1e637 optee-client-4.8.0.tar.gz
|
||||
@@ -1,34 +0,0 @@
|
||||
From 1debd0c8bd46255f8c22b128ec16586ef9154869 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Vincent=20Stehl=C3=A9?= <vincent.stehle@arm.com>
|
||||
Date: Tue, 2 Dec 2025 15:53:23 +0100
|
||||
Subject: [PATCH] plat-vexpress: redirect console to uart0
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
For consistency with TF-A, U-Boot and Linux.
|
||||
|
||||
Upstream: Not applicable. Buildroot specific.
|
||||
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
|
||||
---
|
||||
core/arch/arm/plat-vexpress/platform_config.h | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/core/arch/arm/plat-vexpress/platform_config.h b/core/arch/arm/plat-vexpress/platform_config.h
|
||||
index 9231f3048..76c7fdb36 100644
|
||||
--- a/core/arch/arm/plat-vexpress/platform_config.h
|
||||
+++ b/core/arch/arm/plat-vexpress/platform_config.h
|
||||
@@ -23,8 +23,8 @@
|
||||
|
||||
#define IT_UART1 38
|
||||
|
||||
-#define CONSOLE_UART_BASE UART1_BASE
|
||||
-#define IT_CONSOLE_UART IT_UART1
|
||||
+#define CONSOLE_UART_BASE UART0_BASE
|
||||
+#undef IT_CONSOLE_UART
|
||||
|
||||
#elif defined(PLATFORM_FLAVOR_juno)
|
||||
|
||||
--
|
||||
2.51.0
|
||||
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 5222cd553f5edb69ae4ec7cb99b2bfec2c47a47c0be1865b49744701918e8b4d optee-os-4.8.0.tar.gz
|
||||
@@ -1,2 +0,0 @@
|
||||
# Locally calculated
|
||||
sha256 b4f032848e56cc8f213ad59f9132c084dbbb632bc29176d024e58220e0efdf4a u-boot-2025.10.tar.bz2
|
||||
@@ -1,7 +0,0 @@
|
||||
#!/bin/sh
|
||||
set -eu
|
||||
|
||||
BOARD_DIR=$(dirname "$0")
|
||||
|
||||
# Override the default GRUB configuration file with our own.
|
||||
cp -f "${BOARD_DIR}/grub.cfg" "${BINARIES_DIR}/efi-part/EFI/BOOT/grub.cfg"
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user