Update for 2023.11.1

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>

.checkpackageignore

@@ -26,10 +26,12 @@ board/canaan/k210-soc/post-build.sh Shellcheck
 board/canaan/k210-soc/rootfs_overlay/sbin/init Shellcheck
 board/chromebook/elm/sign.sh Shellcheck
 board/chromebook/mksd.sh Shellcheck
+board/chromebook/snow/linux-4.15-dts-tpm.patch ApplyOrder Upstream
 board/chromebook/snow/sign.sh Shellcheck
 board/ci20/patches/uboot/0001-mips-Remove-default-endiannes.patch Upstream
 board/cubietech/cubieboard2/post-image.sh Shellcheck
 board/freescale/common/imx/imx8-bootloader-prepare.sh Shellcheck
+board/freescale/common/imx/post-image.sh Shellcheck
 board/freescale/common/mxs/post-image.sh Shellcheck
 board/freescale/imx6sabre/patches/uboot/0001-mx6qsabre_common-boot-Linux-to-init-in-mfgtools-mode.patch Upstream
 board/friendlyarm/nanopi-r2s/post-build.sh Shellcheck
@@ -70,8 +72,11 @@ board/pine64/rock64/patches/uboot/0001-Makefile-rk3328-needs-itb-image-to-boot-p
 board/pine64/rock64/post-build.sh Shellcheck
 board/pine64/rockpro64/post-build.sh Shellcheck
 board/qemu/aarch64-sbsa/assemble-flash-images Shellcheck
+board/qemu/microblazebe-mmu/0001-net-xilinx-xemaclite-add-2.00.b-revision.patch Upstream
+board/qemu/microblazeel-mmu/0001-net-xilinx-xemaclite-add-2.00.b-revision.patch Upstream
 board/qemu/x86/post-build.sh Shellcheck
 board/qemu/x86_64/post-build.sh Shellcheck
+board/qmtech/zynq/patches/linux/0001-DTS-for-QMTech-Zynq-starter-kit.patch Upstream
 board/radxa/rockpi-n8/post-build.sh Shellcheck
 board/raspberrypi/post-build.sh Shellcheck
 board/raspberrypi/post-image.sh Shellcheck
@@ -100,6 +105,7 @@ boot/at91bootstrap/0002-gcc-4.6.x-ldscript-fix.patch Upstream
 boot/at91bootstrap/0003-u-boot-relocation-fix.patch Upstream
 boot/at91dataflashboot/0001-do-not-install.patch Upstream
 boot/at91dataflashboot/0002-eabi-fixes.patch Upstream
+boot/grub2/0001-Makefile-Make-grub_fstest.pp-depend-on-config-util.h.patch Upstream
 boot/optee-os/3.13.0/0001-core-zlib-fix-build-warning-when-_LFS64_LARGEFILE-is.patch Upstream
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 boot/syslinux/0002-Disable-PIE-to-avoid-FTBFS-on-amd64.patch Upstream
@@ -155,8 +161,11 @@ package/asterisk/0001-sounds-do-not-download-and-check-sha1s.patch Upstream
 package/asterisk/0002-configure-fix-detection-of-libcrypt.patch Upstream
 package/asterisk/0003-build-ensure-target-directory-for-modules-exists.patch Upstream
 package/asterisk/0004-install-samples-need-the-data-files.patch Upstream
+package/asterisk/0005-configure-fix-detection-of-re-entrant-resolver-funct.patch Upstream
+package/asterisk/0006-main-iostream.c-fix-build-with-libressl.patch Upstream
 package/at/0001-Makefile.in-fix-make-install-for-non-root-don-t-stri.patch Upstream
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@@ -174,6 +183,7 @@ package/bandwidthd/0001-src-bandwidthd.h-fix-build-with-gcc-10.patch Upstream
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 package/bash/0002-parse.y-fix-compilation-for-non-multibyte-builds.patch Upstream
 package/bash/0003-configure-invert-condition-for-strtoimax-builtin.patch Upstream
+package/bayer2rgb-neon/0001-add-some-_always_inline_-annotations.patch Upstream
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 package/bc/0002-notice-read-and-write-errors-on-input-and-output.patch Upstream
 package/bc/0003-dc-fix-exit-code-of-q-command.patch Upstream
@@ -195,11 +205,15 @@ package/bind/S81named Indent Shellcheck Variables
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 package/binutils/2.39/0002-poison-system-directories.patch Upstream
 package/binutils/2.39/0003-bfd-elf32-or1k-fix-building-with-gcc-version-5.patch Upstream
+package/binutils/arc-2020.09-release/0001-poison-system-directories.patch Upstream
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+package/botan/0001-Add-superh-alias-needed-by-Debian.patch Upstream
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@@ -221,9 +235,12 @@ package/c-icap/0001-Required-fixes-to-compile-and-run-under-cygwin.patch Upstrea
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-package/cairo/0002-Fix-mask-usage-in-image-compositor.patch Upstream
+package/cairo/0001-fix-nofork-build.patch Upstream
+package/cairo/0002-ft-Use-FT_Done_MM_Var-instead-of-free-when-available-in-cairo_ft_apply_variation.patch Upstream
+package/cairo/0003-_arc_max_angle_for_tolerance_normalized-fix-infinite.patch Upstream
+package/cairo/0004-Fix-mask-usage-in-image-compositor.patch Upstream
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+package/catatonit/0002-fix-build-with-kernel-5.9.patch Upstream
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@@ -306,6 +323,7 @@ package/dmalloc/0004-Makefile-use-the-configure-detected-or-user-supplied.patch
 package/dmalloc/0005-configure-use-LD-instead-of-hard-coding-ld.patch Upstream
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+package/dnsmasq/S80dnsmasq Shellcheck
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@@ -316,6 +334,10 @@ package/dropbear/S50dropbear Indent Shellcheck Variables
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+package/duma/0001-fix-cross-compilation.patch Upstream
+package/duma/0002-no-tests.patch Upstream
+package/duma/0003-fix-C++14.patch Upstream
+package/duma/0004-Fix-build-with-latest-glibc.patch Upstream
 package/dvb-apps/0001-Fix-generate-keynames.patch Upstream
 package/dvb-apps/0002-Fix-compiler-warning-flags.patch Upstream
 package/dvb-apps/0003-handle-static-shared-only-build.patch Upstream
@@ -335,6 +357,10 @@ package/ebtables/0003-configure.ac-add-option-enable-kernel-64-userland-32.patch
 package/ecryptfs-utils/0001-musl.patch Upstream
 package/ecryptfs-utils/0002-openssl110.patch Upstream
 package/ecryptfs-utils/0003-fix-parallel-build-issue.patch Upstream
+package/efivar/0001-Allow-build-with-uClibc.patch Upstream
+package/efivar/0002-gcc.specs-drop-Werror.patch Upstream
+package/efivar/0003-efivar-isolate-makeguids-host-tool-build.patch Upstream
+package/efivar/0004-efisecdb-fix-build-with-musl-libc.patch Upstream
 package/efl/0001-ecore_evas-engines-drm-meson.build-use-gl_deps-as-en.patch Upstream
 package/efl/0002-ecore_evas-engines-drm-meson.build-fix-gl_drm-includ.patch Upstream
 package/efl/0003-ecore_fb-fix-build-with-tslib.patch Upstream
@@ -362,6 +388,8 @@ package/evemu/0004-src-evemu.c-fix-build-with-kernels-4.16.patch Upstream
 package/exim/0001-Build-buildconfig-for-the-host.patch Upstream
 package/exim/0002-Don-t-make-backup-copies-of-installed-files.patch Upstream
 package/exim/0003-Skip-version-check-and-symlink-installation.patch Upstream
+package/exim/0004-exim_lock-fix-lstat-related-build-errors.patch Upstream
+package/exim/0005-sieve-fix-build-errors.patch Upstream
 package/exim/S86exim Indent Variables
 package/expect/0001-enable-cross-compilation.patch Upstream
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@@ -400,6 +428,9 @@ package/flite/0001-fix-alsa-static.patch Upstream
 package/fltk/0001-disable-tests.patch Upstream
 package/fluxbox/0001-fixes-bug-1138.patch Upstream
 package/freeradius-client/0001-fix-for-nettle.patch Upstream
+package/freerdp/0001-Fix-variable-declaration-in-loop.patch Upstream
+package/freerdp/0002-Fixed-variable-declaration-in-loop.patch Upstream
+package/freerdp/0003-winpr-include-winpr-file.h-fix-build-on-uclibc.patch Upstream
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 package/freescale-imx/imx-uuc/S80imx-uuc Indent Shellcheck Variables
@@ -418,13 +449,26 @@ package/gamin/0002-no-const-return.patch Sob Upstream
 package/gamin/0003-fix-missing-PTHREAD_MUTEX_RECURSIVE_NP.patch Upstream
 package/gcc/11.4.0/0001-or1k-Add-mcmodel-option-to-handle-large-GOTs.patch Upstream
 package/gcc/11.4.0/0004-disable-split-stack-for-non-thread-builds.patch Upstream
-package/gcc/12.4.0/0001-disable-split-stack-for-non-thread-builds.patch Upstream
-package/gcc/13.3.0/0001-disable-split-stack-for-non-thread-builds.patch Upstream
+package/gcc/12.3.0/0001-disable-split-stack-for-non-thread-builds.patch Upstream
+package/gcc/13.2.0/0001-disable-split-stack-for-non-thread-builds.patch Upstream
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 package/gcc/8.4.0/0004-disable-split-stack-for-non-thread-builds.patch Upstream
+package/gcc/arc-2020.09-release/0001-arc-Refurbish-adc-sbc-patterns.patch Upstream
+package/gcc/arc-2020.09-release/0002-libsanitizer-Remove-cyclades-from-libsanitizer.patch Sob Upstream
+package/gcc/arc-2020.09-release/0100-uclibc-conf.patch Upstream
 package/gcr/0001-meson-Fix-unknown-kw-argument-in-gnome.generate_gir.patch Upstream
+package/gdal/0001-fix-uclibc-build-without-NPTL.patch Upstream
+package/gdb/11.2/0001-ppc-ptrace-Define-pt_regs-uapi_pt_regs-on-GLIBC-syst.patch Upstream
+package/gdb/11.2/0002-sh-ptrace-Define-pt_-dsp-regs-uapi_pt_-dsp-regs-on-G.patch Upstream
+package/gdb/11.2/0003-use-asm-sgidefs.h.patch Upstream
+package/gdb/11.2/0004-gdbserver-fix-build-for-m68k.patch Upstream
+package/gdb/11.2/0005-nat-fork-inferior-include-linux-ptrace.h.patch Upstream
+package/gdb/11.2/0006-Fix-getrandom-compile-for-uclibc-v1.0.35.patch Upstream
+package/gdb/11.2/0007-fix-musl-build-on-riscv.patch Upstream
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@@ -443,22 +487,15 @@ package/gdb/13.2/0006-Fix-getrandom-compile-for-uclibc-v1.0.35.patch Upstream
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+package/gli/0001-Optional-building-tests.patch Upstream
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@@ -494,6 +531,8 @@ package/harfbuzz/0001-meson.build-check-for-pthread.h.patch Upstream
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@@ -533,6 +572,7 @@ package/intel-mediasdk/0001-Don-t-force-fstack-protector.patch Upstream
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+package/iperf/0001-fix-single-threaded-compile-breakage.patch Upstream
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@@ -548,6 +588,7 @@ package/irrlicht/0001-override-CPPFLAGS-CXXFLAGS-and-CFLAGS-in-Makefile.patch Up
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@@ -578,6 +619,7 @@ package/libatasmart/0001-strpool-cross-flags.patch Upstream
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@@ -626,6 +668,10 @@ package/libiio/S99iiod Shellcheck Variables
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@@ -638,9 +684,11 @@ package/libloki/0001-allow-to-install-to-a-specific-location-using-DESTDI.patch
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@@ -653,8 +701,9 @@ package/libnss/0001-Bug-1801182-Allow-overriding-OS_ARCH-OS_TEST-and-OS_.patch U
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@@ -662,6 +711,7 @@ package/liboping/0004-Fix-compile-error-on-GCC-7.patch Upstream
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@@ -705,10 +755,13 @@ package/libuhttpd/0001-add-compatibility-for-wolfssl-5-0.patch Upstream
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@@ -881,6 +934,9 @@ package/nginx/0008-src-os-unix-ngx_linux_config.h-only-include-dlfcn.h-.patch Up
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@@ -896,6 +952,7 @@ package/ntp/0001-nano.patch Upstream
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 package/numactl/0001-link-with-latomic-if-needed-again.patch Upstream
 package/nuttcp/0001-susv3-legacy.patch Upstream
 package/nvidia-driver/0001-use-LDFLAGS.patch Upstream
@@ -960,6 +1017,18 @@ package/openvmtools/shutdown Shellcheck
 package/openvpn/S60openvpn Indent Shellcheck Variables
 package/oprofile/0001-musl.patch Upstream
 package/opusfile/0001-Propagate-allocation-failure-from-ogg_sync_buffer.patch Upstream
+package/oracle-mysql/0000-ac_cache_check.patch Upstream
+package/oracle-mysql/0001-configure-ps-cache-check.patch Upstream
+package/oracle-mysql/0002-use-new-readline-iface.patch Upstream
+package/oracle-mysql/0003-ac_stack_direction-is-unset.patch Upstream
+package/oracle-mysql/0004-Fix-gen_lex_hash-execution.patch Upstream
+package/oracle-mysql/0005-bison_3_breaks_mysql_server_build.patch Upstream
+package/oracle-mysql/0006-no-force-static-build.patch Upstream
+package/oracle-mysql/0007-dont-install-in-mysql-directory.patch Upstream
+package/oracle-mysql/0008-fix-type-conversion.patch Upstream
+package/oracle-mysql/0009-gcc7.patch Upstream
+package/oracle-mysql/0010-fix-build-without-zlib.patch Upstream
+package/oracle-mysql/S97mysqld Shellcheck Variables
 package/owfs/S55owserver Shellcheck Variables
 package/owfs/S60owfs Shellcheck Variables
 package/owl-linux/0001-fix-for-linux-3.3.x.patch Upstream
@@ -991,6 +1060,7 @@ package/php/0002-iconv-tweak-iconv-detection.patch Upstream
 package/php/0003-configure-disable-the-phar-tool.patch Upstream
 package/php/0004-Call-apxs-with-correct-prefix.patch Upstream
 package/php/0005-allow-opcache-cross-compiling.patch Upstream
+package/picocom/0001-Compile-with-libc-s-without-cispeed-cospeed.patch Upstream
 package/pifmrds/0001-Makefile-cross-compile-friendly.patch Upstream
 package/pifmrds/0002-Makefile-use-LDFLAGS.patch Upstream
 package/pifmrds/0003-Makefile-fix-static-link.patch Upstream
@@ -998,6 +1068,7 @@ package/pigpio/S50pigpio Shellcheck Variables
 package/pistache/0001-src-common-transport.cc-fallback-value-for-RUSAGE_TH.patch Upstream
 package/pistache/0002-src-server-listener.cc-fix-libressl-build.patch Upstream
 package/pixman/0001-Disable-tests.patch Upstream
+package/pkcs11-helper/0001-openssl-libressl-3-5-0-does-not-have-DSA_meth_set1_name.patch Upstream
 package/pkgconf/0001-Only-prefix-with-the-sysroot-a-subset-of-variables.patch Upstream
 package/pkgconf/0002-Revert-main-assume-modversion-insted-of-version-if-o.patch Upstream
 package/pkgconf/pkg-config.in Shellcheck
@@ -1027,12 +1098,18 @@ package/ptpd2/0002-ntp_isc_md5-rename-EVP_MD_CTX-into-PTPD_EVP_MD_CTX.patch Upst
 package/ptpd2/0003-Solve-issue-25-Removing-type-U64-from-net-snmp-relat.patch Upstream
 package/ptpd2/S65ptpd2 Indent Shellcheck Variables
 package/pulseaudio/0001-shm.c-use-_Static_assert-instead-of-static_assert-fo.patch Upstream
+package/pulseaudio/0002-build-sys-Fix-atomic-support-detection.patch Upstream
+package/pulseaudio/0003-build-sys-Add-missing-libatomic_ops-dependencies.patch Upstream
+package/pulseaudio/0004-meson.build-fix-build-without-C.patch Upstream
 package/pulseaudio/S50pulseaudio ConsecutiveEmptyLines EmptyLastLine Indent Variables
 package/pulseview/0001-Replace-obsolete-deprecated-Qt-methods.patch Upstream
 package/pulseview/0002-Fix-broken-build-due-to-C-template-behind-C-linkage.patch Upstream
 package/pulseview/0003-Support-glibmm-2.68.patch Upstream
 package/python-aiohttp-remotes/0001-Fix-flit_core-build-requires-backend.patch Upstream
 package/python-automat/0001-Remove-uneeded-dependency-to-wheel.patch Upstream
+package/python-crossbar/0001-Avoid-intentional-syntax-error.patch Upstream
+package/python-crossbar/0002-requirements-min.txt-drop-indirect-dependencies.patch Upstream
+package/python-crossbar/0003-crossbar-webservice-wap-use-markupsafe-instead-of-we.patch Upstream
 package/python-daphne/0001-remove-pytest-runner-requirement.patch Upstream
 package/python-pybind/0001-pybind11-commands.py-support-STAGING_DIR.patch Upstream
 package/python-pylibftdi/0001-do-not-use-find-library.patch Upstream
@@ -1076,6 +1153,7 @@ package/python3/0028-fix-building-on-older-distributions.patch Upstream
 package/python3/0029-configure.ac-fixup-CC-print-multiarch-output-for-mus.patch Upstream
 package/python3/0030-Add-an-option-to-disable-the-berkeleydb-module.patch Upstream
 package/python3/0031-lib-crypt-uClibc-ng-doesn-t-set-errno-when-encryptio.patch Upstream
+package/qemu/0001-tests-fp-disable-fp-bench-build-by-default.patch Upstream
 package/qemu/0002-softmmu-qemu-seccomp.c-add-missing-header-for-CLONE_.patch Upstream
 package/qextserialport/0001-Create-a-main-include-file-QExtSerialPort.patch Upstream
 package/qextserialport/0002-Tell-qmake-to-add-a-pkgconfig-file-to-ease-usage-wit.patch Upstream
@@ -1137,12 +1215,16 @@ package/rpi-userland/0006-interface-vcos-pthreads-CMakeLists.txt-fix-build-wit.p
 package/rpi-userland/0007-GLES2-gl2ext.h-add-GLint64-GLuint64-and-GLsync-typed.patch Upstream
 package/rt-tests/0001-Fix-a-build-issue-with-uClibc-ng.patch Upstream
 package/rt-tests/0002-Makefile-drop-explicit-undefine-PYLIB-for-compatibil.patch Upstream
+package/rtl_433/0001-CMakeLists.txt-use-pkg-config-to-detect-openssl-when.patch Upstream
+package/rtl_433/0002-minor-Fix-mongoose-build-without-threads.patch Upstream
 package/rtmpdump/0001-include-limits.h.patch Upstream
 package/rtorrent/0001-Added--disable-execinfo-option-to-configure.patch Upstream
 package/rtty/0001-CMakeLists.txt-prefer-pkg_check_modules.patch Upstream
 package/rubix/0001-dont-use-legacy-functions.patch Upstream
 package/rubix/0002-misc-fixes.patch Sob Upstream
-package/rygel/0001-meson.build-fix-g_ir_compiler-calls.patch Upstream
+package/ruby/0001-Fix-build-with-LibreSSL-3-5.patch Upstream
+package/rygel/0001-build-Add-man_pages-build-options.patch Upstream
+package/rygel/0002-meson.build-fix-g_ir_compiler-calls.patch Upstream
 package/rygel/S99rygel Indent Shellcheck Variables
 package/s6-linux-init/0001-configure-add-D_GNU_SOURCE.patch Upstream
 package/s6-linux-utils/0001-src-s6-linux-utils-rngseed.c-fix-build-with-glibc.patch Upstream
@@ -1181,6 +1263,7 @@ package/shadowsocks-libev/0002-fix-maybe-uninitialized-errors.patch Upstream
 package/shadowsocks-libev/0003-lib-Makefile.am-remove-static-from-LDFLAGS.patch Upstream
 package/shairport-sync/0001-configure.ac-find-sndfile-through-pkg-config.patch Upstream
 package/shairport-sync/S99shairport-sync Indent Shellcheck Variables
+package/shapelib/0001-Remove-double-free-in-contrib-shpsrt.patch Upstream
 package/shared-mime-info/0001-Remove-incorrect-dependency-from-install-data-hook.patch Upstream
 package/shellinabox/0001-Makefile-disable-always-building-statically.patch Upstream
 package/shellinabox/0002-CVE-2018-16789-fix-for-broken-multipart-form-data.patch Upstream
@@ -1199,6 +1282,8 @@ package/snort/0005-fix-sparc.patch Upstream
 package/snort/0006-Fix-compile-error-when-building-against-uclibc-or-mu.patch Upstream
 package/snort/0007-Fix-error-when-building-on-a-Fedora-host-machine.patch Upstream
 package/snort/0008-Fix-NO-OPTIMIZE.patch Upstream
+package/socat/0001-no-documentation.patch Upstream
+package/socat/0002-compat-set-NETDB_INTERNAL.patch Upstream
 package/socketcand/0001-Fix-GCC10-build-failure.patch Upstream
 package/softether/0001-Create-autotools-plumbing-for-SoftEther.patch Upstream
 package/softether/0002-Create-libsoftether.so-and-dynamically-link.patch Upstream
@@ -1229,6 +1314,7 @@ package/start-stop-daemon/0001-add-uclibc-alias-and-musl.patch Upstream
 package/start-stop-daemon/0002-just-warn-on-missing-arch.patch Upstream
 package/statserial/0001-ncurses-link.patch Upstream
 package/stunnel/S50stunnel Indent Shellcheck Variables
+package/sudo/0001-configure.ac-fix-openssl-static-build.patch Upstream
 package/supervisor/S99supervisord Variables
 package/suricata/0001-configure.ac-allow-the-user-to-override-RUST_TARGET.patch Upstream
 package/suricata/S99suricata Shellcheck
@@ -1244,6 +1330,8 @@ package/taskd/0002-Use-correct-variables-for-GnuTLS-detection.patch Upstream
 package/taskd/0003-CMakeLists-use-pkg-config-uuid-detection.patch Upstream
 package/tcf-agent/S55tcf-agent Shellcheck Variables
 package/tcl/0001-Disable-tcl-compatibility-layers.patch Upstream
+package/tesseract-ocr/0001-Check-if-platform-supports-feenableexcept.patch Upstream
+package/tesseract-ocr/0002-configure.ac-fix-build-on-aarch64_be.patch Upstream
 package/tftpd/0001-Use-extern-qualifier-to-fix-gcc-10.x-build.patch Upstream
 package/tftpd/S80tftpd-hpa Indent Shellcheck Variables
 package/ti-gfx/0001-newclkapi.patch Upstream
@@ -1258,6 +1346,8 @@ package/tinyalsa/0001-include-time.h-before-asound.h.patch Upstream
 package/tinycbor/0001-Makefile-add-DISABLE_WERROR.patch Upstream
 package/tinycompress/0001-wave-add-time.h-missing-header-inclusion.patch Upstream
 package/tinydtls/0001-sha2-sha2.c-fix-build-on-big-endian.patch Upstream
+package/tinymembench/0001-arm-fix-build-on-Thumb-only-architectures.patch Upstream
+package/tinyproxy/0001-prevent-junk-from-showing-up-in-error-page-in-invalid-requests.patch Upstream
 package/tinyxml/0001-In-stamp-always-advance-the-pointer-if-p-0xef.patch Upstream
 package/tpm2-abrmd/S80tpm2-abrmd Indent Shellcheck Variables
 package/tpm2-tss/0001-Temporary-fix-for-build-without-C.patch Upstream
@@ -1348,6 +1438,7 @@ package/wampcc/0001-Add-RISC-V-endian-detection.patch Upstream
 package/wampcc/0002-include-wampcc-platform.h-fix-build-with-musl-1.2.0.patch Upstream
 package/wampcc/0003-Broken-build-on-Windows.patch Upstream
 package/watchdogd/S01watchdogd Indent NotExecutable
+package/webrtc-audio-processing/0001-Proper-detection-of-cxxabi.h-and-execinfo.h.patch Upstream
 package/wget/0001-lib-getrandom.c-fix-build-with-uclibc-1.0.35.patch Upstream
 package/wilc-driver/0001-cfg80211.c-fix-missing-prandom_u32-with-Linux-6.1.0.patch Upstream
 package/wilc-driver/0002-spi.c-fix-build-failure-on-remove-callback.patch Upstream
@@ -1357,9 +1448,11 @@ package/wilc-driver/0005-Fix-cast-warnings.patch Upstream
 package/wipe/0001-musl.patch Upstream
 package/wireless_tools/0001-remove-bzero.patch Upstream
 package/wireshark/0001-cmake-lemon-wipe-CMAKE_-EXE_LINKER_FLAGS-SYSROOT-if-.patch Upstream
+package/wlroots/0001-Add-feature-macros-to-more-C-files-.patch Upstream
 package/woff2/0001-CMake-Handle-multiple-libraries-being-returned-for-B.patch Upstream
 package/wpa_supplicant/0001-build-re-enable-options-for-libwpa_client.so-and-.patch Upstream
 package/wpa_supplicant/ifupdown.sh Shellcheck
+package/wpewebkit/0001-FELightningNEON.cpp-fails-to-build-NEON-fast-path-se.patch Upstream
 package/x11r7/xapp_luit/0001-posix-openpt.patch Upstream
 package/x11r7/xapp_xdm/S99xdm Indent Variables
 package/x11r7/xcursor-transparent-theme/0001-fix-symlink.patch Upstream
@@ -1386,6 +1479,7 @@ package/x11r7/xserver_xorg-server/0001-include-misc.h-fix-uClibc-build.patch Ups
 package/x11r7/xserver_xorg-server/S40xorg Shellcheck Variables
 package/x11vnc/0001-Fix-build-on-32bit-arches-with-64bit-time_t.patch Upstream
 package/x11vnc/0002-scan-limit-access-to-shared-memory-segments-to-current-user.patch Upstream
+package/x265/0001-fix-gcc-options.patch Upstream
 package/xen/0001-9pfs-include-linux-limits.h-for-XATTR_SIZE_MAX.patch Upstream
 package/xen/0002-Fix-build-with-64-bits-time_t.patch Upstream
 package/xen/0003-libs-light-fix-tv_sec-printf-format.patch Upstream
@@ -1410,6 +1504,7 @@ package/ympd/0001-only-c-language.patch Upstream
 package/ympd/0002-added-forward-declarations.patch Upstream
 package/zabbix/0001-m4-netsnmp.m4-fix-shared-netsnmp-build.patch Upstream
 package/zabbix/0002-fix-build-with-libressl-3.5.0.patch Upstream
+package/zbar/0001-python-enum-fix-build-for-Python-3.11.patch Upstream
 package/zic/0001-remove-dependency-check-on-version-file.patch Upstream
 package/zip/0001-configure-Remove-Check-C-compiler-type-optimization-.patch Upstream
 package/zip/0002-configure-Don-t-use-host-CPP.patch Upstream
@@ -1420,6 +1515,9 @@ package/zip/0006-unix-configure-borrow-the-LFS-test-from-autotools.patch Upstrea
 package/zip/0007-timezone.c-needs-time.h-fixes-musl-compile.patch Upstream
 package/zip/0008-fix-musl-static-build.patch Upstream
 package/zmqpp/0001-Allow-building-shared-or-static-library-only.patch Upstream
+package/znc/0001-LibreSSL-3.5-opaqued-structures.patch Upstream
+package/znc/0002-Fix-build-with-libressl.patch Upstream
+package/znc/0003-DH_set0_pqg-and-DH_get0_key-have-existed-since-Libre.patch Upstream
 package/zziplib/0001-implant-ZZIP_LIBLATEST-for-zzip_lib.patch Upstream
 support/dependencies/check-host-asciidoc.sh Shellcheck
 support/dependencies/check-host-cmake.sh Shellcheck
@@ -1432,6 +1530,8 @@ support/dependencies/check-host-xzcat.sh Shellcheck
 support/dependencies/dependencies.sh Shellcheck
 support/download/bzr ConsecutiveEmptyLines Shellcheck
 support/download/cargo-post-process Shellcheck
+support/download/check-hash Shellcheck
+support/download/cvs Shellcheck
 support/download/dl-wrapper Shellcheck
 support/download/file Shellcheck
 support/download/go-post-process Shellcheck
@@ -1453,7 +1553,9 @@ support/scripts/expunge-gconv-modules Shellcheck
 support/scripts/fix-configure-powerpc64.sh EmptyLastLine
 support/scripts/generate-gitlab-ci-yml Shellcheck
 support/scripts/mkmakefile ConsecutiveEmptyLines Shellcheck
+support/scripts/mkusers Shellcheck
 support/scripts/setlocalversion Shellcheck
 support/testing/tests/core/post-build.sh Shellcheck
 support/testing/tests/package/test_opkg/post-build.sh Shellcheck
 support/testing/tests/utils/test_get_developers/0001-package-binutils-change-.mk.patch NumberedSubject Upstream
+utils/checkpackagelib/lib_patch.py Flake8

.editorconfig

@@ -29,9 +29,6 @@ indent_size = tab
 indent_style = tab
 indent_size = tab
 
-[*.patch]
-trim_trailing_whitespace = false
-
 [S{0..9}{0..9}*]
 indent_style = tab
 indent_size = tab

.github/pull_request_template.md

@@ -1,6 +0,0 @@
-Please do not submit a Pull Request via GitHub. Buildroot makes use of a
-[mailing list](http://lists.buildroot.org/mailman/listinfo/buildroot) for patch submission and review.
-See [submitting your own patches](http://buildroot.org/manual.html#submitting-patches) for more info.
-
-Thanks for your help!
-

.gitlab/issue_templates/default.md

@@ -1,60 +0,0 @@
-Thank you for opening a new issue. To help solve it faster and more easily,
-please review this check-list, and fill in the sections below. Adapt as
-needed.
-
-Do not open an issue to request a new feature; instead, post a message to
-[the mailing list](https://lists.buildroot.org/mailman/listinfo/buildroot).
-
-_Note: issues missing any information may get closed without further ado._
-
----
-### Check-list
-
-- [ ] I did not find the issue in the existing issues
-- [ ] I can reproduce the issue with unmodified Buildroot from [this
-      repository](https://gitlab.com/buildroot.org/buildroot), not from a
-      fork somewhere else
-- [ ] I can reproduce the issue on the latest commit of the branch I'm using:
-    - [ ] master
-    - [ ] stable (i.e. 20NN.MM.x - please specify)
-    - [ ] LTS (i.e. 20NN.02.x - please specify)
-- [ ] I can reproduce the issue after running `make clean; make`
-- [ ] I attached the full build log file (e.g. `make 2>&1 |tee build.log`)
-- [ ] I attached a **minimal** defconfig file that can reproduce the
-      issue (`make BR2_DEFCONFIG=$(pwd)/issue_defconfig savedefconfig`)
-- [ ] I also attached the configuration for kconfig-based packages that
-      are enabled (and necessary to reproduce the issue), most notably:
-    - [ ] busybox
-    - [ ] linux
-    - [ ] uclibc
-    - [ ] uboot
-    - [ ] …
-
----
-### What I did
-
-**Buildroot commit sha1**: _get this with `git describe HEAD`_
-**Distribution of the build machine**: _get this with `NAME` and `VERSION` from `/etc/os-release`_
-
-_Here, describe what you did:_
-- _any special environment variables: CC, CXX, TARGET, CROSS_COMPILE, etc…_
-- _the commands you ran:_
-    ```sh
-    $ make [...]
-    ```
-- _anything else that you might think is important…_
-
----
-### What happens
-
-_Here, describe what happens that you believe was incorrect._
-
----
-### What was expected
-
-_Here, describe the behaviour you expected._
-
----
-### Extra information
-
-_Here, you may write additional information that does not fit above_

CHANGES

@@ -1,279 +1,3 @@
-2024.02.5, released August 14th, 2024
-
-	Important / security related fixes.
-
-	Various minor improvements to utils/check-package
-
-	Defconfigs: Add download hashes for chromebook-elm,
-	chromebook-snow and stm32mp157a_dk1
-
-	Updated/fixed packages: bitcoin, boost, btrfs-progs, c-ares,
-	cdrkit, check, containerd, directfb, ed, exim, fwts, gcc, gdb,
-	go, kexec, libarchive, libgeos, libressl, mupdf, nodejs,
-	ntpsec, octave, openssh, pppd, python-mupdf,
-	python-ruamel-yaml, qt5webkit, rauc-hawkbit-updater, snappy,
-	squid, sunxi-tools, syslinux, systemd, tcf-agent, ubus,
-	util-linux, uvw, webkitgtk, wolfssl, wpewebkit, x265,
-	xlib_libxshmfence, xvisor
-
-	Issues resolved (http://bugs.uclibc.org):
-
-	#15231: gcc --help -v doesn't work correctly with gcc>=10 and..
-
-2024.02.4, released July 13th, 2024
-
-	Important / security related fixes.
-
-	Infrastructure: Ensure a custom tar program specified with
-	make TAR=/path/to/custom/tar is used everwhere.
-
-	Defconfig: Pine64 rockpro64: Build ethernet driver in kernel
-	rather than as module.
-
-	Updated/fixed packages: apache, composer, daq, fluent-bit,
-	ghostscript, glibc, liblockfile, libmad, libopenssl, mesa3d,
-	network-manager, ntp, octave, openssh, openvpn, php, python3,
-	qt6base, raspberrypi-usbboot, redis, sentry-cli, systemd, tor,
-	vlc, xmrig, znc
-
-2024.02.3, released June 10th, 2024
-
-	Important / security related fixes.
-
-	Misc:
-	- Fixed a number of compilation issues for hosts using GCC
-          14.x, including for kconfig.
-
-	Download:
-	- Drop redundant --passive-ftp from default wget options and
-	  migrate a number of packages using FTP upstreams to HTTP(S)
-	  for compatibility with wget2 which does not have FTP support
-
-	- Ensure downloads are correctly shared for host packages that
-	  try to do so using <pkg>_DL_SUBDIR and ensure the correct
-	  toplevel directory name is used in generated tarballs when
-	  downloads are shared.
-
-	Arch: Enable SSE2 support for x86 Pentium M variant.
-
-	Defconfigs: Orangepi PC/R1, Raspberrypi zero2w, Sipeed
-	licheepi nano, Wandboard: Fix compilation issues. PC x86-64
-	bios/efi: add wireless regdb to fix kernel warning during
-	boot, iMX.8 boards: Adjust FIT external data position to match
-	imx-mkimage changes, fixing boot issues.
-
-	Updated/fixed packages: am33x-cm, apcupsd,
-	arm-trusted-firmware, binutils-bare-metal, bpftool, catch2,
-	ccache, cjson, clamav, cog, coreutils, cryptodev-linux,
-	dhcpcd, dmraid, dnsmasq, docker-cli, docker-compose,
-	docker-engine, doom-wad, duma, elf2flt, ebtables, elfutils,
-	evemu, file, fluidsynth, freeradius-client, freeradius-server,
-	freerdp, fwts, gcc, gcc-bare-metal, git, gnuplot, go,
-	gr-osmosdr, gst1-plugins-good, hidapi, imagemagick,
-	intel-gmmlib, ivi-homescreen, janus-gateway, kexec, kmod,
-	kodi, libarchive, libdrm, libedit, libffi, libglib2, libhtp,
-	libjwt, libkrb5, libmanette, libmdbx, libmnl,
-	libnetfilter_acct, libnetfilter_log, libnpth, libopenssl,
-	libpng, libuhttpd, liburiparser, libutempter, libvncserver,
-	libwpe, lightning, linux-firmware, linux-pam, lua-cffi,
-	luajit, lvm2, lynx, mariadb, mesa3d, micropython, minisign,
-	musl, mutt, ncftp, network-manager, newlib-bare-metal, nfacct,
-	nfs-utils, octave, openjpeg, openocd, oprofile,
-	perl-dbd-mysql, php, postgresql, pppd, privoxy, procps-ng,
-	proftpd, proj, putty, python-ml-dtypes, python-pillow,
-	python-rds-py, qemu, qt5base, redis-plus-plus, rtl8189fs,
-	ruby, samba4, shadow, smcroute, speech, squid, sscep,
-	suricata, swupdate, systemd, ti-sgx-km, tinycbor, tinyproxy,
-	tor, tpm2-tss, ttyd, uboot-tools, ulogd, vala, weston,
-	wpewebkit, x11vnc, zbar, zeromq, zfs, zip, zxing-cpp
-
-	Issues resolved (http://bugs.uclibc.org):
-
-        #15766: BR2_PACKAGE_WESTON_XWAYLAND -- 12.0.1 -- fails to build..
-	#15973: imx8m bootloader image generation broken since update..
-        #16075: Cannot use linux kernel extensions from external tree..
-	#16093: kmod and gcc-14 build error
-
-2024.02.2, released May 7th, 2024
-
-	Important / security related fixes.
-
-        Security: The /dev/shm entry in the default /etc/fstab used
-        for busybox and sysv init systems was missing the sticky bit,
-        allowing users to delete and replace other users files.
-
-        Defconfigs: Mangopi mq1rdw1: Lock kernel headers to 6.6.x.
-
-	Updated/fixed packages: apache, botan,
-	brcmfmac_sdio-firmware-rpi, clamav, cmake, containerd,
-	crucible, dmenu-wayland, dmraid, docker-cli, docker-engine,
-	domoticz, fmc, freeipmi, gdal, gdb, giflib, gnupg2, go,
-	google-breakpad, googlefontdirectory, imx-gpu-viv, inih,
-	libassuan, libblockdev, libcurl, libdrm, libgpg-error,
-	libksba, libnpth, libressl, libtracefs, lxc, mbedtls, mesa3d,
-	oatpp, opensc, oprofile, perl-net-ssleay, petitboot,
-	php-xdebug, psplash, python-pypng, python-segno,
-	python-service-identity, python3, skeleton-init-sysv, systemd,
-	tcf-agent, tiff, uuu, wolfssl, xmrig, zic
-
-	Issues resolved (http://bugs.uclibc.org):
-
-        #14416: Mesa3D missing DRI3 support for various Gallium drivers
-        #16009: 'select' does not work with 'choice'
-        #16036: android-tools version is too old
-
-2024.02.1, released March 26th, 2024
-
-	Important / security related fixes.
-
-	Toolchain: Dropped old Codesourcery ARM / AARCH64 and
-	Codescape MIPS external toolchains as they use old Glibc
-	versions not compatible with 64-bit time_t
-
-	Defconfigs: Starfive visionfive2: Use correct genimage
-	configuration. TI am62x_sk / am64_sk: Use correct optee-os
-	platform setting and use a fixed ti-k3-r5-loader version.
-
-	Infrastructure: Use git to fetch CVE data from the FKIE
-	repository to work around an issue with missing meta files in
-	the releases.
-
-	Updated/fixed packages: axel, bash, bitcoin, botan, busybox,
-	containerd, cryptsetup, cvs, docker-compose, docker-engine,
-	ell, expat, giflib, gmp, go, harfbuzz, intel-gmmlib,
-	intel-mediadriver, iwd, kodi, kodi-pvr-hts, libcgroup, libdrm,
-	libgit2, libkrb5, libnfs, libunwind, libvpl,
-	libtorrent-rasterbar, libxml2, linux, mariadb, mesa3d,
-	mmc-utils, msmtp, multipath-tools, neon, onevpl-intel-gpu,
-	openssh, openvpn, osm2pgsql, owfs, php, poco, policycoreutils,
-	postgis, privoxy, pulseaudio, pure-ftpd, putty,
-	python-configshell-fb, python-rtslib-fb, rauc, restorecond,
-	spice, squid, targetcli-fb, tzdata, util-linux, vdr, xmrig,
-	xvisor, zic
-
-	Issues resolved (http://bugs.uclibc.org):
-
-	#15997: Build Squid with GCC12.3 in Buildroot 2024.02 will fail
-
-2024.02, released March 5th, 2024
-
-	Various fixes.
-
-	Updated/fixed packages: botan, conmon, dash, efivar, expat,
-	fluent-bit, gcc, gst1-vaapi, libcoap, libselinux, liburing,
-	libva, libxml2, ltp-testsuite, luvi, newlib-bare-metal,
-	nginx-naxsi, octave, openblas, openvmtools, parted, poco,
-	powertop, python-aiohttp, python-cheroot, python-django,
-	python-grpcio, rauc, rauc-hawkbit-updater, rtl8822cs, rust,
-	sdl2, shadow, spirv-tools, strace, strongswan, tar, tllist,
-	vim
-
-	Removed packages: mysql (virtual), oracle-mysql,
-	python-setuptools-scm-git-archive
-
-2024.02-rc2, released March 1st, 2024
-
-	Fixes all over the tree.
-
-	Infrastructure: Various fixes for pkg-stats after moving to
-	the FKIE CVE feed and support for older python/ijson versions.
-
-	Updated/fixed packages: ccache, dracut, erlang, freetype,
-	libheif, libpthsem, micropython, newlib-bare-metal, openssh,
-	poco, python3, redis, rhash, shim, squid, syslinux
-
-2024.02-rc1, released February 25th, 2024
-
-	Fixes all over the tree and new features.
-
-	Toolchain:
-
-	- GDB: Add version 14.1, default to 13.2.
-
-	- uClibc-ng updated to 1.0.45
-
-	- Bootlin external toolchains updated to 2023.11-1, moving the
-          stable toolchains to GCC 12.3 / binutils 2.40 / GDB 13.2 /
-          glibc 2.38 / musl 1.2.4 / uClibc-ng 1.0.45
-
-	- Add support for building a bare metal toolchain suitable for
-	  building firmware for certain (co-)processors, possibly
-	  using a different CPU architecture than the main Buildroot
-	  configuration.
-
-	Default optimization level changed from optimize for size
-        (-Os) to optimize for speed (-O2).
-
-	Support: Use the Fraunhofer FKIE JSON files for CVE matching
-	now that NVD is about to deprecate its feeds.
-
-	New defconfigs: AMD Zynqmp kria kd240 and kr260, zcu104, Avnet
-	RZBoard V2L, Mangopi MQ1RDW2, NXP i.MX 93 11x11 EVK, QEMU
-	Riscv64 virt-efi, TI AM574x Industrial Development Kit
-
-	Removed defconfigs: Zynq qmtech
-
-	New packages: binutils-bare-metal, dmenu-wayland, fcft, foot,
-	firmware-ele-imx, ivi-homescreen, libjwt, libtraceevent,
-	libtracefs, libutempter, lua-ansicolors, lua-argparse,
-	lua-conciseserialization, lua-ubjson, minisign,
-	newlib-bare-metal, python-aiosqlite, python-annotated-types,
-	python-anyio, python-asyncssh, python-bitarray,
-	python-cachetools, python-contourpy, python-decouple,
-	python-fastapi-sessions, python-fastapi,
-	python-google-api-core, python-google-auth,
-	python-googleapis-common-protos, python-grpc-requests,
-	python-grpcio-reflection, python-grpcio, python-httpcore,
-	python-httpx, python-matplotlib-inline, python-ml-dtypes,
-	python-multipart, python-pydantic-core, python-pypng,
-	python-starlette, python-tcolorpy, python-trafaret,
-	python-urwid-readline, python-uvicorn, rlwrap, tllist
-
-	Removed packages: davinci-bootcount (renamed to
-	uboot-bootcount), flickcurl, gmpc, libmpd, micropython-lib,
-	python-crossbar, python-pygame, tinymembench
-
-	Issues resolved (http://bugs.uclibc.org):
-
-	#10096: SH4 toolchain does not build Linux kernel magicpanelr2_..
-	#15889: please update meson
-	#15898: Unable to boot syslinux.efi produced by buildroot (EFI 64-..
-	#15910: USB keyboard is not working by default "raspberrypicm4io_..
-	#15952: Grub fails to load large rootfs files
-
-2023.11.2, released March 1st, 2024
-
-	Important / security related fixes.
-
-	Added CPE identifiers for a large number of packages.
-
-	Updated/fixed packages: bayer2rgb-neon, brltty, c-ares, cog,
-	containerd, cpio, crda, criu, darkhttpd, davinci-bootcount,
-	dbus, depot-tools, dhcpcd, domoticz, environment-setup, expat,
-	faad2, falcosecurity-libs, flex, flutter-engine,
-	flutter-gallery, flutter-pi, flutter-sdk-bin,
-	freeradius-server, freerdp, frr, gesftpserver, glibc, gnutls,
-	go, gst1-devtools, gst1-libav, gst1-python, gst1-vaapi,
-	gst-omx, gstreamer1, haproxy, hiredis, joe, json-c, leptonica,
-	libcurl, libp11, libuwsc, libvips, libzenoh-pico,
-	linux-firmware, linux-headers, localedef, lua-http, lvm2,
-	lynx, mbedtls, micropython, minizip, mpfr, netatalk, ngrep,
-	onevpl, opencv4, opencv4-contrib, openssh, opus, petitboot,
-	php, python-aiohttp, python-bitarray, python-bitstring,
-	python-esptool, python-gunicorn, python-hpack,
-	python-html5lib, python-lmdb, python-mako, python-numpy,
-	python-oauthlib, python-sqlparse, python-wheel, qt5base,
-	qt6base, redis, runc, sdl2, sqlite, syslog-ng, sysstat,
-	util-linux, vulkan-loader, webkitgtk, weston, wireless-regdb,
-	wlroots, wpewebkit, xlib_libXpm, xterm, xwayland, yasm
-
-	New packages: python-bitarray
-
-	Issues resolved (http://bugs.uclibc.org):
-
-	#10096: SH4 toolchain does not build Linux kernel magicpa..
-	#15952: Grub fails to load large rootfs files
-
 2023.11.1, released January 15th, 2024
 
 	Important / security related fixes.
@@ -433,24 +157,6 @@
 	#15826: nodejs modules with native extensions fail to install
 	#15835: Incompatibility between network-manager and libcurl 8.4
 
-2023.08.4, released December 4th, 2023
-
-	Important / security related fixes.
-
-	Defconfigs: Raspberrypi: Fix DT overlay for autoproving of
-	bluetooth driver, Toradex apalis i.mx6: Add download hashes
-	for Linux and U-Boot.
-
-	Updated/fixed packages: gcc, erlang, exfatprogs, gsl,
-	imagemagick, intel-microcode, libde265, libmemcached,
-	libpjsip, libxml2, mariadb, memcached, motion, netsnmp, perl,
-	postgresql, putty, rtty, samba4, speechd, squid, vim, vlc,
-	xenomai, xtables-addons, zfs
-
-	Issues resolved (http://bugs.uclibc.org):
-
-	#15856: Using BR2_CONFIG= on a different file-system...
-
 2023.08.3, released November 14th, 2023
 
 	Important / security related fixes.
@@ -824,82 +530,6 @@
 	#15376: Libiconv config
 	#15461: QtVirtualKeyboard segfaults
 
-2023.02.10, released March 1st, 2024
-
-	Important / security related fixes.
-
-	Added CPE identifiers for a large number of packages.
-
-	Updated/fixed packages: bayer2rgb-neon, brltty, c-ares,
-	containerd, crda, darkhttpd, davinci-bootcount, dbus,
-	domoticz, environment-setup, expat, faad2, falcosecurity-libs,
-	flex, freeradius-server, freerdp, frr, gesftpserver, glibc,
-	gnutls, go, gst1-devtools, gst1-libav, gst1-python,
-	gst1-vaapi, gst-omx, gstreamer1, haproxy, joe, json-c,
-	leptonica, libcurl, libuwsc, libvips, linux-firmware,
-	linux-headers, localedef, lua-http, lvm2, lynx, mbedtls,
-	micropython, minizip, mpfr, netatalk, ngrep, opencv4,
-	opencv4-contrib, openssh, opus, php, python-aiohttp,
-	python-esptool, python-gunicorn, python-hpack,
-	python-html5lib, python-lmdb, python-mako, python-numpy,
-	python-oauthlib, python-sqlparse, qt5base, qt6base, redis,
-	runc, sdl2, sqlite, sysstat, uuu, webkitgtk, wireless-regdb,
-	wpewebkit, xlib_libXpm, xterm, xwayland, yasm
-
-	Issues resolved (http://bugs.uclibc.org):
-
-	#10096: SH4 toolchain does not build Linux kernel magicpa..
-	#15952: Grub fails to load large rootfs files
-
-2023.02.9, released January 15th, 2024
-
-	Important / security related fixes.
-
-	Infrastructure:
-
-	- Download: Revert a permission fixup step in the tarball
-	  creation logic, which lead to a hash mismatch issue in two
-	  cargo-vendored packages, ripgrep and sentry-cli.
-
-	- Build: Pass GIT_DIR=. in the environment (through
-	  HOST_MAKE_ENV/TARGET_MAKE_ENV) to the build steps to
-	  workaround packages trying to detect if they are building in
-	  a git checkout and getting confused when building in a sub
-	  directory of a Buildroot git checkout.
-
-	Updated/fixed packages: apcupsd, arm-trusted-firmware, botan,
-	cjson, cups, dropbear, duktape, edk2, exim, faad2, freeswitch,
-	gcc, gdal, gdb, giflib, glibc, go, google-breakpad, gst-omx,
-	gstd, gst1-devtools, gst1-libav, gst1-plugins-bad,
-	gst1-plugins-base, gst1-plugins-good, gst1-plugins-ugly,
-	gst1-python, gst1-rtsp-server, gst1-vaapi, gstreamer1,
-	gstreamer1-editing-services, ipcalc, jq, json-for-modern-cpp,
-	ksmbd-tools, libaio, libcamera, libcap-ng, libcurl, libebml,
-	libgtk3, libiec61850, libraw, libsigsegv, libssh, libssh2,
-	libuev, libwebsockets, liquid-dsp, lvm2, madplay, mesa3d,
-	micropython, mp4v2, opensc, openssh, orc, php, pipewire,
-	postgis, postgresql, proftpd, putty, python-sip,
-	python-werkzeug, rng-tools, shim, squid, strongswan, sway,
-	tinyssh, tor, tree, uftp, valijson, wireshark, wolfssl,
-	xserver_xorg-server, xwayland
-
-2023.02.8, released December 4th, 2023
-
-	Important / security related fixes.
-
-	Defconfigs: Raspberrypi: Fix DT overlay for autoproving of
-	bluetooth driver, Toradex apalis i.mx6: Add download hashes
-	for Linux and U-Boot.
-
-	Updated/fixed packages: exfatprogs, gcc, imagemagick,
-	intel-microcode, libpjsip, libxml2, mariadb, memcached,
-	motion, netsnmp, perl, postgresql, rtty, samba4, speech,
-	squid, vim, vlc, xenomai, xtables-addons, zfs
-
-	Issues resolved (http://bugs.uclibc.org):
-
-	#15856: Using BR2_CONFIG= on a different file-system...
-
 2023.02.7, released November 14th, 2023
 
 	Important / security related fixes.

Config.in

@@ -105,7 +105,7 @@ menu "Commands"
 
 config BR2_WGET
 	string "Wget command"
-	default "wget -nd -t 3"
+	default "wget --passive-ftp -nd -t 3"
 
 config BR2_SVN
 	string "Subversion (svn) command"
@@ -474,7 +474,7 @@ config BR2_STRIP_EXCLUDE_DIRS
 
 choice
 	prompt "gcc optimization level"
-	default BR2_OPTIMIZE_2
+	default BR2_OPTIMIZE_S
 	help
 	  Set the optimization level for gcc
 
@@ -520,7 +520,6 @@ config BR2_OPTIMIZE_2
 	  -falign-loops -falign-labels -ftree-vrp -ftree-pre. Please
 	  note the warning under -fgcse about invoking -O2 on programs
 	  that use computed gotos.
-	  This is the default.
 
 config BR2_OPTIMIZE_3
 	bool "optimization level 3"
@@ -549,6 +548,7 @@ config BR2_OPTIMIZE_S
 	  -falign-loops -falign-labels -freorder-blocks
 	  -freorder-blocks-and-partition -fprefetch-loop-arrays
 	  -ftree-vect-loop-version
+	  This is the default.
 
 config BR2_OPTIMIZE_FAST
 	bool "optimize for fast (may break packages!)"
@@ -586,7 +586,7 @@ config BR2_ENABLE_LTO
 config BR2_GOOGLE_BREAKPAD_ENABLE
 	bool "Enable google-breakpad support"
 	depends on BR2_INSTALL_LIBSTDCPP
-	depends on BR2_TOOLCHAIN_GCC_AT_LEAST_7 # C++17
+	depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_8 # C++11
 	depends on BR2_USE_WCHAR
 	depends on BR2_TOOLCHAIN_HAS_THREADS
 	depends on BR2_TOOLCHAIN_USES_GLIBC

Config.in.legacy

@@ -144,110 +144,7 @@ endif
 
 ###############################################################################
 
-comment "Legacy options removed in 2024.02"
-
-config BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_IMG_MIPS
-	bool "Codescape IMG GNU Linux Toolchain 2018.09 has been removed"
-	select BR2_LEGACY
-	help
-	  The Codescape IMG GNU Linux toolchain has been removed, use a
-	  Bootlin toolchain instead.
-
-config BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_MTI_MIPS
-	bool "Codescape MTI GNU Linux Toolchain 2018.09 has been removed"
-	select BR2_LEGACY
-	help
-	  The Codescape MTI GNU Linux toolchain has been removed, use a
-	  Bootlin toolchain instead.
-
-config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_AARCH64
-	bool "CodeSourcery AArch64 2014.11 has been removed"
-	select BR2_LEGACY
-	help
-	  The Sourcery CodeBench AArch64 toolchain has been removed,
-	  use an ARM/Bootlin/Linaro toolchain instead.
-
-config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_ARM
-	bool "Sourcery CodeBench ARM 2014.05 has been removed"
-	select BR2_LEGACY
-	help
-	  The Sourcery CodeBench ARM toolchain has been removed, use
-	  an ARM/Bootlin/Linaro toolchain instead.
-
-config BR2_PACKAGE_MYSQL
-	bool "mysql virtual package removed"
-	select BR2_LEGACY
-	help
-	  The mysql virtual package has been removed as mariadb is the
-	  only supported mysql variant. Use the mariadb package
-	  instead.
-
-config BR2_PACKAGE_ORACLE_MYSQL
-	bool "oracle mysql removed"
-	select BR2_LEGACY
-	help
-	  Oracle mysql has been removed as the package was
-	  unmaintained. Consider using mariadb instead.
-
-config BR2_PACKAGE_STRONGSWAN_SCEP
-	bool "strongswan SCEP client tool removed"
-	select BR2_LEGACY
-	help
-	  "ipsec scepclient" tool has been removed and replaced by the
-	  pki subcommands "pki --scep" and "pki --scepca" which
-	  implement the new SCEP RFC 8894 standard that was released in
-	  September 2020 and which supports trusted "certificate
-	  renewal" based on the existing client certificate.
-
-config BR2_PACKAGE_SHADOW_UTMPX
-	bool "shadow utmpx removed"
-	select BR2_LEGACY
-	help
-	  UTMPX has been dropped by upstream.
-
-config BR2_PACKAGE_TINYMEMBENCH
-	bool "tinymembench removed"
-	select BR2_LEGACY
-	help
-	  tinymembench has been removed due to being abandoned.
-
-config BR2_PACKAGE_DAVINCI_BOOTCOUNT
-	bool "davinci-bootcount has been renamed"
-	select BR2_LEGACY
-	select BR2_PACKAGE_UBOOT_BOOTCOUNT
-	help
-	  The davinci-bootcount package has been renamed to
-	  uboot-bootcount.
-
-config BR2_PACKAGE_PYTHON_CROSSBAR
-	bool "python-crossbar removed"
-	select BR2_LEGACY
-	help
-	  python-crossbar has been removed. The current package has
-	  not received an update since Sat Oct 9 13:55:06 2021 commit:
-	  33ece2446e25e20929d1c7eefa9f3244a3b79a92 and is not python
-	  3.12.0 compatible.
-
-	  Furthermore, the current version requires at least 42 new
-	  packages worth of depedencies of which several require
-	  patches to be python 3.12.0 compatible. As nobody has
-	  stepped up to maintain the package and its ever-growing list
-	  of dependencies, along with the other problems, it was time
-	  to drop the package.
-
-config BR2_PACKAGE_PYTHON_PYGAME
-	bool "python-pygame removed"
-	select BR2_LEGACY
-	help
-	  python-pygame has been removed due to being abandoned and
-	  the old version no longer building with python 3.12.0.
-
-config BR2_KERNEL_HEADERS_4_14
-	bool "kernel headers version 4.14.x are no longer supported"
-	select BR2_LEGACY
-	help
-	  Version 4.14.x of the Linux kernel headers are no longer
-	  maintained upstream and are now removed.
+comment "Legacy options removed in 2023.11"
 
 config BR2_PACKAGE_LIBCAMERA_PIPELINE_RASPBERRYPI
 	bool "libcamera pipeline 'raspberrypi' was renamed to 'rpi/vc4'"
@@ -256,109 +153,8 @@ config BR2_PACKAGE_LIBCAMERA_PIPELINE_RASPBERRYPI
 	select BR2_LEGACY
 	select BR2_PACKAGE_LIBCAMERA_PIPELINE_RPI_VC4
 	help
-	  Since version 0.1.0, the pipeline option 'raspberrypi' was
-	  renamed to 'rpi/vc4'.
-
-config BR2_GDB_VERSION_11
-	bool "gdb 11.x removed"
-	select BR2_LEGACY
-	help
-	  GDB 11.x has been removed, use a newer version.
-
-config BR2_PACKAGE_LIBMPD
-	bool "libmpd package was removed"
-	select BR2_LEGACY
-	help
-	  The libmpd package was only used by gmpc, both of which are
-	  no longer maintained upstream.
-
-config BR2_PACKAGE_GMPC
-	bool "gmpc package was removed"
-	select BR2_LEGACY
-	help
-	  The gmpc package was removed because it was unmaintained,
-	  and still using the old libsoup2 library.
-
-config BR2_PACKAGE_FLICKCURL
-	bool "flickcurl package was removed"
-	select BR2_LEGACY
-	help
-	  The flickcurl package was removed because it was
-	  unmaintained upstream and causing build failures.
-
-config BR2_PACKAGE_ONEVPL
-	bool "onevpl package was renamed"
-	select BR2_LEGACY
-	select BR2_PACKAGE_LIBVPL
-
-config BR2_KERNEL_HEADERS_6_5
-	bool "kernel headers version 6.5.x are no longer supported"
-	select BR2_LEGACY
-	help
-	  Version 6.5.x of the Linux kernel headers are no longer
-	  maintained upstream and are now removed.
-
-config BR2_PACKAGE_WATCHDOGD_GENERIC_POLL
-	int "watchdogd generic poll has been replaced"
-	default 0
-	help
-	  The generic script poll interval has been replaced upstream
-	  with a boolean on/off.  Your configuration has been migrated.
-
-	  Set this legacy option to 0 here to remove the warning.
-
-# Note: BR2_PACKAGE_WATCHDOGD_*_POLL_WRAP referenced in package/watchdogd/Config.in
-config BR2_PACKAGE_WATCHDOGD_GENERIC_POLL_WRAP
-	bool
-	default y if BR2_PACKAGE_WATCHDOGD_GENERIC_POLL != 0
-	select BR2_LEGACY
-
-config BR2_PACKAGE_WATCHDOGD_LOADAVG_POLL
-	int "watchdogd loadavg poll has been replaced"
-	default 0
-	help
-	  The CPU load average poll interval has been replaced upstream
-	  with a boolean on/off.  Your configuration has been migrated.
-
-	  Set this legacy option to 0 here to remove the warning.
-
-# Note: BR2_PACKAGE_WATCHDOGD_*_POLL_WRAP referenced in package/watchdogd/Config.in
-config BR2_PACKAGE_WATCHDOGD_LOADAVG_POLL_WRAP
-	bool
-	default y if BR2_PACKAGE_WATCHDOGD_LOADAVG_POLL != 0
-	select BR2_LEGACY
-
-config BR2_PACKAGE_WATCHDOGD_FILENR_POLL
-	int "watchdogd filenr poll has been replaced"
-	default 0
-	help
-	  The file descriptor leak poll has been replaced upstream with
-	  a boolean on/off.  Your configuration has been migrated.
-
-	  Set this legacy option to 0 here to remove the warning.
-
-# Note: BR2_PACKAGE_WATCHDOGD_*_POLL_WRAP referenced in package/watchdogd/Config.in
-config BR2_PACKAGE_WATCHDOGD_FILENR_POLL_WRAP
-	bool
-	default y if BR2_PACKAGE_WATCHDOGD_FILENR_POLL != 0
-	select BR2_LEGACY
-
-config BR2_PACKAGE_WATCHDOGD_MEMINFO_POLL
-	int "watchdogd meminfo poll has been replaced"
-	default 0
-	help
-	  The memleak detector poll interval has been replaced upstream
-	  with a boolean on/off.  Your configuration has been migrated.
-
-	  Set this legacy option to 0 here to remove the warning.
-
-# Note: BR2_PACKAGE_WATCHDOGD_*_POLL_WRAP referenced in package/watchdogd/Config.in
-config BR2_PACKAGE_WATCHDOGD_MEMINFO_POLL_WRAP
-	bool
-	default y if BR2_PACKAGE_WATCHDOGD_MEMINFO_POLL != 0
-	select BR2_LEGACY
-
-comment "Legacy options removed in 2023.11"
+	  Since version 0.1.0 the libcamera pipeline option
+	  'raspberrypi' was renamed to 'rpi/vc4'.
 
 config BR2_PACKAGE_PYTHON_PYXB
 	bool "python-pyxb removed"

DEVELOPERS

@@ -28,16 +28,10 @@
 
 N:	Adam Duskett <adam.duskett@amarulasolutions.com>
 F:	package/depot-tools/
-F:	package/dmenu-wayland/
-F:	package/fcft/
-F:	package/foot/
 F:	package/flutter-engine/
 F:	package/flutter-gallery/
 F:	package/flutter-pi/
 F:	package/flutter-sdk-bin/
-F:	package/ivi-homescreen/
-F:	package/libutempter/
-F:	package/tllist/
 F:	support/testing/tests/package/test_flutter.py
 
 N:	Adam Heinrich <adam@adamh.cz>
@@ -114,7 +108,6 @@ F:	package/libest/
 
 N:	Alexander Mukhin <alexander.i.mukhin@gmail.com>
 F:	package/tinyproxy/
-F:	package/zfs/
 
 N:	Alexander Sverdlin <alexander.sverdlin@gmail.com>
 F:	package/mini-snmpd/
@@ -351,7 +344,6 @@ F:	package/bitcoin/
 F:	package/clamav/
 F:	package/dav1d/
 F:	package/dht/
-F:	package/dnsmasq/
 F:	package/dovecot/
 F:	package/dovecot-pigeonhole/
 F:	package/dtv-scan-tables/
@@ -436,7 +428,6 @@ F:	package/libva/
 F:	package/libva-intel-driver/
 F:	package/libva-utils/
 F:	package/libvorbis/
-F:	package/libvpl/
 F:	package/libvpx/
 F:	package/libyuv/
 F:	package/linux-firmware/
@@ -447,6 +438,7 @@ F:	package/mjpg-streamer/
 F:	package/mpg123/
 F:	package/ntp/
 F:	package/nut/
+F:	package/onevpl/
 F:	package/onevpl-intel-gpu/
 F:	package/opus/
 F:	package/pciutils/
@@ -531,12 +523,10 @@ F:	package/ncdu/
 N:	Brandon Maier <brandon.maier@collins.com>
 F:	board/freescale/ls1046a-frwy/
 F:	configs/ls1046a-frwy_defconfig
-F:	package/mtd/
 F:	package/python-pysensors/
 F:	package/qoriq-fm-ucode/
 F:	package/unifdef/
 F:	package/vmtouch/
-F:	support/testing/tests/package/test_zip.py
 
 N:	Brock Williams <brock@cottonwoodcomputer.com>
 F:	package/pdmenu/
@@ -576,6 +566,7 @@ F:	package/coremark/
 F:	package/coremark-pro/
 F:	package/gstreamer1/gst1-shark/
 F:	package/micropython/
+F:	package/micropython-lib/
 F:	package/syslog-ng/
 
 N:	Christian Kellermann <christian.kellermann@solectrix.de>
@@ -676,8 +667,6 @@ F:	configs/beelink_gs1_defconfig
 N:	Colin Foster <colin.foster@in-advantage.com>
 F:	package/python-tftpy/
 F:	package/rauc-hawkbit-updater/
-F:	support/testing/tests/package/sample_python_tftpy.py
-F:	support/testing/tests/package/test_python_tftpy.py
 
 N:	Corentin Guillevic <corentin.guillevic@smile.fr>
 F:	package/libloki/
@@ -764,9 +753,18 @@ F:	package/sscep/
 F:	package/uuu/
 
 N:	Dario Binacchi <dariobin@libero.it>
-F:	package/uboot-bootcount/
+F:	package/davinci-bootcount/
 F:	package/libmnl/
 
+N:	David Bachelart <david.bachelart@bbright.com>
+F:	package/ccrypt/
+F:	package/dos2unix/
+F:	package/ipmiutil/
+F:	package/jsmn/
+F:	package/python-daemon/
+F:	package/sslh/
+F:	package/udpxy/
+
 N:	David Bender <codehero@gmail.com>
 F:	package/benejson/
 F:	package/cgic/
@@ -1057,6 +1055,7 @@ F:	package/snort3/
 F:	package/suricata/
 F:	package/tinycbor/
 F:	package/tinydtls/
+F:	package/tinymembench/
 F:	package/whois/
 F:	package/x11r7/xlib_libXpresent/
 F:	package/zeek/
@@ -1071,8 +1070,6 @@ F:	package/python-pymodbus/
 N:	Flávio Tapajós <flavio.tapajos@newtesc.com.br>
 F:	configs/asus_tinker-s_rk3288_defconfig
 F:	board/asus/tinker-s/
-F:	package/python-sqlalchemy/
-F:	package/rsyslog/
 
 N:	Florian Fainelli <f.fainelli@gmail.com>
 F:	package/cpulimit/
@@ -1206,7 +1203,6 @@ N:	Giulio Benetti <giulio.benetti@benettiengineering.com>
 F:	board/bananapi/bananapi-m2-ultra/
 F:	board/freescale/imx6ullevk/
 F:	board/freescale/imxrt1050evk/
-F:	board/mangopi/mq1rdw2/
 F:	board/olimex/a*
 F:	board/pine64/rockpro64
 F:	configs/amarula_vyasa_rk3288_defconfig
@@ -1216,7 +1212,6 @@ F:	configs/bananapi_m2_ultra_defconfig
 F:	configs/freescale_imx6ullevk_defconfig
 F:	configs/imx6ullevk_defconfig
 F:	configs/imxrt1050-evk_defconfig
-F:	configs/mangopi_mq1rdw2_defconfig
 F:	configs/olimex_a*
 F:	configs/rockpro64_defconfig
 F:	package/at/
@@ -1231,9 +1226,6 @@ F:	package/libfuse3/
 F:	package/libnspr/
 F:	package/libnss/
 F:	package/libnvme/
-F:	package/libtraceevent/
-F:	package/libtracefs
-F:	package/linux-tools/linux-tool-rtla.mk.in
 F:	package/mali-driver/
 F:	package/minicom/
 F:	package/mongoose/
@@ -1381,12 +1373,6 @@ F:	package/mrp/
 N:	Ian Haylock <haylocki@yahoo.co.uk>
 F:	package/python-rpi-gpio/
 
-N:	Ibai Erkiaga <ibai.erkiaga-elorza@amd.com>
-F:	package/binutils-bare-metal/
-F:	package/gcc-bare-metal/
-F:	package/newlib-bare-metal/
-F:	toolchain/toolchain-bare-metal-buildroot/
-
 N:	Ignacy Gawędzki <ignacy.gawedzki@green-communications.fr>
 F:	package/angularjs/
 
@@ -1492,7 +1478,7 @@ F:	package/zip/
 N:	Jared Bents <jared.bents@rockwellcollins.com>
 F:	package/libvirt/
 
-N:	Jarkko Sakkinen <jarkko@kernel.org>
+N:	Jarkko Sakkinen <jarkko.sakkinen@intel.com>
 F:	package/quota/
 
 N:	Jason Pruitt <jrspruitt@gmail.com>
@@ -1700,6 +1686,7 @@ F:	package/libcddb/
 F:	package/libmodbus/
 F:	package/ltris/
 F:	package/opentyrian/
+F:	package/python-pygame/
 
 N:	Julien Corjon <corjon.j@ecagroup.com>
 F:	package/qt5/
@@ -1712,14 +1699,14 @@ F:	configs/ts7680_defconfig
 F:	package/paho-mqtt-c
 
 N:	Julien Olivain <ju.o@free.fr>
-F:	board/qemu/riscv64-virt-efi/
+F:	board/qmtech/zynq/
 F:	board/spike/
 F:	board/technexion/imx8mmpico/
 F:	board/technexion/imx8mpico/
 F:	configs/imx8mmpico_defconfig
 F:	configs/imx8mpico_defconfig
-F:	configs/qemu_riscv64_virt_efi_defconfig
 F:	configs/spike_riscv64_defconfig
+F:	configs/zynq_qmtech_defconfig
 F:	package/fluid-soundfont/
 F:	package/fluidsynth/
 F:	package/glslsandbox-player/
@@ -1742,7 +1729,6 @@ F:	package/python-magic-wormhole/
 F:	package/python-magic-wormhole-mailbox-server/
 F:	package/python-magic-wormhole-transit-relay/
 F:	package/python-midiutil/
-F:	package/python-ml-dtypes/
 F:	package/python-pyalsa/
 F:	package/python-spake2/
 F:	package/rdma-core/
@@ -1750,143 +1736,73 @@ F:	package/riscv-isa-sim/
 F:	package/tinycompress/
 F:	package/z3/
 F:	package/zynaddsubfx/
-F:	support/testing/tests/boot/test_optee_os.py
-F:	support/testing/tests/boot/test_optee_os/
 F:	support/testing/tests/package/sample_python_distro.py
 F:	support/testing/tests/package/sample_python_gnupg.py
 F:	support/testing/tests/package/sample_python_hwdata.py
 F:	support/testing/tests/package/sample_python_midiutil.py
-F:	support/testing/tests/package/sample_python_ml_dtypes.py
 F:	support/testing/tests/package/sample_python_pyalsa.py
 F:	support/testing/tests/package/sample_python_spake2.py
-F:	support/testing/tests/package/test_acl.py
 F:	support/testing/tests/package/test_acpica.py
 F:	support/testing/tests/package/test_acpica/
-F:	support/testing/tests/package/test_apache.py
-F:	support/testing/tests/package/test_bc.py
-F:	support/testing/tests/package/test_bitcoin.py
 F:	support/testing/tests/package/test_brotli.py
-F:	support/testing/tests/package/test_btrfs_progs.py
-F:	support/testing/tests/package/test_btrfs_progs/
 F:	support/testing/tests/package/test_bzip2.py
 F:	support/testing/tests/package/test_compressor_base.py
-F:	support/testing/tests/package/test_coremark.py
-F:	support/testing/tests/package/test_cryptsetup.py
-F:	support/testing/tests/package/test_cryptsetup/
 F:	support/testing/tests/package/test_ddrescue.py
 F:	support/testing/tests/package/test_ddrescue/
 F:	support/testing/tests/package/test_dos2unix.py
-F:	support/testing/tests/package/test_ed.py
-F:	support/testing/tests/package/test_ethtool.py
-F:	support/testing/tests/package/test_ethtool/
-F:	support/testing/tests/package/test_file.py
-F:	support/testing/tests/package/test_file/
 F:	support/testing/tests/package/test_fluidsynth.py
 F:	support/testing/tests/package/test_fluidsynth/
-F:	support/testing/tests/package/test_fping.py
-F:	support/testing/tests/package/test_fwts.py
 F:	support/testing/tests/package/test_gawk.py
-F:	support/testing/tests/package/test_ghostscript.py
-F:	support/testing/tests/package/test_ghostscript/
 F:	support/testing/tests/package/test_glslsandbox_player.py
 F:	support/testing/tests/package/test_glslsandbox_player/
 F:	support/testing/tests/package/test_gnupg2.py
-F:	support/testing/tests/package/test_gnuplot.py
-F:	support/testing/tests/package/test_gnuplot/
 F:	support/testing/tests/package/test_gnuradio.py
 F:	support/testing/tests/package/test_gnuradio/
 F:	support/testing/tests/package/test_gzip.py
 F:	support/testing/tests/package/test_highway.py
 F:	support/testing/tests/package/test_hwloc.py
-F:	support/testing/tests/package/test_iozone.py
-F:	support/testing/tests/package/test_iperf.py
 F:	support/testing/tests/package/test_iperf3.py
-F:	support/testing/tests/package/test_iptables.py
-F:	support/testing/tests/package/test_jailhouse.py
-F:	support/testing/tests/package/test_jq.py
-F:	support/testing/tests/package/test_jq/
 F:	support/testing/tests/package/test_kexec.py
 F:	support/testing/tests/package/test_kexec/
-F:	support/testing/tests/package/test_kmod.py
-F:	support/testing/tests/package/test_kmod/
 F:	support/testing/tests/package/test_kmscube.py
 F:	support/testing/tests/package/test_kmscube/
 F:	support/testing/tests/package/test_less.py
-F:	support/testing/tests/package/test_libcamera.py
-F:	support/testing/tests/package/test_libcamera/
 F:	support/testing/tests/package/test_libgpgme.py
 F:	support/testing/tests/package/test_libjxl.py
-F:	support/testing/tests/package/test_links.py
-F:	support/testing/tests/package/test_links/
 F:	support/testing/tests/package/test_lrzip.py
-F:	support/testing/tests/package/test_lrzsz.py
-F:	support/testing/tests/package/test_ltrace.py
-F:	support/testing/tests/package/test_lvm2.py
 F:	support/testing/tests/package/test_lzip.py
 F:	support/testing/tests/package/test_lsof.py
 F:	support/testing/tests/package/test_lz4.py
 F:	support/testing/tests/package/test_lzop.py
-F:	support/testing/tests/package/test_mdadm.py
-F:	support/testing/tests/package/test_mdadm/
-F:	support/testing/tests/package/test_micropython.py
-F:	support/testing/tests/package/test_micropython/
-F:	support/testing/tests/package/test_mosquitto.py
 F:	support/testing/tests/package/test_mtools.py
-F:	support/testing/tests/package/test_mtr.py
 F:	support/testing/tests/package/test_ncdu.py
-F:	support/testing/tests/package/test_netcat.py
-F:	support/testing/tests/package/test_netsnmp.py
-F:	support/testing/tests/package/test_netsnmp/
 F:	support/testing/tests/package/test_nftables.py
 F:	support/testing/tests/package/test_nftables/
-F:	support/testing/tests/package/test_ngrep.py
-F:	support/testing/tests/package/test_ntp.py
-F:	support/testing/tests/package/test_ntp/
-F:	support/testing/tests/package/test_numactl.py
-F:	support/testing/tests/package/test_numactl/
 F:	support/testing/tests/package/test_octave.py
 F:	support/testing/tests/package/test_ola.py
 F:	support/testing/tests/package/test_ola/
 F:	support/testing/tests/package/test_openblas.py
-F:	support/testing/tests/package/test_pciutils.py
 F:	support/testing/tests/package/test_perftest.py
 F:	support/testing/tests/package/test_pigz.py
-F:	support/testing/tests/package/test_postgresql.py
 F:	support/testing/tests/package/test_python_distro.py
 F:	support/testing/tests/package/test_python_gnupg.py
 F:	support/testing/tests/package/test_python_hkdf.py
 F:	support/testing/tests/package/test_python_hwdata.py
 F:	support/testing/tests/package/test_python_magic_wormhole.py
 F:	support/testing/tests/package/test_python_midiutil.py
-F:	support/testing/tests/package/test_python_ml_dtypes.py
 F:	support/testing/tests/package/test_python_pyalsa.py
 F:	support/testing/tests/package/test_python_spake2.py
 F:	support/testing/tests/package/test_rdma_core.py
 F:	support/testing/tests/package/test_rdma_core/
 F:	support/testing/tests/package/test_screen.py
-F:	support/testing/tests/package/test_sed.py
-F:	support/testing/tests/package/test_socat.py
-F:	support/testing/tests/package/test_sox.py
-F:	support/testing/tests/package/test_sqlite.py
-F:	support/testing/tests/package/test_strace.py
 F:	support/testing/tests/package/test_stress_ng.py
 F:	support/testing/tests/package/test_tcl.py
 F:	support/testing/tests/package/test_tcl/
-F:	support/testing/tests/package/test_tcpdump.py
-F:	support/testing/tests/package/test_tesseract_ocr.py
-F:	support/testing/tests/package/test_thttpd.py
-F:	support/testing/tests/package/test_trace_cmd.py
-F:	support/testing/tests/package/test_trace_cmd/
-F:	support/testing/tests/package/test_usbutils.py
-F:	support/testing/tests/package/test_usbutils/
 F:	support/testing/tests/package/test_weston.py
 F:	support/testing/tests/package/test_weston/
-F:	support/testing/tests/package/test_xfsprogs.py
-F:	support/testing/tests/package/test_xfsprogs/
 F:	support/testing/tests/package/test_xz.py
 F:	support/testing/tests/package/test_z3.py
 F:	support/testing/tests/package/test_z3/
-F:	support/testing/tests/package/test_zbar.py
 F:	support/testing/tests/package/test_zchunk.py
 F:	support/testing/tests/package/test_zstd.py
 
@@ -1916,11 +1832,9 @@ N:	Kieran Bingham <kieran.bingham@ideasonboard.com>
 F:	package/libcamera/
 
 N:	Kilian Zinnecker <kilian.zinnecker@mail.de>
-F:	board/avnet/rzboard_v2l/
-F:	board/radxa/rock5b/
-F:	configs/avnet_rzboard_v2l_defconfig
-F:	configs/rock5b_defconfig
 F:	package/rockchip-rkbin/
+F:	configs/rock5b_defconfig
+F:	board/radxa/rock5b/
 
 N:	Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
 F:	package/wqy-zenhei/
@@ -2111,12 +2025,6 @@ F:	package/selinux-python/
 F:	utils/config
 F:	utils/diffconfig
 
-N:	Marcus Hoffmann <bubu@bubu1.eu>
-F:	support/testing/tests/package/test_python_fastapi.py
-F:	support/testing/tests/package/test_python_ruamel_yaml.py
-F:	support/testing/tests/package/sample_python_fastapi.py
-F:	support/testing/tests/package/sample_python_ruamel_yaml.py
-
 N:	Marek Belisko <marek.belisko@open-nandra.com>
 F:	package/libatasmart/
 F:	package/polkit/
@@ -2138,12 +2046,6 @@ F:	board/qemu/riscv64-virt/
 F:	configs/qemu_riscv32_virt_defconfig
 F:	configs/qemu_riscv64_virt_defconfig
 
-N:	Marleen Vos <marleen.vos@mind.be>
-F:	board/stmicroelectronics/common/stm32mp157/
-F:	configs/avenger96_defconfig
-F:	configs/stm32mp157a_dk1_defconfig
-F:	configs/stm32mp157c_dk2_defconfig
-
 N:	Martin Bark <martin@barkynet.com>
 F:	board/raspberrypi/
 F:	configs/raspberrypi3_defconfig
@@ -2176,8 +2078,10 @@ N:	Masahiro Yamada <yamada.masahiro@socionext.com>
 F:	board/arm/foundation-v8/
 F:	configs/arm_foundationv8_defconfig
 
-N:	Matt Silva <dev@matt-silva.com>
-F:	package/rlwrap/
+N:	Mathieu Audat <mathieuaudat@gmail.com>
+F:	board/technologic/ts4900/
+F:	configs/ts4900_defconfig
+F:	package/ts4900-fpga/
 
 N:	Mauro Condarelli <mc5686@mclink.it>
 F:	package/mc/
@@ -2185,6 +2089,7 @@ F:	package/python-autobahn/
 F:	package/python-cbor/
 F:	package/python-characteristic/
 F:	package/python-click/
+F:	package/python-crossbar/
 F:	package/python-lmdb/
 F:	package/python-mistune/
 F:	package/python-netaddr/
@@ -2214,11 +2119,6 @@ F:	package/postgresql/
 F:	package/protozero/
 F:	package/timescaledb/
 
-N:	Maxime Chevallier <maxime.chevallier@bootlin.com>
-F:	package/libtraceevent/
-F:	package/libtracefs
-F:	package/linux-tools/linux-tool-rtla.mk.in
-
 N:	Michael Durrant <mdurrant@arcturusnetworks.com>
 F:	board/arcturus/
 F:	configs/arcturus_ucp1020_defconfig
@@ -2303,18 +2203,11 @@ F:	board/zynqmp/
 F:	configs/versal_vck190_defconfig
 F:	configs/zynq_zc702_defconfig
 F:	configs/zynq_zc706_defconfig
-F:	configs/zynqmp_kria_kd240_defconfig
-F:	configs/zynqmp_kria_kr260_defconfig
 F:	configs/zynqmp_kria_kv260_defconfig
 F:	configs/zynqmp_zcu102_defconfig
-F:	configs/zynqmp_zcu104_defconfig
 F:	configs/zynqmp_zcu106_defconfig
-F:	package/binutils-bare-metal/
 F:	package/bootgen/
-F:	package/gcc-bare-metal/
-F:	package/newlib-bare-metal/
 F:	package/versal-firmware/
-F:	toolchain/toolchain-bare-metal-buildroot/
 
 N:	Nicola Di Lieto <nicola.dilieto@gmail.com>
 F:	package/uacme/
@@ -2430,9 +2323,6 @@ N:	Patrick Havelange <patrick.havelange@essensium.com>
 F:	support/testing/tests/package/test_lxc.py
 F:	support/testing/tests/package/test_lxc/
 
-N:	Patrick Oppenlander <patrick.oppenlander@gmail.com>
-F:	package/minisign/
-
 N:	Paul Cercueil <paul@crapouillou.net>
 F:	package/libiio/
 F:	package/lightning/
@@ -2474,6 +2364,7 @@ F:	package/dfu-programmer/
 F:	package/docker-compose/
 F:	package/dump1090/
 F:	package/fatcat/
+F:	package/flickcurl/
 F:	package/fscryptctl/
 F:	package/ifmetric/
 F:	package/jo/
@@ -2623,11 +2514,9 @@ F:	package/python-pymupdf/
 F:	package/python-rsa/
 F:	package/python-s3transfer/
 F:	support/testing/tests/package/sample_python_jmespath.py
-F:	support/testing/tests/package/sample_python_pymupdf.py
 F:	support/testing/tests/package/sample_python_rsa.py
 F:	support/testing/tests/package/sample_python_s3transfer.py
 F:	support/testing/tests/package/test_python_jmespath.py
-F:	support/testing/tests/package/test_python_pymupdf.py
 F:	support/testing/tests/package/test_python_rsa.py
 F:	support/testing/tests/package/test_python_s3transfer.py
 
@@ -2688,9 +2577,7 @@ F:	package/vnstat/
 
 N:	Romain Naour <romain.naour@gmail.com>
 F:	board/qemu/
-F:	board/ti/am574x-idk/
 F:	configs/qemu_*
-F:	configs/am574x_idk_defconfig
 F:	package/alure/
 F:	package/aubio/
 F:	package/binutils/
@@ -2773,9 +2660,15 @@ F:	support/misc/toolchainfile.cmake.in
 N:	Sam Voss <sam.voss@gmail.com>
 F:	package/ripgrep/
 
+N:	Sebastian Weyer <sebastian.weyer@smile.fr>
+F:      package/amlogic-boot-fip/
+F:	package/nushell/
+F:	package/rust-bindgen/
+F:	package/spirv-headers/
+F:	support/testing/tests/package/sample_nu.nu
+F:	support/testing/tests/package/test_nu.py
+
 N:	Sébastien Szymanski <sebastien.szymanski@armadeus.com>
-F:	board/armadeus/
-F:	configs/armadeus*
 F:	package/mmc-utils/
 F:	package/python-flask-jsonrpc/
 F:	package/python-flask-login/
@@ -2787,7 +2680,7 @@ F:	package/libbson/
 F:	package/lua-resty-http/
 F:	package/mpir/
 
-N:	Sen Hastings <sen@hastings.org>
+N:	Sen Hastings <sen@phobosdpl.com>
 F:	package/systemd
 F:	support/scripts/pkg-stats
 
@@ -2845,6 +2738,7 @@ F:	package/lcdapi/
 F:	package/libfreefare/
 F:	package/libjson/
 F:	package/libnfc/
+F:	package/libnfc/
 F:	package/libserial/
 F:	package/libsigsegv/
 F:	package/macchanger/
@@ -2965,6 +2859,47 @@ F:	package/openlayers/
 F:	package/vuejs/
 F:	package/vuejs-router/
 
+N:	Thomas De Schampheleire <thomas.de_schampheleire@nokia.com>
+F:	docs/manual/
+F:	package/cereal/
+F:	package/chartjs/
+F:	package/datatables/
+F:	package/datatables-buttons/
+F:	package/datatables-fixedcolumns/
+F:	package/datatables-responsive/
+F:	package/jszip/
+F:	package/libtelnet/
+F:	package/opkg-utils/
+F:	package/perl-convert-asn1/
+F:	package/perl-crypt-blowfish/
+F:	package/perl-crypt-cbc/
+F:	package/perl-crypt-openssl-aes/
+F:	package/perl-devel-cycle/
+F:	package/perl-devel-size/
+F:	package/perl-i18n/
+F:	package/perl-locale-maketext-lexicon/
+F:	package/perl-lwp-protocol-https/
+F:	package/perl-math-int64/
+F:	package/perl-math-prime-util/
+F:	package/perl-mime-base64-urlsafe/
+F:	package/perl-mojolicious-plugin-authentication/
+F:	package/perl-mojolicious-plugin-authorization/
+F:	package/perl-mojolicious-plugin-cspheader/
+F:	package/perl-mojolicious-plugin-i18n/
+F:	package/perl-mojolicious-plugin-securityheader/
+F:	package/perl-mozilla-ca/
+F:	package/perl-net-snmp/
+F:	package/perl-net-ssh2/
+F:	package/perl-net-telnet/
+F:	package/perl-path-class/
+F:	package/pigz/
+F:	package/popperjs/
+F:	package/xenomai/
+F:	support/scripts/size-stats
+F:	support/testing/tests/package/test_perl_lwp_protocol_https.py
+F:	utils/size-stats-compare
+F:	toolchain/
+
 N:	Thomas Devoogdt <thomas@devoogdt.com>
 F:	package/fluent-bit/
 F:	package/libsoup3/
@@ -3150,8 +3085,6 @@ N:	Wade Berrier <wberrier@gmail.com>
 F:	package/ngrep/
 
 N:	Waldemar Brodkorb <wbx@openadk.org>
-F:	package/asterisk/
-F:	package/libjwt/
 F:	package/mksh/
 F:	package/ruby/
 F:	package/uclibc/
@@ -3286,7 +3219,6 @@ F:	package/libuci/
 F:	package/linux-firmware/
 F:	package/linux-serial-test/
 F:	package/modem-manager/
-F:	package/ncftp/
 F:	package/nftables/
 F:	package/nuttcp/
 F:	package/parted/

Makefile

@@ -90,9 +90,9 @@ all:
 .PHONY: all
 
 # Set and export the version string
-export BR2_VERSION := 2024.02.5
+export BR2_VERSION := 2023.11.1
 # Actual time the release is cut (for reproducible builds)
-BR2_VERSION_EPOCH = 1723635000
+BR2_VERSION_EPOCH = 1705314000
 
 # Save running make version since it's clobbered by the make package
 RUNNING_MAKE_VERSION := $(MAKE_VERSION)

arch/Config.in

@@ -313,10 +313,6 @@ config BR2_ARCH_NEEDS_GCC_AT_LEAST_13
 	bool
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
 
-config BR2_ARCH_NEEDS_GCC_AT_LEAST_14
-	bool
-	select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
-
 # The following string values are defined by the individual
 # Config.in.$ARCH files
 config BR2_ARCH

arch/Config.in.arm

@@ -781,9 +781,6 @@ choice
 config BR2_ARM64_PAGE_SIZE_4K
 	bool "4KB"
 
-config BR2_ARM64_PAGE_SIZE_16K
-	bool "16KB"
-
 config BR2_ARM64_PAGE_SIZE_64K
 	bool "64KB"
 
@@ -792,7 +789,6 @@ endchoice
 config BR2_ARM64_PAGE_SIZE
 	string
 	default "4K" if BR2_ARM64_PAGE_SIZE_4K
-	default "16K" if BR2_ARM64_PAGE_SIZE_16K
 	default "64K" if BR2_ARM64_PAGE_SIZE_64K
 
 config BR2_ARCH

arch/Config.in.x86

@@ -72,7 +72,6 @@ config BR2_x86_pentium_m
 	depends on !BR2_x86_64
 	select BR2_X86_CPU_HAS_MMX
 	select BR2_X86_CPU_HAS_SSE
-	select BR2_X86_CPU_HAS_SSE2
 config BR2_x86_pentium2
 	bool "pentium2"
 	depends on !BR2_x86_64

arch/arch.mk

@@ -23,7 +23,7 @@ ifeq ($(BR2_ARC_PAGE_SIZE_4K)$(BR2_ARM64_PAGE_SIZE_4K),y)
 ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096
 else ifeq ($(BR2_ARC_PAGE_SIZE_8K),y)
 ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=8192 -Wl,-z,common-page-size=8192
-else ifeq ($(BR2_ARC_PAGE_SIZE_16K)$(BR2_ARM64_PAGE_SIZE_16K),y)
+else ifeq ($(BR2_ARC_PAGE_SIZE_16K),y)
 ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=16384 -Wl,-z,common-page-size=16384
 else ifeq ($(BR2_ARM64_PAGE_SIZE_64K),y)
 ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=65536 -Wl,-z,common-page-size=65536

board/acmesystems/acqua-a5/at91-sama5d3_acqua.dts

@@ -9,7 +9,7 @@
  * Licensed under GPLv2 or later.
  */
 /dts-v1/;
-#include "microchip/sama5d31.dtsi"
+#include "sama5d31.dtsi"
 
 / {
 	model = "Acme Systems Acqua SOM";

board/acmesystems/acqua-a5/patches/at91bootstrap3/at91bootstrap3.hash

@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  cdc04cca9e811043efdea43ad203d70d897e23a8bd46f01896ba45c8df50f6ec  at91bootstrap3-v3.10.3-br1.tar.gz

board/acmesystems/acqua-a5/patches/linux-headers/linux-headers.hash

@@ -1 +0,0 @@
-../linux/linux.hash

board/acmesystems/acqua-a5/patches/linux/linux.hash

@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  b66a5b863b0f8669448b74ca83bd641a856f164b29956e539bbcb5fdeeab9cc6  linux-6.6.30.tar.xz

board/asus/tinker-s/extlinux.conf

@@ -1,4 +1,4 @@
 label Tinker linux
-  kernel /boot/zImage
+  kernel /boot/uImage
   devicetree /boot/rk3288-tinker-s.dtb
   append console=ttyS2,115200n8 root=179:1 rootwait

board/asus/tinker/extlinux.conf

@@ -1,4 +1,4 @@
 label Tinker linux
-  kernel /boot/zImage
+  kernel /boot/uImage
   devicetree /boot/rk3288-tinker.dtb
   append console=ttyS2,115200n8 root=/dev/mmcblk0p1 rootwait

board/avnet/rzboard_v2l/genimage.cfg

@@ -1,29 +0,0 @@
-# SD card image for RZBoard V2L
-
-image boot.vfat {
-	vfat {
-		files = {
-			"Image",
-			"rzboard.dtb",
-			"uEnv.txt"
-		}
-	}
-	size = 24M
-}
-
-image sdcard.img {
-	hdimage {
-		partition-table-type = "hybrid"
-	}
-
-	partition boot {
-		partition-type = "0xC"
-		bootable = "true"
-		image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext2"
-	}
-}

board/avnet/rzboard_v2l/post-image.sh

@@ -1,5 +0,0 @@
-#!/usr/bin/env bash
-set -e
-
-cp board/avnet/rzboard_v2l/uEnv.txt "${BINARIES_DIR}"
-support/scripts/genimage.sh -c board/avnet/rzboard_v2l/genimage.cfg

board/avnet/rzboard_v2l/readme.txt

@@ -1,71 +0,0 @@
-RZBoard V2L
-===========
-
-https://www.avnet.com/wps/portal/us/products/avnet-boards/avnet-board-families/rzboard-v2l/
-
-This board support creates a bootable sd card image for the AVNET RZBoard V2L.
-This board is shipped with a u-boot inside its eMMC. This board support uses
-that u-boot and only puts uEnv.txt, kernel image and rootfs onto the sd card.
-
-Build:
-======
-
-  $ make rzboard_v2l_defconfig
-  $ make
-
-Files created in output directory
-=================================
-
-output/images
-.
-├── Image
-├── boot.vfat
-├── rootfs.ext2
-├── rootfs.ext4
-├── rootfs.tar
-├── rzboard.dtb
-├── sdcard.img
-└── uEnv.txt
-
-Creating bootable SD card:
-==========================
-
-Simply invoke (as root)
-
-sudo dd if=output/images/sdcard.img of=/dev/sdX && sync
-
-Where X is your SD card device.
-
-Booting:
-========
-
-Configure board for sd card boot:
----------------------------------
-Set the 'BOOT1' switch (next to the audio jack) to '1' (away from 'ON') in
-order to let the board boot kernel and rootfs from SD card.
-
-Serial console:
----------------
-The RZBoard V2L has a 4-pin header "J19" right next to the micro USB. Its
-layout can be seen in the Quick-Start Guide, or the Hardware User Guide,
-obtainable from:
-https://www.avnet.com/wps/portal/us/products/avnet-boards/avnet-board-families/rzboard-v2l/
-
-The uart pins are as follows (from left to right - orientation according to the
-board's labeling):
-
-pin 1: n/a  (most away from the board's corner)
-pin 2: tx
-pin 3: rx
-pin 4: gnd  (nearest to the board's corner)
-
-Baudrate for this board is 115200.
-
-Power-Up:
----------
-Plug in a suitable USB-C power supply and press the button 'S1' (next to the
-USB-C port) for 2 seconds until the LED goes on.
-
-Login:
-------
-Enter 'root' as login user, and the prompt is ready.

board/avnet/rzboard_v2l/uEnv.txt

@@ -1,3 +0,0 @@
-bootcmd=booti ${kernel_addr_r} - ${fdt_addr_r}
-uenvcmd=fatload mmc 0:1 ${kernel_addr_r} Image; fatload mmc 0:1 ${fdt_addr_r} rzboard.dtb
-bootargs=root=/dev/mmcblk0p2 rw rootfstype=ext4 earlyprintk console=ttyS0,115200 rootwait earlycon clk_ignore_unused debug

board/broadcom/northstar/post-image.sh

@@ -27,9 +27,8 @@ build_trx() {
 	rm -f $images/zImage.$device.lzma
 }
 
-devices="$(sed -n 's/^BR2_LINUX_KERNEL_INTREE_DTS_NAME="\([^"]*\)"$/\1/p' ${BR2_CONFIG})"
+devices="$(sed -n 's/^BR2_LINUX_KERNEL_INTREE_DTS_NAME="\([a-z0-9 \-]*\)"$/\1/p' ${BR2_CONFIG})"
 for device in $devices; do
-	device="${device#broadcom/}"
 	case "$device" in
 		"bcm4708-smartrg-sr400ac")
 			build_trx "$1" "$device"

board/chromebook/elm/patches/linux-headers/linux-headers.hash

@@ -1 +0,0 @@
-../linux/linux.hash

board/chromebook/elm/patches/linux/linux.hash

@@ -1,2 +0,0 @@
-# Locally computed
-sha256  dcdf99e43e98330d925016985bfbc7b83c66d367b714b2de0cbbfcbf83d8ca43  linux-5.10.tar.xz

board/chromebook/snow/linux-4.15-dts-tpm.patch

@@ -9,9 +9,6 @@ See https://code.google.com/p/chromium/issues/detail?id=220169
 and https://lkml.org/lkml/2013/3/4/242
 
 Signed-off-by: Alex Suykov <alex.suykov@gmail.com>
-Upstream: Not Applicable
-[yann.morin.1998@free.fr: add Upstream tag]
-Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
 
 --- a/arch/arm/boot/dts/exynos5250-snow-common.dtsi
 +++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi

board/chromebook/snow/patches/linux-headers/linux-headers.hash

@@ -1 +0,0 @@
-../linux/linux.hash

board/chromebook/snow/patches/linux/linux.hash

@@ -1,2 +0,0 @@
-# Localy computed
-sha256  5a26478906d5005f4f809402e981518d2b8844949199f60c4b6e1f986ca2a769  linux-4.15.tar.xz

board/freescale/common/imx/genimage.cfg.template_imx9

@@ -1,42 +0,0 @@
-# Minimal SD card image for the NXP i.MX9 boards
-#
-# We mimic the .sdcard NXP's image format:
-# * the SD card must have 32 kB free space at the beginning,
-# * U-Boot is integrated into imx9-boot-sd.bin and is dumped as is,
-# * a FAT partition at offset 8MB is containing Image and DTB files
-# * a single root filesystem partition is required (ext2, ext3 or ext4)
-#
-
-image boot.vfat {
-	vfat {
-		label = "boot"
-		files = {
-			%FILES%
-		}
-	}
-
-	size = 64M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition imx-boot {
-		in-partition-table = "no"
-		image = "imx9-boot-sd.bin"
-		offset = %IMXOFFSET%
-	}
-
-	partition boot {
-		partition-type = 0xC
-		bootable = "true"
-		image = "boot.vfat"
-		offset = 8M
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext2"
-	}
-}

board/freescale/common/imx/imx8-bootloader-prepare.sh

@@ -8,8 +8,6 @@ main ()
 		exit 1
 	fi
 
-	FIT_EXTERNAL_POSITION=0x5000
-
 	if grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8M=y$" ${BR2_CONFIG}; then
 		dd if=${BINARIES_DIR}/u-boot-spl.bin of=${BINARIES_DIR}/u-boot-spl-padded.bin bs=4 conv=sync
 		cat ${BINARIES_DIR}/u-boot-spl-padded.bin ${BINARIES_DIR}/ddr_fw.bin > ${BINARIES_DIR}/u-boot-spl-ddr.bin
@@ -18,7 +16,7 @@ main ()
 		else
 			BL31=${BINARIES_DIR}/bl31.bin BL33=${BINARIES_DIR}/u-boot-nodtb.bin ATF_LOAD_ADDR=0x00910000 ${HOST_DIR}/bin/mkimage_fit_atf.sh ${UBOOT_DTB} > ${BINARIES_DIR}/u-boot.its
 		fi
-		${HOST_DIR}/bin/mkimage -E -p ${FIT_EXTERNAL_POSITION} -f ${BINARIES_DIR}/u-boot.its ${BINARIES_DIR}/u-boot.itb
+		${HOST_DIR}/bin/mkimage -E -p 0x3000 -f ${BINARIES_DIR}/u-boot.its ${BINARIES_DIR}/u-boot.itb
 		rm -f ${BINARIES_DIR}/u-boot.its
 
 		${HOST_DIR}/bin/mkimage_imx8 -fit -signed_hdmi ${BINARIES_DIR}/signed_hdmi_imx8m.bin -loader ${BINARIES_DIR}/u-boot-spl-ddr.bin 0x7E1000 -second_loader ${BINARIES_DIR}/u-boot.itb 0x40200000 0x60000 -out ${BINARIES_DIR}/imx8-boot-sd.bin
@@ -30,7 +28,7 @@ main ()
 		else
 			BL31=${BINARIES_DIR}/bl31.bin BL33=${BINARIES_DIR}/u-boot-nodtb.bin ATF_LOAD_ADDR=0x00920000 ${HOST_DIR}/bin/mkimage_fit_atf.sh ${UBOOT_DTB} > ${BINARIES_DIR}/u-boot.its
 		fi
-		${HOST_DIR}/bin/mkimage -E -p ${FIT_EXTERNAL_POSITION} -f ${BINARIES_DIR}/u-boot.its ${BINARIES_DIR}/u-boot.itb
+		${HOST_DIR}/bin/mkimage -E -p 0x3000 -f ${BINARIES_DIR}/u-boot.its ${BINARIES_DIR}/u-boot.itb
 		rm -f ${BINARIES_DIR}/u-boot.its
 
 		${HOST_DIR}/bin/mkimage_imx8 -fit -loader ${BINARIES_DIR}/u-boot-spl-ddr.bin 0x7E1000 -second_loader ${BINARIES_DIR}/u-boot.itb 0x40200000 0x60000 -out ${BINARIES_DIR}/imx8-boot-sd.bin
@@ -42,7 +40,7 @@ main ()
 		else
 			BL31=${BINARIES_DIR}/bl31.bin BL33=${BINARIES_DIR}/u-boot-nodtb.bin ATF_LOAD_ADDR=0x00960000 ${HOST_DIR}/bin/mkimage_fit_atf.sh ${UBOOT_DTB} > ${BINARIES_DIR}/u-boot.its
 		fi
-		${HOST_DIR}/bin/mkimage -E -p ${FIT_EXTERNAL_POSITION} -f ${BINARIES_DIR}/u-boot.its ${BINARIES_DIR}/u-boot.itb
+		${HOST_DIR}/bin/mkimage -E -p 0x3000 -f ${BINARIES_DIR}/u-boot.its ${BINARIES_DIR}/u-boot.itb
 		rm -f ${BINARIES_DIR}/u-boot.its
 
 		${HOST_DIR}/bin/mkimage_imx8 -v v2 -fit -loader ${BINARIES_DIR}/u-boot-spl-ddr.bin 0x912000 -second_loader ${BINARIES_DIR}/u-boot.itb 0x40200000 0x60000 -out ${BINARIES_DIR}/imx8-boot-sd.bin
@@ -54,7 +52,7 @@ main ()
 		else
 			BL31=${BINARIES_DIR}/bl31.bin BL33=${BINARIES_DIR}/u-boot-nodtb.bin ATF_LOAD_ADDR=0x00970000 ${HOST_DIR}/bin/mkimage_fit_atf.sh ${UBOOT_DTB} > ${BINARIES_DIR}/u-boot.its
 		fi
-		${HOST_DIR}/bin/mkimage -E -p ${FIT_EXTERNAL_POSITION} -f ${BINARIES_DIR}/u-boot.its ${BINARIES_DIR}/u-boot.itb
+		${HOST_DIR}/bin/mkimage -E -p 0x3000 -f ${BINARIES_DIR}/u-boot.its ${BINARIES_DIR}/u-boot.itb
 		rm -f ${BINARIES_DIR}/u-boot.its
 
 		${HOST_DIR}/bin/mkimage_imx8 -v v2 -fit -loader ${BINARIES_DIR}/u-boot-spl-ddr.bin 0x920000 -second_loader ${BINARIES_DIR}/u-boot.itb 0x40200000 0x60000 -out ${BINARIES_DIR}/imx8-boot-sd.bin
@@ -75,5 +73,4 @@ main ()
 	exit $?
 }
 
-set -e
 main $@

board/freescale/common/imx/imx9-bootloader-prepare.sh

@@ -1,43 +0,0 @@
-#!/usr/bin/env bash
-
-main ()
-{
-	SPL_LOAD_ADDR=0x2049A000
-	ATF_LOAD_ADDR=0x204E0000
-	if grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX91=y$" "${BR2_CONFIG}"; then
-		SPL_LOAD_ADDR=0x204A0000
-		ATF_LOAD_ADDR=0x204C0000
-	fi
-
-	dd if="${BINARIES_DIR}/u-boot-spl.bin" of="${BINARIES_DIR}/u-boot-spl-padded.bin" bs=4 conv=sync
-	cat "${BINARIES_DIR}/u-boot-spl-padded.bin" "${BINARIES_DIR}/ddr_fw.bin" > "${BINARIES_DIR}/u-boot-spl-ddr.bin"
-
-	"${HOST_DIR}/bin/mkimage_imx8" -commit > "${BINARIES_DIR}/mkimg.commit"
-	cat "${BINARIES_DIR}/u-boot.bin" "${BINARIES_DIR}/mkimg.commit" > "${BINARIES_DIR}/u-boot-hash.bin"
-	rm -f "${BINARIES_DIR}/mkimg.commit"
-
-	if grep -Eq "^BR2_TARGET_OPTEE_OS=y$" "${BR2_CONFIG}"; then
-		"${HOST_DIR}/bin/mkimage_imx8" -soc IMX9 -c \
-			-ap "${BINARIES_DIR}/bl31.bin" a35 ${ATF_LOAD_ADDR} \
-			-ap "${BINARIES_DIR}/u-boot-hash.bin" a35 0x80200000 \
-			-ap "${BINARIES_DIR}/tee.bin" a35 0x96000000 \
-			-out "${BINARIES_DIR}/u-boot-atf-container.img"
-	else
-		"${HOST_DIR}/bin/mkimage_imx8" -soc IMX9 -c \
-			-ap "${BINARIES_DIR}/bl31.bin" a35 ${ATF_LOAD_ADDR} \
-			-ap "${BINARIES_DIR}/u-boot-hash.bin" a35 0x80200000 \
-			-out "${BINARIES_DIR}/u-boot-atf-container.img"
-	fi
-
-	"${HOST_DIR}/bin/mkimage_imx8" -soc IMX9 -append "${BINARIES_DIR}/ahab-container.img" -c \
-		-ap "${BINARIES_DIR}/u-boot-spl-ddr.bin" a35 ${SPL_LOAD_ADDR} \
-		-out "${BINARIES_DIR}/imx9-boot-sd.bin"
-
-	flashbin_size="$(wc -c "${BINARIES_DIR}/imx9-boot-sd.bin" | awk '{print $1}')"
-	pad_cnt=$(($((flashbin_size + 0x400 - 1)) / 0x400))
-	dd if="${BINARIES_DIR}/u-boot-atf-container.img" of="${BINARIES_DIR}/imx9-boot-sd.bin" bs=1K seek=${pad_cnt}
-
-	exit $?
-}
-
-main "$@"

board/freescale/common/imx/post-image.sh

@@ -7,12 +7,10 @@
 #
 dtb_list()
 {
-	local DTB_LIST
-
-	DTB_LIST="$(sed -n 's/^BR2_LINUX_KERNEL_INTREE_DTS_NAME="\([\/a-z0-9 \-]*\)"$/\1/p' "${BR2_CONFIG}")"
+	local DTB_LIST="$(sed -n 's/^BR2_LINUX_KERNEL_INTREE_DTS_NAME="\([\/a-z0-9 \-]*\)"$/\1/p' ${BR2_CONFIG})"
 
 	for dt in $DTB_LIST; do
-		echo -n "\"$(basename "${dt}").dtb\", "
+		echo -n "\"`basename $dt`.dtb\", "
 	done
 }
 
@@ -23,11 +21,11 @@ dtb_list()
 #
 linux_image()
 {
-	if grep -Eq "^BR2_LINUX_KERNEL_UIMAGE=y$" "${BR2_CONFIG}"; then
+	if grep -Eq "^BR2_LINUX_KERNEL_UIMAGE=y$" ${BR2_CONFIG}; then
 		echo "\"uImage\""
-	elif grep -Eq "^BR2_LINUX_KERNEL_IMAGE=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_LINUX_KERNEL_IMAGE=y$" ${BR2_CONFIG}; then
 		echo "\"Image\""
-	elif grep -Eq "^BR2_LINUX_KERNEL_IMAGEGZ=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_LINUX_KERNEL_IMAGEGZ=y$" ${BR2_CONFIG}; then
 		echo "\"Image.gz\""
 	else
 		echo "\"zImage\""
@@ -36,31 +34,27 @@ linux_image()
 
 genimage_type()
 {
-	if grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8=y$" "${BR2_CONFIG}"; then
+	if grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8=y$" ${BR2_CONFIG}; then
 		echo "genimage.cfg.template_imx8"
-	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8M=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8M=y$" ${BR2_CONFIG}; then
 		echo "genimage.cfg.template_imx8"
-	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8MM=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8MM=y$" ${BR2_CONFIG}; then
 		echo "genimage.cfg.template_imx8"
-	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8MN=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8MN=y$" ${BR2_CONFIG}; then
 		echo "genimage.cfg.template_imx8"
-	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8MP=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8MP=y$" ${BR2_CONFIG}; then
 		echo "genimage.cfg.template_imx8"
-	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8X=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8X=y$" ${BR2_CONFIG}; then
 		echo "genimage.cfg.template_imx8"
-	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8DXL=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8DXL=y$" ${BR2_CONFIG}; then
 		echo "genimage.cfg.template_imx8"
-	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX91=y$" "${BR2_CONFIG}"; then
-		echo "genimage.cfg.template_imx9"
-	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX93=y$" "${BR2_CONFIG}"; then
-		echo "genimage.cfg.template_imx9"
-	elif grep -Eq "^BR2_LINUX_KERNEL_INSTALL_TARGET=y$" "${BR2_CONFIG}"; then
-		if grep -Eq "^BR2_TARGET_UBOOT_SPL=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_LINUX_KERNEL_INSTALL_TARGET=y$" ${BR2_CONFIG}; then
+		if grep -Eq "^BR2_TARGET_UBOOT_SPL=y$" ${BR2_CONFIG}; then
 		    echo "genimage.cfg.template_no_boot_part_spl"
 		else
 		    echo "genimage.cfg.template_no_boot_part"
 		fi
-	elif grep -Eq "^BR2_TARGET_UBOOT_SPL=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_TARGET_UBOOT_SPL=y$" ${BR2_CONFIG}; then
 		echo "genimage.cfg.template_spl"
 	else
 		echo "genimage.cfg.template"
@@ -69,9 +63,9 @@ genimage_type()
 
 imx_offset()
 {
-	if grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8M=y$" "${BR2_CONFIG}"; then
+	if grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8M=y$" ${BR2_CONFIG}; then
 		echo "33K"
-	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8MM=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_PACKAGE_FREESCALE_IMX_PLATFORM_IMX8MM=y$" ${BR2_CONFIG}; then
 		echo "33K"
 	else
 		echo "32K"
@@ -80,30 +74,29 @@ imx_offset()
 
 uboot_image()
 {
-	if grep -Eq "^BR2_TARGET_UBOOT_FORMAT_DTB_IMX=y$" "${BR2_CONFIG}"; then
+	if grep -Eq "^BR2_TARGET_UBOOT_FORMAT_DTB_IMX=y$" ${BR2_CONFIG}; then
 		echo "u-boot-dtb.imx"
-	elif grep -Eq "^BR2_TARGET_UBOOT_FORMAT_IMX=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_TARGET_UBOOT_FORMAT_IMX=y$" ${BR2_CONFIG}; then
 		echo "u-boot.imx"
-	elif grep -Eq "^BR2_TARGET_UBOOT_FORMAT_DTB_IMG=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_TARGET_UBOOT_FORMAT_DTB_IMG=y$" ${BR2_CONFIG}; then
 	    echo "u-boot-dtb.img"
-	elif grep -Eq "^BR2_TARGET_UBOOT_FORMAT_IMG=y$" "${BR2_CONFIG}"; then
+	elif grep -Eq "^BR2_TARGET_UBOOT_FORMAT_IMG=y$" ${BR2_CONFIG}; then
 	    echo "u-boot.img"
 	fi
 }
 
 main()
 {
-	local FILES IMXOFFSET UBOOTBIN GENIMAGE_CFG GENIMAGE_TMP
-	FILES="$(dtb_list) $(linux_image)"
-	IMXOFFSET="$(imx_offset)"
-	UBOOTBIN="$(uboot_image)"
-	GENIMAGE_CFG="$(mktemp --suffix genimage.cfg)"
-	GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
+	local FILES="$(dtb_list) $(linux_image)"
+	local IMXOFFSET="$(imx_offset)"
+	local UBOOTBIN="$(uboot_image)"
+	local GENIMAGE_CFG="$(mktemp --suffix genimage.cfg)"
+	local GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
 
 	sed -e "s/%FILES%/${FILES}/" \
 		-e "s/%IMXOFFSET%/${IMXOFFSET}/" \
 		-e "s/%UBOOTBIN%/${UBOOTBIN}/" \
-		"board/freescale/common/imx/$(genimage_type)" > "${GENIMAGE_CFG}"
+		board/freescale/common/imx/$(genimage_type) > ${GENIMAGE_CFG}
 
 	rm -rf "${GENIMAGE_TMP}"
 
@@ -114,9 +107,9 @@ main()
 		--outputpath "${BINARIES_DIR}" \
 		--config "${GENIMAGE_CFG}"
 
-	rm -f "${GENIMAGE_CFG}"
+	rm -f ${GENIMAGE_CFG}
 
 	exit $?
 }
 
-main "$@"
+main $@

board/freescale/imx6ullevk/linux_sdma.fragment

@@ -1 +0,0 @@
-CONFIG_IMX_SDMA=m

board/freescale/imx93evk/patches/arm-trusted-firmware/arm-trusted-firmware.hash

@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  cfb927722272897f850681c78d5f129b0883a8efaba9c52d30e029086524f7ff  imx-atf-lf-6.1.55-2.2.0.tar.gz

board/freescale/imx93evk/patches/linux-headers/linux-headers.hash

@@ -1 +0,0 @@
-../linux/linux.hash

board/freescale/imx93evk/patches/linux/linux.hash

@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  eb94414f952444289c0af8ad82afa0dc2d07e08f9000ccd2cc39f11da5b494ea  linux-imx-lf-6.1.55-2.2.0.tar.gz

board/freescale/imx93evk/patches/uboot/uboot.hash

@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  64441ee5bf3d5011e7853c028d06211b6f0439d21e147a8f36972c95a07ae9ac  uboot-imx-lf-6.1.55-2.2.0.tar.gz

board/freescale/imx93evk/readme.txt

@@ -1,77 +0,0 @@
-*********************
-NXP i.MX93 EVK board
-*********************
-
-This file documents the Buildroot support for the i.MX 93 EVK board.
-
-Build
-=====
-
-First, configure Buildroot for the i.MX 93 EVK board:
-
-  make freescale_imx93evk_defconfig
-
-Build all components:
-
-  make
-
-You will find in output/images/ the following files:
-  - ahab-container.img
-  - bl31.bin
-  - boot.vfat
-  - ddr_fw.bin
-  - Image
-  - imx93-11x11-evk.dtb
-  - imx9-boot-sd.bin
-  - lpddr4_pmu_train_fw.bin
-  - rootfs.ext2
-  - rootfs.ext4
-  - rootfs.tar
-  - sdcard.img
-  - u-boot-atf-container.img
-  - u-boot.bin
-  - u-boot-hash.bin
-  - u-boot-spl.bin
-  - u-boot-spl-ddr.bin
-  - u-boot-spl-padded.bin
-
-Create a bootable SD card
-=========================
-
-To determine the device associated to the SD card have a look in the
-/proc/partitions file:
-
-  cat /proc/partitions
-
-Buildroot prepares a bootable "sdcard.img" image in the output/images/
-directory, ready to be dumped on a SD card. Launch the following
-command as root:
-
-  dd if=output/images/sdcard.img of=/dev/<your-sd-device>
-
-*** WARNING! This will destroy all the card content. Use with care! ***
-
-For details about the medium image layout, see the definition in
-board/freescale/common/imx/genimage.cfg.template_imx9.
-
-Boot the i.MX 93 EVK board
-===============================
-
-To boot your newly created system (refer to the i.MX 93 EVK Documentation
-[1] for guidance):
-- insert the SD card in the SD slot of the board;
-- Configure the switches as follows:
-SW1301: 0100 SW1301[1-4]
-- put a micro USB cable into the Debug USB Port and connect using a terminal
-  emulator at 115200 bps, 8n1;
-- power on the board.
-
-Note: the debug USB connector presents 4 UARTs (for example /dev/ttyUSB[0-3]),
-the Cortex-A55 UART should be the 3rd one (in the previous example, /dev/ttyUSB2).
-Refer to the documentation [1] for more details.
-
-Enjoy!
-
-References
-==========
-[1] https://www.nxp.com/document/guide/getting-started-with-the-i-mx93-evk:GS-IMX93EVK

board/freescale/imxrt1050evk/genimage.cfg

@@ -1,7 +1,7 @@
 image boot.vfat {
 	vfat {
 		files = {
-			"zImage",
+			"uImage",
 			"imxrt1050-evk.dtb",
 		}
 	}

board/freescale/imxrt1050evk/uboot.fragment

@@ -1,2 +1,2 @@
 CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="setenv bootargs console=ttyLP0 root=/dev/mmcblk0p2 rw earlycon rootwait;load mmc 0:1 0x80800000 imxrt1050-evk.dtb;load mmc 0:1 0x80000000 zImage;bootz 0x80000000 - 0x80800000"
+CONFIG_BOOTCOMMAND="setenv bootargs console=ttyLP0 root=/dev/mmcblk0p2 rw earlycon rootwait;load mmc 0:1 0x80800000 imxrt1050-evk.dtb;load mmc 0:1 0x80000000 uImage;bootm 0x80000000 - 0x80800000"

board/in-circuit/icnova-a20-adb4006/sun7i-a20-icnova-a20-adb4006.dts

@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// Copyright (C) 2023 In-Circuit GmbH
+
+/dts-v1/;
+
+#include "sun7i-a20-icnova-a20.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "In-Circuit ICnova A20 ADB4006";
+	compatible = "incircuit,icnova-a20-adb4006", "incircuit,icnova-a20",
+		     "allwinner,sun7i-a20";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	hdmi-connector {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_in: endpoint {
+				remote-endpoint = <&hdmi_out_con>;
+			};
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led-0 {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_YELLOW>;
+			gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* PH21 */
+			default-state = "on";
+		};
+
+		led-1 {
+			function = LED_FUNCTION_HEARTBEAT;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* PH20 */
+			linux,default-trigger = "heartbeat";
+		};
+	};
+};
+
+&ahci {
+	target-supply = <&reg_ahci_5v>;
+	status = "okay";
+};
+
+&codec {
+	status = "okay";
+};
+
+&de {
+	status = "okay";
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&ehci1 {
+	status = "okay";
+};
+
+&hdmi {
+	status = "okay";
+};
+
+&hdmi_out {
+	hdmi_out_con: endpoint {
+		remote-endpoint = <&hdmi_con_in>;
+	};
+};
+
+&mmc0 {
+	vmmc-supply = <&reg_vcc3v3>;
+	bus-width = <4>;
+	cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&otg_sram {
+	status = "okay";
+};
+
+&reg_ahci_5v {
+	status = "okay";
+};
+
+&ac_power_supply {
+	status = "okay";
+};
+
+&reg_usb1_vbus {
+	status = "okay";
+};
+
+&reg_usb2_vbus {
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pb_pins>;
+	status = "okay";
+};
+
+&usb_otg {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usbphy {
+	usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+	usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
+	usb1_vbus-supply = <&reg_usb1_vbus>;
+	usb2_vbus-supply = <&reg_usb2_vbus>;
+	status = "okay";
+};

board/in-circuit/icnova-a20-adb4006/sun7i-a20-icnova-a20-adb4006_uboot_defconfig

@@ -0,0 +1,20 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-a20-adb4006"
+CONFIG_SPL=y
+CONFIG_MACH_SUN7I=y
+CONFIG_DRAM_CLK=384
+CONFIG_AHCI=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_MII=y
+CONFIG_SUN7I_GMAC=y
+CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y

board/in-circuit/icnova-a20-adb4006/sun7i-a20-icnova-a20.dtsi

@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// Copyright (C) 2023 In-Circuit GmbH
+
+#include "sun7i-a20.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&cpu0 {
+	cpu-supply = <&reg_dcdc2>;
+};
+
+&gmac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac_mii_pins>;
+	phy-handle = <&phy1>;
+	phy-mode = "mii";
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	axp209: pmic@34 {
+		reg = <0x34>;
+		interrupt-parent = <&nmi_intc>;
+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+	};
+};
+
+&gmac_mdio {
+	phy1: ethernet-phy@1 {
+		reg = <1>;
+	};
+};
+
+#include "axp209.dtsi"
+
+&reg_dcdc2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1400000>;
+	regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+	regulator-always-on;
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1400000>;
+	regulator-name = "vdd-int-dll";
+};
+
+&reg_ldo1 {
+	regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+	regulator-always-on;
+	regulator-min-microvolt = <3000000>;
+	regulator-max-microvolt = <3000000>;
+	regulator-name = "avcc";
+};

board/mangopi/mq1rdw2/genimage.cfg

@@ -1,16 +0,0 @@
-image sdcard.img {
-	hdimage {
-	}
-
-	partition u-boot {
-		in-partition-table = "no"
-		image = "u-boot-sunxi-with-spl.bin"
-		offset = 8K
-		size = 1016K # 1MB - 8KB
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-	}
-}

board/mangopi/mq1rdw2/readme.txt

@@ -1,46 +0,0 @@
-MangoPi MQ1RDW2
-===============
-
-MangoPi MQ1RDW2 is a tiny ARM Cortex-A7 based single board computer.
-It's built around Allwinner T113-S3 dual core 1GHz CPU with integrated
-128MB DDR3-1600 RAM.
-Board features:
-- USB-OTG Type-C socket
-- USB-HOST Type-C socket
-- 2x 18 pin GPIO headers
-- TF card slot
-- RTL8723DS WiFi module with ext. antenna connector
-- 40 pin RGB FPC connector
-- 6 pin CTP FPC connector
-- 24 pin DVP FPC connector
-- onboard mic
-- onboard audio amplifier
-- FEL,reset button
-
-How to build
-============
-
-$ make mangopi_mq1rdw2_defconfig
-$ make
-
-Wifi
-==========
-
-Edit board/mangopi/mq1rdw2/overlay/etc/wpa_supplicant.conf or
-/etc/wpa_supplicant.conf once connected to the board:
-
-* Replace YOURSSID with your AP ssid
-* Replace YOURPASSWD with your AP password
-
-How to write the SD card
-========================
-
-Once the build process is finished you will have an image called "sdcard.img"
-in the output/images/ directory.
-
-Copy the bootable "sdcard.img" onto an SD card with "dd":
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX
-
-Connect a TTL UART to the UART3 on P8 header (unpopulated), insert the microSD card and
-plug in a USB-C cable to the OTG or HOST connector to boot the system.

board/mangopi/mq1rdw2/rootfs_overlay/boot/extlinux/extlinux.conf

@@ -1,4 +0,0 @@
-label MANGOPI-MQ1RDW2
-    kernel /boot/zImage
-    devicetree /boot/sun8i-t113s-mangopi-mq-r-t113.dtb
-    append console=ttyS3,115200 root=/dev/mmcblk0p1 rootwait panic=10 ${extra}

board/mangopi/mq1rdw2/rootfs_overlay/etc/network/interfaces

@@ -1,6 +0,0 @@
-auto lo
-iface lo inet loopback
-
-auto wlan0
-iface wlan0 inet dhcp
-wpa-conf /etc/wpa_supplicant.conf

board/mangopi/mq1rdw2/rootfs_overlay/etc/wpa_supplicant.conf

@@ -1,8 +0,0 @@
-ap_scan=1
-
-network={
-        ssid="YOURSSID"
-        scan_ssid=1
-        key_mgmt=WPA-PSK
-        psk="YOURPASSWD"
-}

board/microchip/mpfs_icicle/genimage.cfg

@@ -15,7 +15,7 @@ image boot.vfat {
 
 image sdcard.img {
 	hdimage {
-		partition-table-type = "gpt"
+		gpt = true
 	}
 
 	partition uboot {

board/orangepi/orangepi-zero/patches/linux/0001-ARM-dts-orange-pi-zero-interrupt-triggering-xr819.patch

@@ -13,13 +13,13 @@ This commit specifies XR819 interrupt configuration for the driver.
 
 Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
 ---
- arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts | 3 +++
+ arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 3 +++
  1 file changed, 3 insertions(+)
 
-diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
 index b7ca916d871d..4e1a9050c6b4 100644
---- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
-+++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
 @@ -125,6 +125,9 @@
  	 */
  	xr819: sdio_wifi@1 {

board/orangepi/orangepi-zero/patches/linux/0002-ARM-dts-orange-pi-zero-enable-spi-nor.patch

@@ -10,13 +10,13 @@ For more information see:
 
 Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
 ---
- arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts | 16 ++++++++++++++++
+ arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 16 ++++++++++++++++
  1 file changed, 16 insertions(+)
 
-diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
 index 4e1a9050c6b4..cdf19821b1f3 100644
---- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
-+++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
 @@ -161,3 +161,19 @@
  	/* USB VBUS is always on */
  	status = "okay";

board/orangepi/orangepi-zero/patches/linux/0003-ARM-dts-orange-pi-zero-enable-spidev.patch

@@ -8,13 +8,13 @@ This patch enables spidev driver for SPI1.
 
 Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
 ---
- arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts | 11 +++++++++++
+ arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 11 +++++++++++
  1 file changed, 11 insertions(+)
 
-diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
 index cdf19821b1f3..7242aaecb14f 100644
---- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
-+++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
 @@ -59,6 +59,7 @@
  		serial0 = &uart0;
  		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */

board/orangepi/orangepi-zero/patches/linux/0004-ARM-dts-orange-pi-zero-enable-uart.patch

@@ -7,13 +7,13 @@ Enable uart1 and uart2 on orange-pi-zero board.
 
 Signed-off-by: Sergey Kuzminov <kuzminov.sergey81@gmail.com>
 ---
- arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts | 4 ++--
+ arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
-diff --git a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
 index f19ed981da9d..03acf166ab70 100644
---- a/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
-+++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
+--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
 @@ -184,13 +184,13 @@ &uart0 {
  &uart1 {
  	pinctrl-names = "default";

board/orangepi/orangepi-zero3/linux.config

@@ -0,0 +1 @@
+CONFIG_MFD_AC200=y

board/pine64/rockpro64/linux.fragment

@@ -1,3 +0,0 @@
-CONFIG_STMMAC_ETH=y
-CONFIG_STMMAC_PLATFORM=y
-CONFIG_DWMAC_ROCKCHIP=y

board/qemu/aarch64-ebbr/readme.txt

@@ -26,7 +26,7 @@ Running under Qemu
 Run the emulation with:
 
   qemu-system-aarch64 \
-      -M virt,secure=on,acpi=off \
+      -M virt,secure=on \
       -bios output/images/flash.bin \
       -cpu cortex-a53 \
       -device virtio-blk-device,drive=hd0 \
@@ -35,6 +35,7 @@ Run the emulation with:
       -drive file=output/images/disk.img,if=none,format=raw,id=hd0 \
       -m 2048 \
       -netdev user,id=eth0 \
+      -no-acpi \
       -nographic \
       -object rng-random,filename=/dev/urandom,id=rng0 \
       -rtc base=utc,clock=host \
@@ -62,7 +63,7 @@ image first with:
 Then run the OS installer iso image on emulation with:
 
   qemu-system-aarch64 \
-      -M virt,secure=on,acpi=off \
+      -M virt,secure=on \
       -bios output/images/flash.bin \
       -cpu cortex-a53 \
       -device virtio-blk-device,drive=hd1 \
@@ -73,6 +74,7 @@ Then run the OS installer iso image on emulation with:
       -drive file=disk.qcow2,if=none,id=hd1 \
       -m 2048 \
       -netdev user,id=eth0 \
+      -no-acpi \
       -nographic \
       -object rng-random,filename=/dev/urandom,id=rng0 \
       -rtc base=utc,clock=host \

board/qemu/arm-ebbr/readme.txt

@@ -26,7 +26,7 @@ Running under Qemu
 Run the emulation with:
 
   qemu-system-arm \
-      -M virt,secure=on,acpi=off \
+      -M virt,secure=on \
       -bios output/images/flash.bin \
       -cpu cortex-a15 \
       -device virtio-blk-device,drive=hd0 \
@@ -35,6 +35,7 @@ Run the emulation with:
       -drive file=output/images/disk.img,if=none,format=raw,id=hd0 \
       -m 1024 \
       -netdev user,id=eth0 \
+      -no-acpi \
       -nographic \
       -object rng-random,filename=/dev/urandom,id=rng0 \
       -rtc base=utc,clock=host \

board/qemu/microblazebe-mmu/0001-net-xilinx-xemaclite-add-2.00.b-revision.patch

@@ -0,0 +1,34 @@
+From e96b73478232aa42b773cd19371808af69fd4b95 Mon Sep 17 00:00:00 2001
+From: Romain Naour <romain.naour@gmail.com>
+Date: Sat, 25 Apr 2020 09:49:11 +0200
+Subject: [PATCH] net: xilinx: xemaclite: add 2.00.b revision
+
+Patch added for the kernel 3.14
+- fix networking in Qemu using a small patch
+- disable DTS, because linux.bin does not include any DTB the
+  default Qemu included DTB is used and this is okay and works fine
+
+https://git.buildroot.net/buildroot/commit/board/qemu/microblazebe-mmu/xilinx-xemaclite.patch?id=fa2798548368d51998fad18d7f6d1ae0ed065b33
+
+[Romain: convert to git format]
+Signed-off-by: Romain Naour <romain.naour@gmail.com>
+Cc: Waldemar Brodkorb <wbx@openadk.org>
+---
+ drivers/net/ethernet/xilinx/xilinx_emaclite.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+index 0de52e70abcc..d8c13140ca77 100644
+--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
++++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+@@ -1278,6 +1278,7 @@ static const struct of_device_id xemaclite_of_match[] = {
+ 	{ .compatible = "xlnx,opb-ethernetlite-1.01.b", },
+ 	{ .compatible = "xlnx,xps-ethernetlite-1.00.a", },
+ 	{ .compatible = "xlnx,xps-ethernetlite-2.00.a", },
++	{ .compatible = "xlnx,xps-ethernetlite-2.00.b", },
+ 	{ .compatible = "xlnx,xps-ethernetlite-2.01.a", },
+ 	{ .compatible = "xlnx,xps-ethernetlite-3.00.a", },
+ 	{ /* end of list */ },
+-- 
+2.25.3
+

board/qemu/microblazeel-mmu/0001-net-xilinx-xemaclite-add-2.00.b-revision.patch

@@ -0,0 +1,34 @@
+From e96b73478232aa42b773cd19371808af69fd4b95 Mon Sep 17 00:00:00 2001
+From: Romain Naour <romain.naour@gmail.com>
+Date: Sat, 25 Apr 2020 09:49:11 +0200
+Subject: [PATCH] net: xilinx: xemaclite: add 2.00.b revision
+
+Patch added for the kernel 3.14
+- fix networking in Qemu using a small patch
+- disable DTS, because linux.bin does not include any DTB the
+  default Qemu included DTB is used and this is okay and works fine
+
+https://git.buildroot.net/buildroot/commit/board/qemu/microblazebe-mmu/xilinx-xemaclite.patch?id=fa2798548368d51998fad18d7f6d1ae0ed065b33
+
+[Romain: convert to git format]
+Signed-off-by: Romain Naour <romain.naour@gmail.com>
+Cc: Waldemar Brodkorb <wbx@openadk.org>
+---
+ drivers/net/ethernet/xilinx/xilinx_emaclite.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+index 0de52e70abcc..d8c13140ca77 100644
+--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
++++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+@@ -1278,6 +1278,7 @@ static const struct of_device_id xemaclite_of_match[] = {
+ 	{ .compatible = "xlnx,opb-ethernetlite-1.01.b", },
+ 	{ .compatible = "xlnx,xps-ethernetlite-1.00.a", },
+ 	{ .compatible = "xlnx,xps-ethernetlite-2.00.a", },
++	{ .compatible = "xlnx,xps-ethernetlite-2.00.b", },
+ 	{ .compatible = "xlnx,xps-ethernetlite-2.01.a", },
+ 	{ .compatible = "xlnx,xps-ethernetlite-3.00.a", },
+ 	{ /* end of list */ },
+-- 
+2.25.3
+

board/qemu/riscv64-virt-efi/assemble-flash-images

@@ -1,11 +0,0 @@
-#! /bin/sh
-
-set -e
-
-BOARD_DIR="$(dirname "$0")"
-
-cp -f "${BOARD_DIR}"/grub.cfg "${BINARIES_DIR}"/efi-part/EFI/BOOT/grub.cfg
-
-# The QEMU riscv64 virt machine expects flash devices to be 32M.
-truncate -s 32M "${BINARIES_DIR}"/RISCV_VIRT_CODE.fd
-truncate -s 32M "${BINARIES_DIR}"/RISCV_VIRT_VARS.fd

board/qemu/riscv64-virt-efi/genimage.cfg

@@ -1,34 +0,0 @@
-image efi-part.vfat {
-	vfat {
-		file EFI {
-			image = "efi-part/EFI"
-		}
-
-		file Image {
-			image = "Image"
-		}
-	}
-
-	size = 64M
-}
-
-image disk.img {
-	hdimage {
-		partition-table-type = "gpt"
-	}
-
-	partition boot {
-		image = "efi-part.vfat"
-		partition-type-uuid = U
-		offset = 32K
-		bootable = true
-	}
-
-	partition root {
-		# For partition-type-uuid value, see:
-		# https://uapi-group.org/specifications/specs/discoverable_partitions_specification/
-		# SD_GPT_ROOT_RISCV64
-		partition-type-uuid = 72ec70a6-cf74-40e6-bd49-4bda08e8f224
-		image = "rootfs.ext2"
-	}
-}

board/qemu/riscv64-virt-efi/grub.cfg

@@ -1,6 +0,0 @@
-set default="0"
-set timeout="5"
-
-menuentry "Buildroot" {
-	linux /Image root=PARTLABEL=root rootwait
-}

board/qemu/riscv64-virt-efi/readme.txt

@@ -1,36 +0,0 @@
-Intro
-=====
-
-This is a RISC-V 64bit UEFI Linux boot demo in QEmu virt machine.
-
-Build
-=====
-
-    make qemu_riscv64_virt_efi_defconfig
-    make
-
-Emulation
-=========
-
-Run the emulation with:
-
-    qemu-system-riscv64 \
-        -M virt,pflash0=pflash0,pflash1=pflash1,acpi=off \
-        -smp 4 \
-        -m 1024 \
-        -nographic \
-        -blockdev node-name=pflash0,driver=file,read-only=on,filename=output/images/RISCV_VIRT_CODE.fd \
-        -blockdev node-name=pflash1,driver=file,filename=output/images/RISCV_VIRT_VARS.fd \
-        \
-        -drive file=output/images/disk.img,format=raw,id=hd0 \
-        -device virtio-blk-device,drive=hd0 \
-        \
-        -netdev user,id=net0 \
-        -device virtio-net-device,netdev=net0 # qemu_riscv64_virt_efi_defconfig
-
-Note: for information, qemu version >= 8.0.0 is needed for this UEFI
-Linux demo. It introduced the two pflash memories (previous versions
-had only one). The host-qemu package in Buildroot (enabled in this
-defconfig) is sufficient to run this demo. In case another qemu is
-used (for example, from the host OS), make sure to check the version
-requirement.

board/qmtech/zynq/patches/linux/0001-DTS-for-QMTech-Zynq-starter-kit.patch

@@ -0,0 +1,418 @@
+From 22d955122ac0f7ac74ab74aadebf6b8edaf0bbbd Mon Sep 17 00:00:00 2001
+From: Julien Olivain <juju@cotds.org>
+Date: Sun, 15 Dec 2019 18:45:40 +0100
+Subject: [PATCH] DTS for QMTech Zynq starter kit
+
+Signed-off-by: Martin Chabot <martin.chabot@gmail.com>
+Signed-off-by: Julien Olivain <juju@cotds.org>
+---
+ arch/arm/boot/dts/zynq-qmtech.dts | 397 ++++++++++++++++++++++++++++++
+ 1 file changed, 397 insertions(+)
+ create mode 100644 arch/arm/boot/dts/zynq-qmtech.dts
+
+diff --git a/arch/arm/boot/dts/zynq-qmtech.dts b/arch/arm/boot/dts/zynq-qmtech.dts
+new file mode 100644
+index 000000000000..c6081dc0080e
+--- /dev/null
++++ b/arch/arm/boot/dts/zynq-qmtech.dts
+@@ -0,0 +1,397 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ *  Copyright (C) 2011 - 2015 Xilinx
++ *  Copyright (C) 2012 National Instruments Corp.
++ *  Copyright (C) 2019 Martin Chabot <martin.chabot@gmail.com>
++ */
++
++/* Derived from:
++ * https://github.com/Xilinx/linux-xlnx/blob/xilinx-v2019.2.01/arch/arm/boot/dts/zynq-zc702.dts
++ */
++
++/dts-v1/;
++#include "zynq-7000.dtsi"
++
++/ {
++	model = "QMTECH XC7Z010 Starter Kit";
++	compatible = "xlnx,zynq-qmtech", "xlnx,zynq-zc702", "xlnx,zynq-7000";
++
++	aliases {
++		ethernet0 = &gem0;
++		i2c0 = &i2c0;
++		serial0 = &uart1;
++		spi0 = &qspi;
++		mmc0 = &sdhci0;
++	};
++
++	memory@0 {
++		device_type = "memory";
++		reg = <0x0 0x20000000>;
++	};
++
++	chosen {
++		bootargs = "";
++		stdout-path = "serial0:115200n8";
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		ds23 {
++			label = "ds23";
++			gpios = <&gpio0 10 0>;
++			linux,default-trigger = "heartbeat";
++		};
++	};
++
++};
++
++&amba {
++	ocm: sram@fffc0000 {
++		compatible = "mmio-sram";
++		reg = <0xfffc0000 0x10000>;
++	};
++};
++
++&clkc {
++	ps-clk-frequency = <33333333>;
++};
++
++&gem0 {
++	status = "okay";
++	phy-mode = "rgmii-id";
++	phy-handle = <&ethernet_phy>;
++
++	ethernet_phy: ethernet-phy@0 {
++		reg = <0>;
++		device_type = "ethernet-phy";
++	};
++};
++
++&gpio0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_gpio0_default>;
++};
++
++&i2c0 {
++	status = "disabled";
++	clock-frequency = <400000>;
++	pinctrl-names = "default", "gpio";
++	pinctrl-0 = <&pinctrl_i2c0_default>;
++	pinctrl-1 = <&pinctrl_i2c0_gpio>;
++	scl-gpios = <&gpio0 50 0>;
++	sda-gpios = <&gpio0 51 0>;
++
++	i2c-mux@74 {
++		compatible = "nxp,pca9548";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x74>;
++
++		i2c@0 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <0>;
++			si570: clock-generator@5d {
++				#clock-cells = <0>;
++				compatible = "silabs,si570";
++				temperature-stability = <50>;
++				reg = <0x5d>;
++				factory-fout = <156250000>;
++				clock-frequency = <148500000>;
++			};
++		};
++
++		i2c@1 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <1>;
++			adv7511: hdmi-tx@39 {
++				compatible = "adi,adv7511";
++				reg = <0x39>;
++				adi,input-depth = <8>;
++				adi,input-colorspace = "yuv422";
++				adi,input-clock = "1x";
++				adi,input-style = <3>;
++				adi,input-justification = "right";
++			};
++		};
++
++		i2c@2 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <2>;
++			eeprom@54 {
++				compatible = "atmel,24c08";
++				reg = <0x54>;
++			};
++		};
++
++		i2c@3 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <3>;
++			gpio@21 {
++				compatible = "ti,tca6416";
++				reg = <0x21>;
++				gpio-controller;
++				#gpio-cells = <2>;
++			};
++		};
++
++		i2c@4 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <4>;
++			rtc@51 {
++				compatible = "nxp,pcf8563";
++				reg = <0x51>;
++			};
++		};
++
++		i2c@7 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			reg = <7>;
++			hwmon@52 {
++				compatible = "ti,ucd9248";
++				reg = <52>;
++			};
++			hwmon@53 {
++				compatible = "ti,ucd9248";
++				reg = <53>;
++			};
++			hwmon@54 {
++				compatible = "ti,ucd9248";
++				reg = <54>;
++			};
++		};
++	};
++};
++
++&pinctrl0 {
++	pinctrl_can0_default: can0-default {
++		mux {
++			function = "can0";
++			groups = "can0_9_grp";
++		};
++
++		conf {
++			groups = "can0_9_grp";
++			slew-rate = <0>;
++			io-standard = <1>;
++		};
++
++		conf-rx {
++			pins = "MIO46";
++			bias-high-impedance;
++		};
++
++		conf-tx {
++			pins = "MIO47";
++			bias-disable;
++		};
++	};
++
++	pinctrl_gem0_default: gem0-default {
++		mux {
++			function = "ethernet0";
++			groups = "ethernet0_0_grp";
++		};
++
++		conf {
++			groups = "ethernet0_0_grp";
++			slew-rate = <0>;
++			io-standard = <4>;
++		};
++
++		conf-rx {
++			pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
++			bias-high-impedance;
++			low-power-disable;
++		};
++
++		conf-tx {
++			pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
++			bias-disable;
++			low-power-enable;
++		};
++
++		mux-mdio {
++			function = "mdio0";
++			groups = "mdio0_0_grp";
++		};
++
++		conf-mdio {
++			groups = "mdio0_0_grp";
++			slew-rate = <0>;
++			io-standard = <1>;
++			bias-disable;
++		};
++	};
++
++	pinctrl_gpio0_default: gpio0-default {
++		mux {
++			function = "gpio0";
++			groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
++				 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
++				 "gpio0_13_grp", "gpio0_14_grp";
++		};
++
++		conf {
++			groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
++				 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
++				 "gpio0_13_grp", "gpio0_14_grp";
++			slew-rate = <0>;
++			io-standard = <1>;
++		};
++
++		conf-pull-up {
++			pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
++			bias-pull-up;
++		};
++
++		conf-pull-none {
++			pins = "MIO7", "MIO8";
++			bias-disable;
++		};
++	};
++
++	pinctrl_i2c0_default: i2c0-default {
++		mux {
++			groups = "i2c0_10_grp";
++			function = "i2c0";
++		};
++
++		conf {
++			groups = "i2c0_10_grp";
++			bias-pull-up;
++			slew-rate = <0>;
++			io-standard = <1>;
++		};
++	};
++
++	pinctrl_i2c0_gpio: i2c0-gpio {
++		mux {
++			groups = "gpio0_50_grp", "gpio0_51_grp";
++			function = "gpio0";
++		};
++
++		conf {
++			groups = "gpio0_50_grp", "gpio0_51_grp";
++			slew-rate = <0>;
++			io-standard = <1>;
++		};
++	};
++
++	pinctrl_sdhci0_default: sdhci0-default {
++		mux {
++			groups = "sdio0_2_grp";
++			function = "sdio0";
++		};
++
++		conf {
++			groups = "sdio0_2_grp";
++			slew-rate = <0>;
++			io-standard = <1>;
++			bias-disable;
++		};
++
++		mux-cd {
++			groups = "gpio0_0_grp";
++			function = "sdio0_cd";
++		};
++
++		conf-cd {
++			groups = "gpio0_0_grp";
++			bias-high-impedance;
++			bias-pull-up;
++			slew-rate = <0>;
++			io-standard = <1>;
++		};
++
++		mux-wp {
++			groups = "gpio0_15_grp";
++			function = "sdio0_wp";
++		};
++
++		conf-wp {
++			groups = "gpio0_15_grp";
++			bias-high-impedance;
++			bias-pull-up;
++			slew-rate = <0>;
++			io-standard = <1>;
++		};
++	};
++
++	pinctrl_uart1_default: uart1-default {
++		mux {
++			groups = "uart1_10_grp";
++			function = "uart1";
++		};
++
++		conf {
++			groups = "uart1_10_grp";
++			slew-rate = <0>;
++			io-standard = <1>;
++		};
++
++		conf-rx {
++			pins = "MIO25";
++			bias-high-impedance;
++		};
++
++		conf-tx {
++			pins = "MIO24";
++			bias-disable;
++		};
++	};
++};
++
++&qspi {
++	u-boot,dm-pre-reloc;
++	status = "disabled";
++	is-dual = <0>;
++	num-cs = <1>;
++	flash@0 {
++		compatible = "n25q128a11";
++		reg = <0x0>;
++		spi-tx-bus-width = <1>;
++		spi-rx-bus-width = <4>;
++		spi-max-frequency = <50000000>;
++		#address-cells = <1>;
++		#size-cells = <1>;
++		partition@qspi-fsbl-uboot {
++			label = "qspi-fsbl-uboot";
++			reg = <0x0 0x100000>;
++		};
++		partition@qspi-linux {
++			label = "qspi-linux";
++			reg = <0x100000 0x500000>;
++		};
++		partition@qspi-device-tree {
++			label = "qspi-device-tree";
++			reg = <0x600000 0x20000>;
++		};
++		partition@qspi-rootfs {
++			label = "qspi-rootfs";
++			reg = <0x620000 0x5E0000>;
++		};
++		partition@qspi-bitstream {
++			label = "qspi-bitstream";
++			reg = <0xC00000 0x400000>;
++		};
++	};
++};
++
++&sdhci0 {
++	u-boot,dm-pre-reloc;
++	status = "okay";
++};
++
++&uart1 {
++	u-boot,dm-pre-reloc;
++	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart1_default>;
++};
+-- 
+2.23.0
+

board/qmtech/zynq/readme.txt

@@ -0,0 +1,76 @@
+*******************************
+QMTECH Zynq XC7Z010 Starter Kit
+*******************************
+
+This file documents the Buildroot support for the QMTECH [1] Zynq
+XC7Z010 Starter Kit [2]. It is a low cost (~55$) Zynq based
+development board. The board user manual is available at
+[3]. Additional files are available on Github [4].
+
+
+Build
+=====
+
+First, configure Buildroot for the QMTECH Zynq board:
+
+  make zynq_qmtech_defconfig
+
+Build all components:
+
+  make
+
+You will find in output/images/ the following files:
+  - boot.bin
+  - boot.vfat
+  - devicetree.dtb
+  - rootfs.cpio
+  - rootfs.cpio.gz
+  - rootfs.cpio.uboot
+  - rootfs.tar
+  - sdcard.img
+  - u-boot.bin
+  - u-boot.img
+  - uImage
+  - zynq-qmtech.dtb
+
+
+Create a bootable micro SD card
+===============================
+
+To determine the device associated to the micro SD card have a look in
+the /proc/partitions file:
+
+  cat /proc/partitions
+
+Buildroot prepares a bootable "sdcard.img" image in the output/images/
+directory, ready to be dumped on a micro SD card. Launch the following
+command as root:
+
+  dd if=output/images/sdcard.img of=/dev/<your-sd-device>
+
+*** WARNING! This will destroy all the card content. Use with care! ***
+
+
+Boot the QMTECH Zynq board
+==========================
+
+To boot your newly created system:
+- put a mini USB cable into the J4 Debug USB Port and connect using a
+  terminal emulator at 115200 bps, 8n1,
+- put the prepared micro SD card in the J2 micro SD card slot,
+- plug the 5V power supply on the JP4 barrel jack.
+
+Enjoy!
+
+
+[1]. QMTECH:
+     http://www.chinaqmtech.com/
+
+[2]. QMTECH Zynq XC7Z010 Starter Kit Product Page:
+     http://www.chinaqmtech.com/xilinx_zynq_soc
+
+[3]. QMTECH Zynq XC7Z010 Starter Kit Hardware User Manual:
+     http://www.chinaqmtech.com/filedownload/32552
+
+[4]. QMTECH Github:
+     https://github.com/ChinaQMTECH/ZYNQ_STARTER_KIT

board/radxa/rock5b/linux.fragment

@@ -1,5 +1,4 @@
 CONFIG_R8169=y
-# CONFIG_ROCKCHIP_FIQ_DEBUGGER is not set
 # Disable Rockchip specific WiFi drivers, as the kernel
 # code cannot be build with GCC 12 due to several Werrors
 # CONFIG_WL_ROCKCHIP is not set

board/radxa/rock5b/readme.txt

@@ -20,7 +20,6 @@ output/images
 ├── rk3588-rock-5b.dtb
 ├── rk3588_bl31_v1.40.elf
 ├── rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.12.bin
-├── rock5b.dts
 ├── rock5b.its
 ├── rootfs.ext2
 ├── rootfs.ext4
@@ -65,8 +64,6 @@ https://forum.radxa.com/c/rock5
 Issues:
 =======
 
-WiFi
-----
 The custom Radxa kernel provides custom code to support WiFi. However,
 that code does not compile with GCC 12, which is the current default
 version in buildroot. Hence, the WiFi kernel drivers are disabled, until
@@ -83,20 +80,3 @@ BR2_GCC_VERSION_11_X=y
 board/radxa/rock5b/linux.fragment:
 
 # CONFIG_WL_ROCKCHIP is not set
-
-Rockchip FIQ Debugger
----------------------
-The custom kernel used for this board features an FIQ debugger, which
-can be activated by typing "fiq" on the serial interface. As this can be
-annoying if a user wants to type these charakters and it is not needed
-for most users, this board support disables the FIQ debugger by default.
-To re-enable the FIQ debugger follow the steps:
-
-1. In board/radxa/rock5b/rock5b.dts set the status property of the
-fiq_debugger node to "okay" and set the status property of the uart2
-node to "disabled"
-
-2. Re-enable the fiq debugger module  by removing the following line
-from board/radxa/rock5b/linux.fragment:
-
-# CONFIG_ROCKCHIP_FIQ_DEBUGGER is not set

board/radxa/rock5b/rock5b.dts

@@ -1,12 +0,0 @@
-/dts-v1/;
-
-#include "rockchip/rk3588-rock-5b.dts"
-
-&fiq_debugger {
-	status = "disabled";
-};
-
-&uart2 {
-	pinctrl-0 = <&uart2m0_xfer>;
-	status = "okay";
-};

board/radxa/rock5b/rock5b.its

@@ -20,7 +20,7 @@
 		};
 		fdt {
 			description = "Device Tree";
-			data = /incbin/("rock5b.dtb");
+			data = /incbin/("rk3588-rock-5b.dtb");
 			type = "flat_dt";
 			arch = "arm64";
 			compression = "none";

board/raspberrypi/post-build.sh

@@ -14,3 +14,6 @@ elif [ -d ${TARGET_DIR}/etc/systemd ]; then
     ln -sf /lib/systemd/system/getty@.service \
        "${TARGET_DIR}/etc/systemd/system/getty.target.wants/getty@tty1.service"
 fi
+
+# ensure overlays exists for genimage
+mkdir -p "${BINARIES_DIR}/rpi-firmware/overlays"

board/raspberrypi/readme.txt

@@ -28,10 +28,6 @@ For model Zero (model A+ in smaller form factor):
 
   $ make raspberrypi0_defconfig
 
-or for model Zero W (model Zero with wireless LAN and Bluetooth):
-
-  $ make raspberrypi0w_defconfig
-
 For model Zero 2 W (model B3 in smaller form factor):
 
   $ make raspberrypizero2w_defconfig

board/sheevaplug/patches/linux-headers/linux-headers.hash

@@ -1 +0,0 @@
-../linux/linux.hash

board/sheevaplug/patches/linux/linux.hash

@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  0820fdb7971c6974338081c11fbf2dc869870501e7bdcac4d0ed58ba1f57b61c  linux-4.14.336.tar.xz

board/sheevaplug/patches/uboot/uboot.hash

@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  9f10df88bc91b35642e461217f73256bbaeeca9ae2db8db56197ba5e89e1f6d4  u-boot-2018.07.tar.bz2

board/stmicroelectronics/common/stm32mp157/genimage.cfg.template

@@ -11,8 +11,8 @@ image sdcard.img {
 		image = "%ATFBIN%"
 	}
 
-	partition fip {
-		image = "fip.bin"
+	partition ssbl {
+		image = "u-boot.stm32"
 		size = 2M
 	}
 

board/stmicroelectronics/common/stm32mp157/post-image.sh

@@ -8,7 +8,7 @@
 #
 atf_image()
 {
-	ATF_VARIABLES="$(sed -n 's/^BR2_TARGET_ARM_TRUSTED_FIRMWARE_ADDITIONAL_VARIABLES="\([^\"]*\)"$/\1/p' ${BR2_CONFIG})"
+	ATF_VARIABLES="$(sed -n 's/^BR2_TARGET_ARM_TRUSTED_FIRMWARE_ADDITIONAL_VARIABLES="\([\/a-zA-Z0-9_=. \-]*\)"$/\1/p' ${BR2_CONFIG})"
 	# make sure DTB_FILE_NAME is set
 	printf '%s\n' "${ATF_VARIABLES}" | grep -Eq 'DTB_FILE_NAME=[0-9A-Za-z_\-]*'
 	# extract the value

board/stmicroelectronics/stm32mp157a-dk1/patches/arm-trusted-firmware/arm-trusted-firmware.hash

@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  068325043b7c8ecc47ebb8b4f241f01e86d3f69dc49a63f340aa94bd41a9e6df  arm-trusted-firmware/arm-trusted-firmware-lts-v2.8.16.tar.gz

board/stmicroelectronics/stm32mp157a-dk1/patches/linux-headers/linux-headers.hash

@@ -1 +0,0 @@
-../linux/linux.hash

board/stmicroelectronics/stm32mp157a-dk1/patches/linux/linux.hash

@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  3f6baa97f37518439f51df2e4f3d65a822ca5ff016aa8e60d2cc53b95a6c89d9  linux-5.13.tar.xz

board/stmicroelectronics/stm32mp157a-dk1/patches/uboot/uboot.hash

@@ -1,2 +0,0 @@
-# Locally calculated
-sha256  e31cac91545ff41b71cec5d8c22afd695645cd6e2a442ccdacacd60534069341  u-boot-2023.04.tar.bz2

board/technexion/imx8mmpico/patches/arm-trusted-firmware/0001-fix-build-allow-lower-address-access-with-gcc-12.patch

@@ -1,62 +0,0 @@
-From 078cbf942c86d77775a26d83fc87ca244de02d4c Mon Sep 17 00:00:00 2001
-From: Govindraj Raja <govindraj.raja@arm.com>
-Date: Fri, 5 May 2023 09:09:36 -0500
-Subject: [PATCH] fix(build): allow lower address access with gcc-12
-
-With gcc-12 any lower address access can trigger a warning/error
-this would be useful in other parts of system but in TF-A
-there are various reasons to access to the lower address ranges,
-example using mmio_read_*/writes_*
-
-So setup to allow access to lower addresses while using gcc-12
-
-Change-Id: Id1b4012b13bc6876d83b90a347fee12478a1921d
-Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
-Upstream: https://github.com/ARM-software/arm-trusted-firmware/commit/dea23e245fb890c6c06eff7d1aed8fffa981fc05
-Signed-off-by: Julien Olivain <ju.o@free.fr>
----
- Makefile                     |  4 ++++
- make_helpers/build_macros.mk | 12 ++++++++++++
- 2 files changed, 16 insertions(+)
-
-diff --git a/Makefile b/Makefile
-index dccf0121d..edd7f5886 100644
---- a/Makefile
-+++ b/Makefile
-@@ -385,6 +385,10 @@ ifeq ($(findstring clang,$(notdir $(CC))),)
- WARNINGS	+=		-Wunused-but-set-variable -Wmaybe-uninitialized	\
- 				-Wpacked-bitfield-compat -Wshift-overflow=2 \
- 				-Wlogical-op
-+
-+# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105523
-+TF_CFLAGS		+= 	$(call cc_option, --param=min-pagesize=0)
-+
- else
- # using clang
- WARNINGS	+=		-Wshift-overflow -Wshift-sign-overflow \
-diff --git a/make_helpers/build_macros.mk b/make_helpers/build_macros.mk
-index 12aaee684..3a54bf67c 100644
---- a/make_helpers/build_macros.mk
-+++ b/make_helpers/build_macros.mk
-@@ -86,6 +86,18 @@ define assert_numerics
-     $(foreach num,$1,$(eval $(call assert_numeric,$(num))))
- endef
- 
-+# Convenience function to check for a given linker option. An call to
-+# $(call ld_option, --no-XYZ) will return --no-XYZ if supported by the linker
-+define ld_option
-+	$(shell if $(LD) $(1) -v >/dev/null 2>&1; then echo $(1); fi )
-+endef
-+
-+# Convenience function to check for a given compiler option. A call to
-+# $(call cc_option, --no-XYZ) will return --no-XYZ if supported by the compiler
-+define cc_option
-+	$(shell if $(CC) $(1) -c -x c /dev/null -o /dev/null >/dev/null 2>&1; then echo $(1); fi )
-+endef
-+
- # CREATE_SEQ is a recursive function to create sequence of numbers from 1 to
- # $(2) and assign the sequence to $(1)
- define CREATE_SEQ
--- 
-2.41.0
-

board/technexion/imx8mmpico/patches/arm-trusted-firmware/0002-feat-build-add-support-for-new-binutils-versions.patch

@@ -1,62 +0,0 @@
-From cc14748257e07ed5b2caf5194c4c333a8d09a1f4 Mon Sep 17 00:00:00 2001
-From: Marco Felsch <m.felsch@pengutronix.de>
-Date: Wed, 9 Nov 2022 12:59:09 +0100
-Subject: [PATCH] feat(build): add support for new binutils versions
-
-Users of GNU ld (BPF) from binutils 2.39+ will observe multiple instaces
-of a new warning when linking the bl*.elf in the form:
-
-  ld.bfd: warning: stm32mp1_helper.o: missing .note.GNU-stack section implies executable stack
-  ld.bfd: NOTE: This behaviour is deprecated and will be removed in a future version of the linker
-  ld.bfd: warning: bl2.elf has a LOAD segment with RWX permissions
-  ld.bfd: warning: bl32.elf has a LOAD segment with RWX permissions
-
-These new warnings are enbaled by default to secure elf binaries:
- - https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=ba951afb99912da01a6e8434126b8fac7aa75107
- - https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=0d38576a34ec64a1b4500c9277a8e9d0f07e6774
-
-Fix it in a similar way to what the Linux kernel does, see:
-https://lore.kernel.org/all/20220810222442.2296651-1-ndesaulniers@google.com/
-
-Following the reasoning there, we set "-z noexecstack" for all linkers
-(although LLVM's LLD defaults to it) and optional add
---no-warn-rwx-segments since this a ld.bfd related.
-
-Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
-Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
-Change-Id: I9430f5fa5036ca88da46cd3b945754d62616b617
-Upstream: https://github.com/ARM-software/arm-trusted-firmware/commit/1f49db5f25cdd4e43825c9bcc0575070b80f628c
-Signed-off-by: Julien Olivain <ju.o@free.fr>
----
- Makefile | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/Makefile b/Makefile
-index edd7f5886..4c0e1473e 100644
---- a/Makefile
-+++ b/Makefile
-@@ -418,6 +418,8 @@ endif
- 
- GCC_V_OUTPUT		:=	$(shell $(CC) -v 2>&1)
- 
-+TF_LDFLAGS		+=	-z noexecstack
-+
- # LD = armlink
- ifneq ($(findstring armlink,$(notdir $(LD))),)
- TF_LDFLAGS		+=	--diag_error=warning --lto_level=O1
-@@ -445,6 +447,12 @@ TF_LDFLAGS		+=	$(subst --,-Xlinker --,$(TF_LDFLAGS_$(ARCH)))
- # LD = gcc-ld (ld) or llvm-ld (ld.lld) or other
- else
- TF_LDFLAGS		+=	--fatal-warnings -O1
-+
-+# With ld.bfd version 2.39 and newer new warnings are added. Skip those since we
-+# are not loaded by a elf loader.
-+TF_LDFLAGS		+=	$(call ld_option, --no-warn-rwx-segments)
-+TF_LDFLAGS		+=	-O1
-+
- TF_LDFLAGS		+=	--gc-sections
- # ld.lld doesn't recognize the errata flags,
- # therefore don't add those in that case
--- 
-2.41.0
-

board/technexion/imx8mpico/patches/arm-trusted-firmware/0001-fix-build-allow-lower-address-access-with-gcc-12.patch

@@ -1,62 +0,0 @@
-From 078cbf942c86d77775a26d83fc87ca244de02d4c Mon Sep 17 00:00:00 2001
-From: Govindraj Raja <govindraj.raja@arm.com>
-Date: Fri, 5 May 2023 09:09:36 -0500
-Subject: [PATCH] fix(build): allow lower address access with gcc-12
-
-With gcc-12 any lower address access can trigger a warning/error
-this would be useful in other parts of system but in TF-A
-there are various reasons to access to the lower address ranges,
-example using mmio_read_*/writes_*
-
-So setup to allow access to lower addresses while using gcc-12
-
-Change-Id: Id1b4012b13bc6876d83b90a347fee12478a1921d
-Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
-Upstream: https://github.com/ARM-software/arm-trusted-firmware/commit/dea23e245fb890c6c06eff7d1aed8fffa981fc05
-Signed-off-by: Julien Olivain <ju.o@free.fr>
----
- Makefile                     |  4 ++++
- make_helpers/build_macros.mk | 12 ++++++++++++
- 2 files changed, 16 insertions(+)
-
-diff --git a/Makefile b/Makefile
-index dccf0121d..edd7f5886 100644
---- a/Makefile
-+++ b/Makefile
-@@ -385,6 +385,10 @@ ifeq ($(findstring clang,$(notdir $(CC))),)
- WARNINGS	+=		-Wunused-but-set-variable -Wmaybe-uninitialized	\
- 				-Wpacked-bitfield-compat -Wshift-overflow=2 \
- 				-Wlogical-op
-+
-+# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105523
-+TF_CFLAGS		+= 	$(call cc_option, --param=min-pagesize=0)
-+
- else
- # using clang
- WARNINGS	+=		-Wshift-overflow -Wshift-sign-overflow \
-diff --git a/make_helpers/build_macros.mk b/make_helpers/build_macros.mk
-index 12aaee684..3a54bf67c 100644
---- a/make_helpers/build_macros.mk
-+++ b/make_helpers/build_macros.mk
-@@ -86,6 +86,18 @@ define assert_numerics
-     $(foreach num,$1,$(eval $(call assert_numeric,$(num))))
- endef
- 
-+# Convenience function to check for a given linker option. An call to
-+# $(call ld_option, --no-XYZ) will return --no-XYZ if supported by the linker
-+define ld_option
-+	$(shell if $(LD) $(1) -v >/dev/null 2>&1; then echo $(1); fi )
-+endef
-+
-+# Convenience function to check for a given compiler option. A call to
-+# $(call cc_option, --no-XYZ) will return --no-XYZ if supported by the compiler
-+define cc_option
-+	$(shell if $(CC) $(1) -c -x c /dev/null -o /dev/null >/dev/null 2>&1; then echo $(1); fi )
-+endef
-+
- # CREATE_SEQ is a recursive function to create sequence of numbers from 1 to
- # $(2) and assign the sequence to $(1)
- define CREATE_SEQ
--- 
-2.41.0
-

board/technexion/imx8mpico/patches/arm-trusted-firmware/0002-feat-build-add-support-for-new-binutils-versions.patch

@@ -1,62 +0,0 @@
-From cc14748257e07ed5b2caf5194c4c333a8d09a1f4 Mon Sep 17 00:00:00 2001
-From: Marco Felsch <m.felsch@pengutronix.de>
-Date: Wed, 9 Nov 2022 12:59:09 +0100
-Subject: [PATCH] feat(build): add support for new binutils versions
-
-Users of GNU ld (BPF) from binutils 2.39+ will observe multiple instaces
-of a new warning when linking the bl*.elf in the form:
-
-  ld.bfd: warning: stm32mp1_helper.o: missing .note.GNU-stack section implies executable stack
-  ld.bfd: NOTE: This behaviour is deprecated and will be removed in a future version of the linker
-  ld.bfd: warning: bl2.elf has a LOAD segment with RWX permissions
-  ld.bfd: warning: bl32.elf has a LOAD segment with RWX permissions
-
-These new warnings are enbaled by default to secure elf binaries:
- - https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=ba951afb99912da01a6e8434126b8fac7aa75107
- - https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=0d38576a34ec64a1b4500c9277a8e9d0f07e6774
-
-Fix it in a similar way to what the Linux kernel does, see:
-https://lore.kernel.org/all/20220810222442.2296651-1-ndesaulniers@google.com/
-
-Following the reasoning there, we set "-z noexecstack" for all linkers
-(although LLVM's LLD defaults to it) and optional add
---no-warn-rwx-segments since this a ld.bfd related.
-
-Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
-Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
-Change-Id: I9430f5fa5036ca88da46cd3b945754d62616b617
-Upstream: https://github.com/ARM-software/arm-trusted-firmware/commit/1f49db5f25cdd4e43825c9bcc0575070b80f628c
-Signed-off-by: Julien Olivain <ju.o@free.fr>
----
- Makefile | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/Makefile b/Makefile
-index edd7f5886..4c0e1473e 100644
---- a/Makefile
-+++ b/Makefile
-@@ -418,6 +418,8 @@ endif
- 
- GCC_V_OUTPUT		:=	$(shell $(CC) -v 2>&1)
- 
-+TF_LDFLAGS		+=	-z noexecstack
-+
- # LD = armlink
- ifneq ($(findstring armlink,$(notdir $(LD))),)
- TF_LDFLAGS		+=	--diag_error=warning --lto_level=O1
-@@ -445,6 +447,12 @@ TF_LDFLAGS		+=	$(subst --,-Xlinker --,$(TF_LDFLAGS_$(ARCH)))
- # LD = gcc-ld (ld) or llvm-ld (ld.lld) or other
- else
- TF_LDFLAGS		+=	--fatal-warnings -O1
-+
-+# With ld.bfd version 2.39 and newer new warnings are added. Skip those since we
-+# are not loaded by a elf loader.
-+TF_LDFLAGS		+=	$(call ld_option, --no-warn-rwx-segments)
-+TF_LDFLAGS		+=	-O1
-+
- TF_LDFLAGS		+=	--gc-sections
- # ld.lld doesn't recognize the errata flags,
- # therefore don't add those in that case
--- 
-2.41.0
-

board/ti/am574x-idk/extlinux.conf

@@ -1,4 +0,0 @@
-label am5749-idk-buildroot
-  kernel /zImage
-  fdtdir /
-  append console=ttyS0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait

board/ti/am574x-idk/genimage.cfg

@@ -1,30 +0,0 @@
-image boot.vfat {
-	vfat {
-		files = {
-			"MLO",
-			"u-boot.img",
-			"zImage",
-			"am574x-idk.dtb",
-			"extlinux"
-		}
-	}
-
-	size = 16M
-}
-
-image sdcard.img {
-	hdimage {
-	}
-
-	partition u-boot {
-		partition-type = 0xC
-		bootable = "true"
-                image = "boot.vfat"
-	}
-
-	partition rootfs {
-		partition-type = 0x83
-		image = "rootfs.ext4"
-		size = 1G
-	}
-}

board/ti/am574x-idk/post-build.sh

@@ -1,4 +0,0 @@
-#!/bin/sh
-BOARD_DIR="$(dirname "$0")"
-
-install -m 0644 -D "${BOARD_DIR}"/extlinux.conf "${BINARIES_DIR}"/extlinux/extlinux.conf

board/ti/am574x-idk/readme.txt

@@ -1,28 +0,0 @@
-Texas Instuments AM574x IDK Test and Development Board
-
-Description
-===========
-
-This configuration will build a basic image for the TI AM574x IDK
-board: https://www.ti.com/tool/TMDSIDK574
-
-How to build it
-===============
-
-Configure Buildroot:
-
-    $ make am574x_idk_defconfig
-
-Compile everything and build the USB flash drive image:
-
-    $ make
-
-How to write the SD card
-========================
-
-Once the build process is finished you will have an image called "sdcard.img"
-in the output/images/ directory.
-
-Copy the bootable "sdcard.img" onto an SD card with "dd":
-
-  $ sudo dd if=output/images/sdcard.img of=/dev/sdX

board/zynqmp/kria/kd240/kd240.sh

@@ -1,16 +0,0 @@
-#!/bin/sh
-
-# This is a temporary work around for generating kd240 u-boot.itb.
-# The problem is there is no way to currently configure u-boot to apply
-# the carrier board dtb overlay during build, so all kd240 carrier board
-# drivers are missing.
-# This will be removed when u-boot can build the kd240 u-boot.itb natively.
-
-UBOOT_DIR="$4"
-
-fdtoverlay -o "${UBOOT_DIR}/fit-dtb.blob" \
-	   -i "${UBOOT_DIR}/arch/arm/dts/zynqmp-smk-k24-revA.dtb" \
-	   "${UBOOT_DIR}/arch/arm/dts/zynqmp-sck-kd-g-revA.dtbo"
-
-"${UBOOT_DIR}/tools/mkimage" -E -f "${UBOOT_DIR}/u-boot.its" \
-			     -B 0x8 "${BINARIES_DIR}/u-boot.itb"

board/zynqmp/kria/kd240/patches/uboot/0001-arm64-zynqmp-Fix-k24-psu_init_gpl.c-clocking.patch

@@ -1,401 +0,0 @@
-From f8cba630d3fccd901164dec7bd9b60442bab8995 Mon Sep 17 00:00:00 2001
-From: Neal Frager <neal.frager@amd.com>
-Date: Wed, 13 Dec 2023 12:53:29 +0000
-Subject: [PATCH] arm64: zynqmp: Fix k24 psu_init_gpl.c clocking
-
-This patch corrects the k24 som clocking configuration such that the serdes
-clocks are correctly enabled and the usb0 is configured to use the psgtr
-refclk2 for usb3 mode.
-
-This patch also corrects the configuration of mio pins mio76 and mio77
-which should be configured as gpio pins.
-
-Signed-off-by: Neal Frager <neal.frager@amd.com>
-Upstream: https://patchwork.ozlabs.org/project/uboot/patch/20231213134007.2818069-1-neal.frager@amd.com/
----
- .../zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c  | 266 +++++++++++++-----
- 1 file changed, 200 insertions(+), 66 deletions(-)
-
-diff --git a/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c
-index 45102302dc..4c904c6c81 100644
---- a/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c
-+++ b/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c
-@@ -72,6 +72,18 @@ static void dpll_prog(int div2, int ddr_pll_fbdiv, int d_lock_dly,
- 	Xil_Out32(((0xFD1A0000U) + 0x0000002C), pll_ctrl_regval);
- }
- 
-+static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate,
-+			   u32 lane2_protocol, u32 lane2_rate,
-+			   u32 lane1_protocol, u32 lane1_rate,
-+			   u32 lane0_protocol, u32 lane0_rate)
-+{
-+	Xil_Out32(0xFD409914, 0xF3);
-+	Xil_Out32(0xFD409940, 0xF3);
-+	Xil_Out32(0xFD409990, 0x20);
-+	Xil_Out32(0xFD409924, 0x37);
-+	return 1;
-+}
-+
- static unsigned long psu_pll_init_data(void)
- {
- 	psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
-@@ -490,20 +502,20 @@ static unsigned long psu_mio_init_data(void)
- 	psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U);
- 	psu_mask_write(0xFF180090, 0x000000FEU, 0x000000C0U);
- 	psu_mask_write(0xFF180094, 0x000000FEU, 0x000000C0U);
--	psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U);
--	psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U);
--	psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U);
--	psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U);
--	psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U);
--	psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000010U);
--	psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U);
--	psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U);
--	psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U);
--	psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U);
--	psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U);
--	psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U);
--	psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U);
--	psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U);
-+	psu_mask_write(0xFF180098, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000002U);
-+	psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000080U);
-+	psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000080U);
- 	psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U);
- 	psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U);
- 	psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U);
-@@ -528,8 +540,8 @@ static unsigned long psu_mio_init_data(void)
- 	psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U);
- 	psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U);
- 	psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U);
--	psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U);
--	psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U);
-+	psu_mask_write(0xFF180130, 0x000000FEU, 0x00000000U);
-+	psu_mask_write(0xFF180134, 0x000000FEU, 0x00000000U);
- 	psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x50000000U);
- 	psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B02020U);
- 	psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U);
-@@ -539,18 +551,18 @@ static unsigned long psu_mio_init_data(void)
- 	psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
- 	psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
- 	psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x03FFFFFFU);
--	psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x00080814U);
-+	psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x00FC0814U);
- 	psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
- 	psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
--	psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
--	psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
--	psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x03F7F7EBU);
--	psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x00FC000BU);
-+	psu_mask_write(0xFF180160, 0x0387FFFFU, 0x0387FFFFU);
-+	psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFF87FU);
-+	psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x0303F7EBU);
-+	psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x0004400BU);
- 	psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
- 	psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
--	psu_mask_write(0xFF18017C, 0x0357FFFFU, 0x0357FFFFU);
--	psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x0357FFFFU);
--	psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x0303FFF4U);
-+	psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
-+	psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
-+	psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x03FBBFF4U);
- 	psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
- 
- 	return 1;
-@@ -569,21 +581,16 @@ static unsigned long psu_peripherals_init_data(void)
- 	psu_mask_write(0xFD1A0100, 0x0001807CU, 0x00000000U);
- 	psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
- 	psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
--	psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
-+	psu_mask_write(0xFF5E0230, 0x00000002U, 0x00000000U);
- 	psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U);
- 	psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U);
- 	psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
--	psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U);
--	psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U);
--	psu_mask_write(0xFF180320, 0x33840000U, 0x02840000U);
--	psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U);
--	psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U);
--	psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U);
-+	psu_mask_write(0xFF5E0238, 0x00000080U, 0x00000000U);
- 	psu_mask_write(0xFF5E0238, 0x00000400U, 0x00000000U);
- 	psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
- 	psu_mask_write(0xFF5E0238, 0x00000010U, 0x00000000U);
- 	psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
--	psu_mask_write(0xFF5E0238, 0x00000004U, 0x00000000U);
-+	psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
- 	psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
- 	psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
- 	psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
-@@ -591,40 +598,26 @@ static unsigned long psu_peripherals_init_data(void)
- 	psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
- 	psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD18U);
- 	psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
--	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U);
-+	psu_mask_write(0xFF0A0284, 0x03FFFFFFU, 0x01000000U);
-+	psu_mask_write(0xFF0A0288, 0x03FFFFFFU, 0x01000000U);
-+	psu_mask_write(0xFF0A0014, 0x03FF03FFU, 0x02FF0100U);
- 
- 	mask_delay(1);
--	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000002U);
-+	psu_mask_write(0xFF0A0014, 0x03FF03FFU, 0x02FF0000U);
- 
- 	mask_delay(5);
--	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U);
-+	psu_mask_write(0xFF0A0014, 0x03FF03FFU, 0x02FF0100U);
- 
- 	return 1;
- }
- 
- static unsigned long psu_serdes_init_data(void)
- {
--	psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U);
--	psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U);
- 	psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U);
--	psu_mask_write(0xFD402860, 0x00000080U, 0x00000080U);
--	psu_mask_write(0xFD402864, 0x00000081U, 0x00000001U);
--	psu_mask_write(0xFD402868, 0x00000082U, 0x00000002U);
-+	psu_mask_write(0xFD402868, 0x00000080U, 0x00000080U);
- 	psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U);
- 	psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U);
- 	psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U);
--	psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U);
--	psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U);
--	psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U);
--	psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
--	psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU);
--	psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U);
--	psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U);
--	psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U);
--	psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU);
--	psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U);
--	psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U);
--	psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U);
- 	psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U);
- 	psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U);
- 	psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U);
-@@ -678,18 +671,8 @@ static unsigned long psu_serdes_init_data(void)
- 	psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U);
- 	psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U);
- 
--	serdes_illcalib(0, 0, 3, 0, 4, 0, 4, 0);
--	psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U);
-+	serdes_illcalib(0, 0, 3, 0, 0, 0, 0, 0);
- 	psu_mask_write(0xFD410014, 0x00000007U, 0x00000003U);
--	psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U);
--	psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U);
--	psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U);
--	psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
--	psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U);
--	psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U);
--	psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U);
--	psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U);
--
- 	return 1;
- }
- 
-@@ -699,7 +682,7 @@ static unsigned long psu_resetout_init_data(void)
- 	psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U);
- 	psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U);
- 	psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U);
--	psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
-+	psu_mask_write(0xFF5E0230, 0x00000002U, 0x00000000U);
- 	psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U);
- 	psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U);
- 	psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U);
-@@ -708,7 +691,6 @@ static unsigned long psu_resetout_init_data(void)
- 	psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U);
- 	psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U);
- 	psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
--	mask_poll(0xFD4063E4, 0x00000010U);
- 	mask_poll(0xFD40A3E4, 0x00000010U);
- 
- 	return 1;
-@@ -717,7 +699,7 @@ static unsigned long psu_resetout_init_data(void)
- static unsigned long psu_resetin_init_data(void)
- {
- 	psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U);
--	psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U);
-+	psu_mask_write(0xFF5E0230, 0x00000002U, 0x00000002U);
- 	psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU);
- 	psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U);
- 	psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U);
-@@ -1034,6 +1016,157 @@ static unsigned long psu_ddr_phybringup_data(void)
- 	return 1;
- }
- 
-+static int serdes_enb_coarse_saturation(void)
-+{
-+	Xil_Out32(0xFD402094, 0x00000010);
-+	Xil_Out32(0xFD406094, 0x00000010);
-+	Xil_Out32(0xFD40A094, 0x00000010);
-+	Xil_Out32(0xFD40E094, 0x00000010);
-+	return 1;
-+}
-+
-+static int serdes_fixcal_code(void)
-+{
-+	int maskstatus = 1;
-+	unsigned int rdata = 0;
-+	unsigned int match_pmos_code[23];
-+	unsigned int match_nmos_code[23];
-+	unsigned int match_ical_code[7];
-+	unsigned int match_rcal_code[7];
-+	unsigned int p_code = 0;
-+	unsigned int n_code = 0;
-+	unsigned int i_code = 0;
-+	unsigned int r_code = 0;
-+	unsigned int repeat_count = 0;
-+	unsigned int L3_TM_CALIB_DIG20 = 0;
-+	unsigned int L3_TM_CALIB_DIG19 = 0;
-+	unsigned int L3_TM_CALIB_DIG18 = 0;
-+	unsigned int L3_TM_CALIB_DIG16 = 0;
-+	unsigned int L3_TM_CALIB_DIG15 = 0;
-+	unsigned int L3_TM_CALIB_DIG14 = 0;
-+	int i = 0;
-+
-+	rdata = Xil_In32(0xFD40289C);
-+	rdata = rdata & ~0x03;
-+	rdata = rdata | 0x1;
-+	Xil_Out32(0xFD40289C, rdata);
-+	int count = 0;
-+	do {
-+		if (count == 1100000)
-+			break;
-+		rdata = Xil_In32(0xFD402B1C);
-+		count++;
-+	} while ((rdata & 0x0000000E) != 0x0000000E);
-+
-+	for (i = 0; i < 23; i++) {
-+		match_pmos_code[i] = 0;
-+		match_nmos_code[i] = 0;
-+	}
-+	for (i = 0; i < 7; i++) {
-+		match_ical_code[i] = 0;
-+		match_rcal_code[i] = 0;
-+	}
-+
-+	do {
-+		Xil_Out32(0xFD410010, 0x00000000);
-+		Xil_Out32(0xFD410014, 0x00000000);
-+
-+		Xil_Out32(0xFD410010, 0x00000001);
-+		Xil_Out32(0xFD410014, 0x00000000);
-+
-+		maskstatus = mask_poll(0xFD40EF14, 0x2);
-+		if (maskstatus == 0) {
-+			xil_printf("#SERDES initialization timed out\n\r");
-+			return maskstatus;
-+		}
-+
-+		p_code = mask_read(0xFD40EF18, 0xFFFFFFFF);
-+		n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF);
-+		;
-+		i_code = mask_read(0xFD40EF24, 0xFFFFFFFF);
-+		r_code = mask_read(0xFD40EF28, 0xFFFFFFFF);
-+		;
-+
-+		if (p_code >= 0x26 && p_code <= 0x3C)
-+			match_pmos_code[p_code - 0x26] += 1;
-+
-+		if (n_code >= 0x26 && n_code <= 0x3C)
-+			match_nmos_code[n_code - 0x26] += 1;
-+
-+		if (i_code >= 0xC && i_code <= 0x12)
-+			match_ical_code[i_code - 0xC] += 1;
-+
-+		if (r_code >= 0x6 && r_code <= 0xC)
-+			match_rcal_code[r_code - 0x6] += 1;
-+
-+	} while (repeat_count++ < 10);
-+
-+	for (i = 0; i < 23; i++) {
-+		if (match_pmos_code[i] >= match_pmos_code[0]) {
-+			match_pmos_code[0] = match_pmos_code[i];
-+			p_code = 0x26 + i;
-+		}
-+		if (match_nmos_code[i] >= match_nmos_code[0]) {
-+			match_nmos_code[0] = match_nmos_code[i];
-+			n_code = 0x26 + i;
-+		}
-+	}
-+
-+	for (i = 0; i < 7; i++) {
-+		if (match_ical_code[i] >= match_ical_code[0]) {
-+			match_ical_code[0] = match_ical_code[i];
-+			i_code = 0xC + i;
-+		}
-+		if (match_rcal_code[i] >= match_rcal_code[0]) {
-+			match_rcal_code[0] = match_rcal_code[i];
-+			r_code = 0x6 + i;
-+		}
-+	}
-+
-+	L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0);
-+	L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7);
-+
-+	L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18);
-+	L3_TM_CALIB_DIG19 = L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6)
-+	    | 0x20 | 0x4 | ((n_code >> 3) & 0x3);
-+
-+	L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F);
-+	L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10;
-+
-+	L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8);
-+	L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7);
-+
-+	L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30);
-+	L3_TM_CALIB_DIG15 = L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7)
-+	    | 0x40 | 0x8 | ((i_code >> 1) & 0x7);
-+
-+	L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F);
-+	L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40;
-+
-+	Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20);
-+	Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19);
-+	Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18);
-+	Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16);
-+	Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15);
-+	Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14);
-+	return maskstatus;
-+}
-+
-+static int init_serdes(void)
-+{
-+	int status = 1;
-+
-+	status &= psu_resetin_init_data();
-+
-+	status &= serdes_fixcal_code();
-+	status &= serdes_enb_coarse_saturation();
-+
-+	status &= psu_serdes_init_data();
-+	status &= psu_resetout_init_data();
-+
-+	return status;
-+}
-+
- static void init_peripheral(void)
- {
- 	psu_mask_write(0xFD5F0018, 0x8000001FU, 0x8000001FU);
-@@ -1050,6 +1183,7 @@ int psu_init(void)
- 	status &= psu_ddr_init_data();
- 	status &= psu_ddr_phybringup_data();
- 	status &= psu_peripherals_init_data();
-+	status &= init_serdes();
- 	init_peripheral();
- 
- 	status &= psu_afi_config();
--- 
-2.25.1
-

board/zynqmp/kria/kd240/patches/uboot/0002-arm64-zynqmp-Add-output-enable-pins-to-SOMs.patch

@@ -1,79 +0,0 @@
-From bf35bdac2adfa7c65c2992d8dedcc24585561732 Mon Sep 17 00:00:00 2001
-From: Neal Frager <neal.frager@amd.com>
-Date: Wed, 13 Dec 2023 13:11:42 +0000
-Subject: [PATCH] arm64: zynqmp: Add output-enable pins to SOMs
-
-Now that the zynqmp pinctrl driver supports the tri-state registers, make
-sure that the pins requiring output-enable are configured appropriately for
-SOMs.
-
-Without it, all tristate setting for MIOs, which are not related to SOM
-itself, are using default configuration which is not correct setting.
-It means SDs, USBs, ethernet, etc. are not working properly.
-
-In past it was fixed through calling tristate configuration via bootcmd:
-usb_init=mw 0xFF180208 2020
-kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \
-  gpio toggle gpio@ff0a000038
-
-Signed-off-by: Neal Frager <neal.frager@amd.com>
-Upstream: https://patchwork.ozlabs.org/project/uboot/patch/20231213134052.2818879-1-neal.frager@amd.com/
----
- arch/arm/dts/zynqmp-sck-kd-g-revA.dts | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts
-index 56f3128528..12865392a3 100644
---- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dts
-+++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dts
-@@ -175,6 +175,7 @@
- 		conf-tx {
- 			pins = "MIO36";
- 			bias-disable;
-+			output-enable;
- 		};
- 
- 		mux {
-@@ -226,6 +227,7 @@
- 		conf-bootstrap {
- 			pins = "MIO44", "MIO49";
- 			bias-disable;
-+			output-enable;
- 			low-power-disable;
- 		};
- 
-@@ -233,6 +235,7 @@
- 			pins = "MIO38", "MIO39", "MIO40",
- 				"MIO41", "MIO42", "MIO43";
- 			bias-disable;
-+			output-enable;
- 			low-power-enable;
- 		};
- 
-@@ -241,6 +244,7 @@
- 			slew-rate = <SLEW_RATE_SLOW>;
- 			power-source = <IO_STANDARD_LVCMOS18>;
- 			bias-disable;
-+			output-enable;
- 		};
- 
- 		mux-mdio {
-@@ -271,6 +275,7 @@
- 			pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
- 			"MIO60", "MIO61", "MIO62", "MIO63";
- 			bias-disable;
-+			output-enable;
- 			drive-strength = <4>;
- 			slew-rate = <SLEW_RATE_SLOW>;
- 		};
-@@ -298,6 +303,7 @@
- 			pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
- 			"MIO72", "MIO73", "MIO74", "MIO75";
- 			bias-disable;
-+			output-enable;
- 			drive-strength = <4>;
- 			slew-rate = <SLEW_RATE_SLOW>;
- 		};
--- 
-2.25.1
-

board/zynqmp/kria/kd240/pm_cfg_obj.c

@@ -1,494 +0,0 @@
-/******************************************************************************
-* Copyright (c) 2017 - 2021 Xilinx, Inc.  All rights reserved.
-* SPDX-License-Identifier: MIT
-******************************************************************************/
-
-#include "xil_types.h"
-#include "pm_defs.h"
-
-#define PM_CONFIG_MASTER_SECTION_ID	0x101U
-#define PM_CONFIG_SLAVE_SECTION_ID	0x102U
-#define PM_CONFIG_PREALLOC_SECTION_ID	0x103U
-#define PM_CONFIG_POWER_SECTION_ID	0x104U
-#define PM_CONFIG_RESET_SECTION_ID	0x105U
-#define PM_CONFIG_SHUTDOWN_SECTION_ID	0x106U
-#define PM_CONFIG_SET_CONFIG_SECTION_ID	0x107U
-#define PM_CONFIG_GPO_SECTION_ID	0x108U
-
-#define PM_SLAVE_FLAG_IS_SHAREABLE	0x1U
-#define PM_MASTER_USING_SLAVE_MASK	0x2U
-
-#define PM_CONFIG_GPO1_MIO_PIN_34_MAP	(1U << 10U)
-#define PM_CONFIG_GPO1_MIO_PIN_35_MAP	(1U << 11U)
-#define PM_CONFIG_GPO1_MIO_PIN_36_MAP	(1U << 12U)
-#define PM_CONFIG_GPO1_MIO_PIN_37_MAP	(1U << 13U)
-
-#define PM_CONFIG_GPO1_BIT_2_MASK	(1U << 2U)
-#define PM_CONFIG_GPO1_BIT_3_MASK	(1U << 3U)
-#define PM_CONFIG_GPO1_BIT_4_MASK	(1U << 4U)
-#define PM_CONFIG_GPO1_BIT_5_MASK	(1U << 5U)
-
-#define SUSPEND_TIMEOUT	0xFFFFFFFFU
-
-#define PM_CONFIG_OBJECT_TYPE_BASE	0x1U
-
-
-#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK    0x00000001
-#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK    0x00000100
-#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK    0x00000200
-
-
-
-#if defined (__ICCARM__)
-#pragma language=save
-#pragma language=extended
-#endif
-#if defined (__GNUC__)
-    const u32 XPm_ConfigObject[] __attribute__((used, section(".sys_cfg_data"))) =
-#elif defined (__ICCARM__)
-#pragma location = ".sys_cfg_data"
-__root const u32 XPm_ConfigObject[] =
-#endif
-{
-	/**********************************************************************/
-	/* HEADER */
-	2,	/* Number of remaining words in the header */
-	8,	/* Number of sections included in config object */
-	PM_CONFIG_OBJECT_TYPE_BASE,	/* Type of config object as base */
-	/**********************************************************************/
-	/* MASTER SECTION */
-	PM_CONFIG_MASTER_SECTION_ID, /* Master SectionID */
-	3U, /* No. of Masters*/
-
-	NODE_APU, /* Master Node ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK, /* IPI Mask of this master */
-	SUSPEND_TIMEOUT, /* Suspend timeout */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Suspend permissions */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Wake permissions */
-
-	NODE_RPU_0, /* Master Node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask of this master */
-	SUSPEND_TIMEOUT, /* Suspend timeout */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Suspend permissions */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Wake permissions */
-
-	NODE_RPU_1, /* Master Node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask of this master */
-	SUSPEND_TIMEOUT, /* Suspend timeout */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* Suspend permissions */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* Wake permissions */
-
-
-	/**********************************************************************/
-	/* SLAVE SECTION */
-
-
-	PM_CONFIG_SLAVE_SECTION_ID,	/* Section ID */
-	35,				/* Number of slaves */
-
-	NODE_OCM_BANK_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_OCM_BANK_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_OCM_BANK_2,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_OCM_BANK_3,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TCM_0_A,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
-
-	NODE_TCM_0_B,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
-
-	NODE_TCM_1_A,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TCM_1_B,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_L2,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPU_PP_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPU_PP_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_USB_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_2,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_3,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_ETH_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_UART_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_UART_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_SPI_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_I2C_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_DP,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GDMA,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_ADMA,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_QSPI,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPIO,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_CAN_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_EXTERN,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_DDR,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_IPI_APU,
-	0U,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK, /* IPI Mask */
-
-	NODE_IPI_RPU_0,
-	0U,
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
-
-	NODE_IPI_RPU_1,
-	0U,
-	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPU,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_RTC,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_PL,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-
-	/**********************************************************************/
-	/* PREALLOC SECTION */
-
-	PM_CONFIG_PREALLOC_SECTION_ID, /* Preallaoc SectionID */
-	3U, /* No. of Masters*/
-
-	/* Prealloc for psu_cortexa53_0 */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK,
-	10,
-	NODE_DDR,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_L2,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_0,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_1,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_2,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_3,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_I2C_1,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_QSPI,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_PL,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_IPI_APU,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-
-	/* Prealloc for psu_cortexr5_0 */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK,
-	3,
-	NODE_TCM_0_A,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_TCM_0_B,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_IPI_RPU_0,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-
-	/* Prealloc for psu_cortexr5_1 */
-	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	3,
-	NODE_TCM_1_A,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_TCM_1_B,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_IPI_RPU_1,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-
-	
-	/**********************************************************************/
-	/* POWER SECTION */
-
-	PM_CONFIG_POWER_SECTION_ID, /* Power Section ID */
-	4U, /* Number of power nodes */
-
-	NODE_APU, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-	NODE_RPU, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-	NODE_FPD, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-	NODE_PLD, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-
-	/**********************************************************************/
-	/* RESET SECTION */
-
-	PM_CONFIG_RESET_SECTION_ID, /* Reset Section ID */
-	120U, /* Number of resets */
-
-	XILPM_RESET_PCIE_CFG, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PCIE_BRIDGE, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PCIE_CTRL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DP, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SWDT_CRF, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM5, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM4, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GDMA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPU_PP1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPU_PP0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPU, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SATA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU3_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU2_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU1_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU0_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APU_L2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DDR, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APM_FPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SOFT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_QSPI, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_UART0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_UART1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SPI0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SPI1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SDIO0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SDIO1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_CAN0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_CAN1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_I2C0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_I2C1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SWDT_CRL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_NAND, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ADMA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_IOU_CC, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TIMESTAMP, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_R50, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_R51, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_AMBA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_OCM, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_PGE, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB0_CORERESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB1_CORERESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB0_HIBERRESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB1_HIBERRESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB0_APB, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB1_APB, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_IPI, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APM_LPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RTC, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SYSMON, 0,
-	XILPM_RESET_AFI_FM6, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_LPD_SWDT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_FPD, PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK,
-	XILPM_RESET_RPU_DBG1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_DBG0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DBG_LPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DBG_FPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_VPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_IOPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_4, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_5, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_6, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_7, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_8, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_9, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_10, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_11, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_12, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_13, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_14, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_15, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_16, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_17, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_18, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_19, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_20, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_21, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_22, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_23, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_24, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_25, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_26, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_27, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_28, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_29, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_30, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_31, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_LS, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PS_ONLY, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_92, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_93, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_94, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_95, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-
-	/**********************************************************************/
-	/* SET CONFIG SECTION */
-	PM_CONFIG_SET_CONFIG_SECTION_ID,		/* Set Config Section ID */
-	0U, /* Permissions to load base config object */
-	0U, /* Permissions to load overlay config object */
-
-	/**********************************************************************/
-	/* SHUTDOWN SECTION */
-
-	PM_CONFIG_SHUTDOWN_SECTION_ID, /* Shutdown Section ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* System Shutdown/Restart Permission */
-
-	/**********************************************************************/
-	/* GPO SECTION */
-	PM_CONFIG_GPO_SECTION_ID,		/* GPO Section ID */
-	0,					/* State of GPO pins */
-};
-#if defined (__ICCARM__)
-#pragma language=restore
-#endif

board/zynqmp/kria/kr260/kr260.sh

@@ -1,16 +0,0 @@
-#!/bin/sh
-
-# This is a temporary work around for generating kr260 u-boot.itb.
-# The problem is there is no way to currently configure u-boot to apply
-# the carrier board dtb overlay during build, so all kr260 carrier board
-# drivers are missing.
-# This will be removed when u-boot can build the kr260 u-boot.itb natively.
-
-UBOOT_DIR="$4"
-
-fdtoverlay -o "${UBOOT_DIR}/fit-dtb.blob" \
-	   -i "${UBOOT_DIR}/arch/arm/dts/zynqmp-smk-k26-revA.dtb" \
-	   "${UBOOT_DIR}/arch/arm/dts/zynqmp-sck-kr-g-revB.dtbo"
-
-"${UBOOT_DIR}/tools/mkimage" -E -f "${UBOOT_DIR}/u-boot.its" \
-			     -B 0x8 "${BINARIES_DIR}/u-boot.itb"

board/zynqmp/kria/kr260/pm_cfg_obj.c

@@ -1,496 +0,0 @@
-/******************************************************************************
-* Copyright (c) 2017 - 2021 Xilinx, Inc.  All rights reserved.
-* SPDX-License-Identifier: MIT
-******************************************************************************/
-
-#include "xil_types.h"
-#include "pm_defs.h"
-
-#define PM_CONFIG_MASTER_SECTION_ID	0x101U
-#define PM_CONFIG_SLAVE_SECTION_ID	0x102U
-#define PM_CONFIG_PREALLOC_SECTION_ID	0x103U
-#define PM_CONFIG_POWER_SECTION_ID	0x104U
-#define PM_CONFIG_RESET_SECTION_ID	0x105U
-#define PM_CONFIG_SHUTDOWN_SECTION_ID	0x106U
-#define PM_CONFIG_SET_CONFIG_SECTION_ID	0x107U
-#define PM_CONFIG_GPO_SECTION_ID	0x108U
-
-#define PM_SLAVE_FLAG_IS_SHAREABLE	0x1U
-#define PM_MASTER_USING_SLAVE_MASK	0x2U
-
-#define PM_CONFIG_GPO1_MIO_PIN_34_MAP	(1U << 10U)
-#define PM_CONFIG_GPO1_MIO_PIN_35_MAP	(1U << 11U)
-#define PM_CONFIG_GPO1_MIO_PIN_36_MAP	(1U << 12U)
-#define PM_CONFIG_GPO1_MIO_PIN_37_MAP	(1U << 13U)
-
-#define PM_CONFIG_GPO1_BIT_2_MASK	(1U << 2U)
-#define PM_CONFIG_GPO1_BIT_3_MASK	(1U << 3U)
-#define PM_CONFIG_GPO1_BIT_4_MASK	(1U << 4U)
-#define PM_CONFIG_GPO1_BIT_5_MASK	(1U << 5U)
-
-#define SUSPEND_TIMEOUT	0xFFFFFFFFU
-
-#define PM_CONFIG_OBJECT_TYPE_BASE	0x1U
-
-
-#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK    0x00000001
-#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK    0x00000100
-#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK    0x00000200
-
-
-
-#if defined (__ICCARM__)
-#pragma language=save
-#pragma language=extended
-#endif
-#if defined (__GNUC__)
-    const u32 XPm_ConfigObject[] __attribute__((used, section(".sys_cfg_data"))) =
-#elif defined (__ICCARM__)
-#pragma location = ".sys_cfg_data"
-__root const u32 XPm_ConfigObject[] =
-#endif
-{
-	/**********************************************************************/
-	/* HEADER */
-	2,	/* Number of remaining words in the header */
-	8,	/* Number of sections included in config object */
-	PM_CONFIG_OBJECT_TYPE_BASE,	/* Type of config object as base */
-	/**********************************************************************/
-	/* MASTER SECTION */
-	PM_CONFIG_MASTER_SECTION_ID, /* Master SectionID */
-	3U, /* No. of Masters*/
-
-	NODE_APU, /* Master Node ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK, /* IPI Mask of this master */
-	SUSPEND_TIMEOUT, /* Suspend timeout */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Suspend permissions */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Wake permissions */
-
-	NODE_RPU_0, /* Master Node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask of this master */
-	SUSPEND_TIMEOUT, /* Suspend timeout */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Suspend permissions */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Wake permissions */
-
-	NODE_RPU_1, /* Master Node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask of this master */
-	SUSPEND_TIMEOUT, /* Suspend timeout */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* Suspend permissions */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* Wake permissions */
-
-
-	/**********************************************************************/
-	/* SLAVE SECTION */
-
-
-	PM_CONFIG_SLAVE_SECTION_ID,	/* Section ID */
-	35,				/* Number of slaves */
-
-	NODE_OCM_BANK_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_OCM_BANK_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_OCM_BANK_2,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_OCM_BANK_3,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TCM_0_A,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
-
-	NODE_TCM_0_B,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
-
-	NODE_TCM_1_A,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TCM_1_B,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_L2,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPU_PP_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPU_PP_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_USB_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_USB_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_2,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_3,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_ETH_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_ETH_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_UART_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_SPI_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_I2C_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_DP,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GDMA,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_ADMA,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_QSPI,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPIO,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_EXTERN,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_DDR,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK| PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_IPI_APU,
-	0U,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK, /* IPI Mask */
-
-	NODE_IPI_RPU_0,
-	0U,
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
-
-	NODE_IPI_RPU_1,
-	0U,
-	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPU,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_RTC,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_PL,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-
-	/**********************************************************************/
-	/* PREALLOC SECTION */
-
-	PM_CONFIG_PREALLOC_SECTION_ID, /* Preallaoc SectionID */
-	3U, /* No. of Masters*/
-
-/* Prealloc for psu_cortexa53_0 */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK,
-	10,
-	NODE_DDR,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_L2,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_0,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_1,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_2,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_3,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_I2C_1,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_QSPI,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_PL,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_IPI_APU,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-
-	/* Prealloc for psu_cortexr5_0 */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK,
-	3,
-	NODE_TCM_0_A,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_TCM_0_B,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_IPI_RPU_0,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-
-	/* Prealloc for psu_cortexr5_1 */
-	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	3,
-	NODE_TCM_1_A,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_TCM_1_B,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_IPI_RPU_1,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-
-	
-	/**********************************************************************/
-	/* POWER SECTION */
-
-	PM_CONFIG_POWER_SECTION_ID, /* Power Section ID */
-	4U, /* Number of power nodes */
-
-	NODE_APU, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-	NODE_RPU, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-	NODE_FPD, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-	NODE_PLD, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-
-	/**********************************************************************/
-	/* RESET SECTION */
-
-	PM_CONFIG_RESET_SECTION_ID, /* Reset Section ID */
-	120U, /* Number of resets */
-
-	XILPM_RESET_PCIE_CFG, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PCIE_BRIDGE, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PCIE_CTRL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DP, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SWDT_CRF, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM5, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM4, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GDMA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPU_PP1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPU_PP0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPU, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SATA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU3_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU2_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU1_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU0_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APU_L2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DDR, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APM_FPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SOFT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_QSPI, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_UART0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_UART1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SPI0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SPI1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SDIO0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SDIO1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_CAN0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_CAN1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_I2C0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_I2C1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SWDT_CRL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_NAND, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ADMA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_IOU_CC, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TIMESTAMP, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_R50, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_R51, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_AMBA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_OCM, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_PGE, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB0_CORERESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB1_CORERESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB0_HIBERRESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB1_HIBERRESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB0_APB, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB1_APB, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_IPI, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APM_LPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RTC, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SYSMON, 0,
-	XILPM_RESET_AFI_FM6, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_LPD_SWDT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_FPD, PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK,
-	XILPM_RESET_RPU_DBG1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_DBG0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DBG_LPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DBG_FPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_VPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_IOPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_4, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_5, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_6, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_7, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_8, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_9, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_10, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_11, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_12, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_13, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_14, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_15, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_16, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_17, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_18, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_19, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_20, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_21, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_22, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_23, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_24, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_25, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_26, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_27, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_28, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_29, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_30, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_31, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_LS, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PS_ONLY, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_92, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_93, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_94, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_95, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-
-	/**********************************************************************/
-	/* SET CONFIG SECTION */
-	PM_CONFIG_SET_CONFIG_SECTION_ID,		/* Set Config Section ID */
-	0U, /* Permissions to load base config object */
-	0U, /* Permissions to load overlay config object */
-
-	/**********************************************************************/
-	/* SHUTDOWN SECTION */
-
-	PM_CONFIG_SHUTDOWN_SECTION_ID, /* Shutdown Section ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* System Shutdown/Restart Permission */
-
-	/**********************************************************************/
-	/* GPO SECTION */
-	PM_CONFIG_GPO_SECTION_ID,		/* GPO Section ID */
-	PM_CONFIG_GPO1_MIO_PIN_35_MAP |
-	0,					/* State of GPO pins */
-};
-#if defined (__ICCARM__)
-#pragma language=restore
-#endif
-

board/zynqmp/kria/readme.txt

@@ -2,29 +2,21 @@
 Xilinx Kria SOM Starter Kits - ZynqMP SoC
 **************************************************
 
-This document describes the Buildroot support for the Kria KD240,
-KR260 and KV260 starter kits by Xilinx, based on Kria SOM including the
+This document describes the Buildroot support for the Kria 
+KV260 starter kit by Xilinx, based on Kria SOM including the 
 Zynq UltraScale+ MPSoC (aka ZynqMP).  It has been tested with 
-the KD240, KR260 and KV260 production boards.
+the KV260 production board.
 
-Evaluation board features can be found here with the links below.
-
-KD240:
-https://www.xilinx.com/products/som/kria/kd240-drives-starter-kit.html
-
-KR260:
-https://www.xilinx.com/products/som/kria/kr260-robotics-starter-kit.html
+Evaluation board features can be found here with the link below.
 
 KV260:
-https://www.xilinx.com/products/som/kria/kv260-vision-starter-kit.html
+https://www.xilinx.com/products/boards-and-kits/kv260.html
 
 How to build it
 ===============
 
-Configure Buildroot: (use the command for the specific board)
+Configure Buildroot:
 
-    $ make zynqmp_kria_kd240_defconfig
-    $ make zynqmp_kria_kr260_defconfig
     $ make zynqmp_kria_kv260_defconfig
 
 Compile everything and build the rootfs image:
@@ -73,7 +65,7 @@ in that the boot.bin and u-boot.itb files need to be flashed
 into the QSPI boot flash such that U-Boot can then load all
 of the remaining images from the SD card.
 
-In addition, the Kria Starter Kits QSPI comes pre-flashed with
+In addition, the KV260 Starter Kit QSPI comes pre-flashed with
 a utility designed to make updating the QSPI flash memory
 easier.
 
@@ -84,9 +76,8 @@ https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/1641152513/Kria+K26+SOM#Bo
 
 Additionally, it is possible to use u-boot for updating the
 QSPI with new boot.bin and u-boot.itb images with the u-boot
-commands below.
+commands below:
 
-KV260 Flashing Instructions:
 Flashing u-boot.itb:
     $ sf probe
     $ fatload mmc 1 0x1000000 u-boot.itb
@@ -99,18 +90,5 @@ Flashing boot.bin:
     $ sf erase 0x200000 +$filesize
     $ sf write 0x1000000 0x200000 $filesize
 
-KD240 / KR260 Flashing Instructions:
-Flashing u-boot.itb:
-    $ sf probe
-    $ fatload usb 0 0x1000000 u-boot.itb
-    $ sf erase 0xf80000 +$filesize
-    $ sf write 0x1000000 0xf80000 $filesize
-
-Flashing boot.bin:
-    $ sf probe
-    $ fatload usb 0 0x1000000 boot.bin
-    $ sf erase 0x200000 +$filesize
-    $ sf write 0x1000000 0x200000 $filesize
-
 It is possible to boot the Buildroot generated SD card image without
 updating the QSPI boot.bin image, so this is an optional step.

board/zynqmp/readme.txt

@@ -1,9 +1,9 @@
-***************************************************
-Xilinx ZCU102 / ZCU104 / ZCU106 boards - ZynqMP SoC
-***************************************************
+******************************************
+Xilinx ZCU102 / ZCU106 boards - ZynqMP SoC
+******************************************
 
-This document describes the Buildroot support for the ZCU102, ZCU104
-and ZCU106 boards by Xilinx, based on the Zynq UltraScale+ MPSoC (aka
+This document describes the Buildroot support for the ZCU102 and
+ZCU106 boards by Xilinx, based on the Zynq UltraScale+ MPSoC (aka
 ZynqMP).  It has been tested with the ZCU102 and ZCU106 production
 boards.
 
@@ -12,9 +12,6 @@ Evaluation board features can be found here with the links below.
 ZCU102:
 https://www.xilinx.com/products/boards-and-kits/zcu102.html
 
-ZCU104:
-https://www.xilinx.com/products/boards-and-kits/zcu104.html
-
 ZCU106:
 https://www.xilinx.com/products/boards-and-kits/zcu106.html
 
@@ -22,10 +19,8 @@ https://www.xilinx.com/products/boards-and-kits/zcu106.html
 How to build it
 ===============
 
-Configure Buildroot: (use the command for the specific board)
+Configure Buildroot:
 
-    $ make zynqmp_zcu102_defconfig
-    $ make zynqmp_zcu104_defconfig
     $ make zynqmp_zcu106_defconfig
 
 Compile everything and build the rootfs image:

board/zynqmp/zcu104/pm_cfg_obj.c

@@ -1,503 +0,0 @@
-/******************************************************************************
-* Copyright (c) 2017 - 2021 Xilinx, Inc.  All rights reserved.
-* SPDX-License-Identifier: MIT
-******************************************************************************/
-
-#include "xil_types.h"
-#include "pm_defs.h"
-
-#define PM_CONFIG_MASTER_SECTION_ID	0x101U
-#define PM_CONFIG_SLAVE_SECTION_ID	0x102U
-#define PM_CONFIG_PREALLOC_SECTION_ID	0x103U
-#define PM_CONFIG_POWER_SECTION_ID	0x104U
-#define PM_CONFIG_RESET_SECTION_ID	0x105U
-#define PM_CONFIG_SHUTDOWN_SECTION_ID	0x106U
-#define PM_CONFIG_SET_CONFIG_SECTION_ID	0x107U
-#define PM_CONFIG_GPO_SECTION_ID	0x108U
-
-#define PM_SLAVE_FLAG_IS_SHAREABLE	0x1U
-#define PM_MASTER_USING_SLAVE_MASK	0x2U
-
-#define PM_CONFIG_GPO1_MIO_PIN_34_MAP	(1U << 10U)
-#define PM_CONFIG_GPO1_MIO_PIN_35_MAP	(1U << 11U)
-#define PM_CONFIG_GPO1_MIO_PIN_36_MAP	(1U << 12U)
-#define PM_CONFIG_GPO1_MIO_PIN_37_MAP	(1U << 13U)
-
-#define PM_CONFIG_GPO1_BIT_2_MASK	(1U << 2U)
-#define PM_CONFIG_GPO1_BIT_3_MASK	(1U << 3U)
-#define PM_CONFIG_GPO1_BIT_4_MASK	(1U << 4U)
-#define PM_CONFIG_GPO1_BIT_5_MASK	(1U << 5U)
-
-#define SUSPEND_TIMEOUT	0xFFFFFFFFU
-
-#define PM_CONFIG_OBJECT_TYPE_BASE	0x1U
-
-
-#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK    0x00000001
-#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK    0x00000100
-#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK    0x00000200
-
-
-
-#if defined (__ICCARM__)
-#pragma language=save
-#pragma language=extended
-#endif
-#if defined (__GNUC__)
-    const u32 XPm_ConfigObject[] __attribute__((used, section(".sys_cfg_data"))) =
-#elif defined (__ICCARM__)
-#pragma location = ".sys_cfg_data"
-__root const u32 XPm_ConfigObject[] =
-#endif
-{
-	/**********************************************************************/
-	/* HEADER */
-	2,	/* Number of remaining words in the header */
-	8,	/* Number of sections included in config object */
-	PM_CONFIG_OBJECT_TYPE_BASE,	/* Type of config object as base */
-	/**********************************************************************/
-	/* MASTER SECTION */
-	PM_CONFIG_MASTER_SECTION_ID, /* Master SectionID */
-	3U, /* No. of Masters*/
-
-	NODE_APU, /* Master Node ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK, /* IPI Mask of this master */
-	SUSPEND_TIMEOUT, /* Suspend timeout */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Suspend permissions */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Wake permissions */
-
-	NODE_RPU_0, /* Master Node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask of this master */
-	SUSPEND_TIMEOUT, /* Suspend timeout */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Suspend permissions */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Wake permissions */
-
-	NODE_RPU_1, /* Master Node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask of this master */
-	SUSPEND_TIMEOUT, /* Suspend timeout */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* Suspend permissions */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* Wake permissions */
-
-
-	/**********************************************************************/
-	/* SLAVE SECTION */
-
-
-	PM_CONFIG_SLAVE_SECTION_ID,	/* Section ID */
-	36,				/* Number of slaves */
-
-	NODE_OCM_BANK_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_OCM_BANK_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_OCM_BANK_2,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_OCM_BANK_3,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TCM_0_A,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
-
-	NODE_TCM_0_B,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
-
-	NODE_TCM_1_A,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TCM_1_B,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_L2,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPU_PP_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPU_PP_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_USB_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_2,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_TTC_3,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_SATA,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_ETH_3,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_UART_0,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_UART_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_I2C_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_SD_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_DP,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GDMA,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_ADMA,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_QSPI,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPIO,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_CAN_1,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_EXTERN,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_DDR,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_IPI_APU,
-	0U,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK, /* IPI Mask */
-
-	NODE_IPI_RPU_0,
-	0U,
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK, /* IPI Mask */
-
-	NODE_IPI_RPU_1,
-	0U,
-	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_GPU,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_RTC,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-	NODE_PL,
-	PM_SLAVE_FLAG_IS_SHAREABLE,
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
-
-
-	/**********************************************************************/
-	/* PREALLOC SECTION */
-
-	PM_CONFIG_PREALLOC_SECTION_ID, /* Preallaoc SectionID */
-	3U, /* No. of Masters*/
-
-	/* Prealloc for psu_cortexa53_0 */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK,
-	11,
-	NODE_DDR,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_L2,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_0,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_1,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_2,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_OCM_BANK_3,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_I2C_1,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_SD_1,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_QSPI,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_PL,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_IPI_APU,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-
-	/* Prealloc for psu_cortexr5_0 */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK,
-	3,
-	NODE_TCM_0_A,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_TCM_0_B,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_IPI_RPU_0,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-
-	/* Prealloc for psu_cortexr5_1 */
-	PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	3,
-	NODE_TCM_1_A,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_TCM_1_B,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-	NODE_IPI_RPU_1,
-	PM_MASTER_USING_SLAVE_MASK, /* Master is using Slave */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Current Requirements */
-	PM_CAP_ACCESS | PM_CAP_CONTEXT, /* Default Requirements */
-
-
-	
-	/**********************************************************************/
-	/* POWER SECTION */
-
-	PM_CONFIG_POWER_SECTION_ID, /* Power Section ID */
-	4U, /* Number of power nodes */
-
-	NODE_APU, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-	NODE_RPU, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-	NODE_FPD, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-	NODE_PLD, /* Power node ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Force power down permissions */
-
-
-	/**********************************************************************/
-	/* RESET SECTION */
-
-	PM_CONFIG_RESET_SECTION_ID, /* Reset Section ID */
-	120U, /* Number of resets */
-
-	XILPM_RESET_PCIE_CFG, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PCIE_BRIDGE, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PCIE_CTRL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DP, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SWDT_CRF, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM5, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM4, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_AFI_FM0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GDMA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPU_PP1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPU_PP0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPU, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SATA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU3_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU2_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU1_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU0_PWRON, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APU_L2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ACPU0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DDR, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APM_FPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SOFT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GEM3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_QSPI, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_UART0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_UART1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SPI0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SPI1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SDIO0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SDIO1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_CAN0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_CAN1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_I2C0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_I2C1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TTC3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SWDT_CRL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_NAND, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_ADMA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_IOU_CC, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_TIMESTAMP, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_R50, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_R51, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_AMBA, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_OCM, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_PGE, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB0_CORERESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB1_CORERESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB0_HIBERRESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB1_HIBERRESET, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB0_APB, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_USB1_APB, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_IPI, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APM_LPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RTC, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_SYSMON, 0,
-	XILPM_RESET_AFI_FM6, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_LPD_SWDT, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_FPD, PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK,
-	XILPM_RESET_RPU_DBG1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_DBG0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DBG_LPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DBG_FPD, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_APLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_DPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_VPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_IOPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPLL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_0, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_1, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_2, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_3, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_4, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_5, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_6, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_7, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_8, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_9, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_10, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_11, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_12, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_13, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_14, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_15, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_16, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_17, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_18, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_19, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_20, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_21, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_22, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_23, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_24, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_25, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_26, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_27, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_28, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_29, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_30, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPO3_PL_31, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_RPU_LS, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PS_ONLY, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_PL, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_92, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_93, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_94, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-	XILPM_RESET_GPIO5_EMIO_95, PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK,
-
-	/**********************************************************************/
-	/* SET CONFIG SECTION */
-	PM_CONFIG_SET_CONFIG_SECTION_ID,		/* Set Config Section ID */
-	0U, /* Permissions to load base config object */
-	0U, /* Permissions to load overlay config object */
-
-	/**********************************************************************/
-	/* SHUTDOWN SECTION */
-
-	PM_CONFIG_SHUTDOWN_SECTION_ID, /* Shutdown Section ID */
-	PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* System Shutdown/Restart Permission */
-
-	/**********************************************************************/
-	/* GPO SECTION */
-	PM_CONFIG_GPO_SECTION_ID,		/* GPO Section ID */
-	0,					/* State of GPO pins */
-};
-#if defined (__ICCARM__)
-#pragma language=restore
-#endif

boot/arm-trusted-firmware/Config.in

@@ -14,12 +14,7 @@ choice
 	  Select the specific ATF version you want to use
 
 config BR2_TARGET_ARM_TRUSTED_FIRMWARE_LATEST_VERSION
-	bool "v2.10"
-
-config BR2_TARGET_ARM_TRUSTED_FIRMWARE_LATEST_LTS_2_8_VERSION
-	bool "latest lts-v2.8.x"
-	help
-	  Select the latest LTS v2.8.x version available
+	bool "v2.7"
 
 config BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_VERSION
 	bool "Custom version"
@@ -47,8 +42,7 @@ config BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_VERSION_VALUE
 
 config BR2_TARGET_ARM_TRUSTED_FIRMWARE_VERSION
 	string
-	default "v2.10"		if BR2_TARGET_ARM_TRUSTED_FIRMWARE_LATEST_VERSION
-	default "lts-v2.8.13"	if BR2_TARGET_ARM_TRUSTED_FIRMWARE_LATEST_LTS_2_8_VERSION
+	default "v2.7"		if BR2_TARGET_ARM_TRUSTED_FIRMWARE_LATEST_VERSION
 	default "custom"	if BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_TARBALL
 	default BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_REPO_VERSION \
 				if BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_GIT

boot/arm-trusted-firmware/arm-trusted-firmware.hash

@@ -1,4 +1,3 @@
 # Locally calculated
-sha256  2e18b881ada9198173238cca80086c787b1fa3f698944bde1743142823fc511c  arm-trusted-firmware-v2.10.tar.gz
-sha256  e55ae7105c996b60f748b2eb6adeaf5ac8946425e1d4294ecc1c56aebf435274  arm-trusted-firmware-lts-v2.8.13.tar.gz
+sha256  327c65b1bc231608a7a808b068b00c1a22310e9fc86158813cd10a9711d5725e  arm-trusted-firmware-v2.7.tar.gz
 sha256  130d0c6e5159fa454b1e969fd281fa1d388819aefb203f65dd282544b5ab7ba9  docs/license.rst