1 Commits

Author SHA1 Message Date
SalimTerryLi 6bb6eefc94 dts: add various dts for SpacemiT K1 based boards 2025-01-02 17:25:03 +08:00
27 changed files with 8429 additions and 0 deletions
+8
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@@ -7,6 +7,14 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
dtb-$(CONFIG_TARGET_SPACEMIT_K1X) += k1-x_evb.dtb k1-x_deb2.dtb k1-x_deb1.dtb k1-x_hs450.dtb \
k1-x_kx312.dtb k1-x_MINI-PC.dtb k1-x_mingo.dtb k1-x_MUSE-N1.dtb \
k1-x_MUSE-Pi.dtb k1-x_spl.dtb k1-x_milkv-jupiter.dtb \
k1-x_MUSE-Book.dtb m1-x_milkv-jupiter.dtb \
k1-x_lpi3a.dtb k1-x_MUSE-Card.dtb k1-x_MUSE-Paper.dtb \
k1-x_MUSE-Paper-mini-4g.dtb k1-x_baton-camera.dtb \
k1-x_FusionOne.dtb k1-x_orangepi-rv2.dtb k1-x_ZT001H.dtb \
k1-x_uav.dtb k1-x_MUSE-Paper2.dtb
dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2.dtb
dtb-$(CONFIG_TARGET_TH1520_LPI4A) += th1520-lichee-pi-4a.dtb
dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-mbv32.dtb
+978
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@@ -0,0 +1,978 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include <dt-bindings/reset/reset-spacemit-k1x.h>
#include <dt-bindings/clock/spacemit-k1x-clock.h>
#include <dt-bindings/power-domain/k1x-pmu.h>
#include <dt-bindings/phy/phy.h>
/ {
compatible = "spacemit,k1x", "riscv";
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &uart0;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
mmc2 = &sdhci2;
};
cpus: cpus {
#address-cells = <1>;
#size-cells = <0>;
timebase-frequency = <10000000>;
cpu_0: cpu@0 {
compatible = "riscv";
device_type = "cpu";
reg = <0>;
status = "okay";
riscv,isa = "rv64imafdcv";
mmu-type = "riscv,sv39";
cpu0_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
interrupt-controller;
};
};
cpu_1: cpu@1 {
compatible = "riscv";
device_type = "cpu";
reg = <1>;
status = "okay";
riscv,isa = "rv64imafdcv";
mmu-type = "riscv,sv39";
cpu1_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
interrupt-controller;
};
};
cpu_2: cpu@2 {
compatible = "riscv";
device_type = "cpu";
reg = <2>;
status = "okay";
riscv,isa = "rv64imafdcv";
mmu-type = "riscv,sv39";
cpu2_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
interrupt-controller;
};
};
cpu_3: cpu@3 {
compatible = "riscv";
device_type = "cpu";
reg = <3>;
status = "okay";
riscv,isa = "rv64imafdcv";
mmu-type = "riscv,sv39";
cpu3_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
interrupt-controller;
};
};
cpu_4: cpu@4 {
compatible = "riscv";
device_type = "cpu";
reg = <4>;
status = "okay";
riscv,isa = "rv64imafdcv";
mmu-type = "riscv,sv39";
cpu4_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
interrupt-controller;
};
};
cpu_5: cpu@5 {
compatible = "riscv";
device_type = "cpu";
reg = <5>;
status = "okay";
riscv,isa = "rv64imafdcv";
mmu-type = "riscv,sv39";
cpu5_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
interrupt-controller;
};
};
cpu_6: cpu@6 {
compatible = "riscv";
device_type = "cpu";
reg = <6>;
status = "okay";
riscv,isa = "rv64imafdcv";
mmu-type = "riscv,sv39";
cpu6_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
interrupt-controller;
};
};
cpu_7: cpu@7 {
compatible = "riscv";
device_type = "cpu";
reg = <7>;
status = "okay";
riscv,isa = "rv64imafdcv";
mmu-type = "riscv,sv39";
cpu7_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
interrupt-controller;
};
};
};
clocks: clocks {
#address-cells = <0x2>;
#size-cells = <0x2>;
ranges;
vctcxo_24: vctcxo_24 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "vctcxo_24";
};
vctcxo_3: vctcxo_3 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <3000000>;
clock-output-names = "vctcxo_3";
};
vctcxo_1: vctcxo_1 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <1000000>;
clock-output-names = "vctcxo_1";
};
pll1_vco: pll1_vco {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24576000>;
clock-output-names = "pll1_vco";
};
clk_32k: clk_32k {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32000>;
clock-output-names = "clk_32k";
};
clk_dummy: clk_dummy {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <0>;
clock-output-names = "clk_dummy";
};
};
soc:soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
clint0: clint@e4000000 {
compatible = "riscv,clint0";
interrupts-extended = <
&cpu0_intc 3 &cpu0_intc 7
&cpu1_intc 3 &cpu1_intc 7
&cpu2_intc 3 &cpu2_intc 7
&cpu3_intc 3 &cpu3_intc 7
&cpu4_intc 3 &cpu4_intc 7
&cpu5_intc 3 &cpu5_intc 7
&cpu6_intc 3 &cpu6_intc 7
&cpu7_intc 3 &cpu7_intc 7
>;
reg = <0x0 0xE4000000 0x0 0x00010000>;
};
ccu: clock-controller@d4050000 {
compatible = "spacemit,k1x-ccu";
reg = <0x0 0xd4050000 0x0 0x209c>,
<0x0 0xd4282800 0x0 0x400>,
<0x0 0xd4015000 0x0 0x1000>,
<0x0 0xd4090000 0x0 0x1000>,
<0x0 0xd4282c00 0x0 0x400>,
<0x0 0xd8440000 0x0 0x98>,
<0x0 0xc0000000 0x0 0x4280>,
<0x0 0xf0610000 0x0 0x20>;
reg-names = "mpmu", "apmu", "apbc", "apbs", "ciu", "dciu", "ddrc", "apbc2";
clocks = <&vctcxo_24>, <&vctcxo_3>, <&vctcxo_1>, <&pll1_vco>,
<&clk_32k>, <&clk_dummy>;
clock-names = "vctcxo_24", "vctcxo_3", "vctcxo_1", "pll1_vco",
"clk_32k", "clk_dummy";
#clock-cells = <1>;
status = "okay";
};
reset: reset-controller@d4050000 {
compatible = "spacemit,k1x-reset";
reg = <0x0 0xd4050000 0x0 0x209c>,
<0x0 0xd4282800 0x0 0x400>,
<0x0 0xd4015000 0x0 0x1000>,
<0x0 0xd4090000 0x0 0x1000>,
<0x0 0xd4282c00 0x0 0x400>,
<0x0 0xd8440000 0x0 0x98>,
<0x0 0xc0000000 0x0 0x4280>,
<0x0 0xf0610000 0x0 0x20>;
reg-names = "mpmu", "apmu", "apbc", "apbs", "ciu", "dciu", "ddrc", "apbc2";
#reset-cells = <1>;
status = "okay";
};
intc: interrupt-controller@e0000000 {
#interrupt-cells = <1>;
compatible = "riscv,plic0";
interrupt-controller;
interrupts-extended = <
&cpu0_intc 11 &cpu0_intc 9
&cpu1_intc 11 &cpu1_intc 9
&cpu2_intc 11 &cpu2_intc 9
&cpu3_intc 11 &cpu3_intc 9
&cpu4_intc 11 &cpu4_intc 9
&cpu5_intc 11 &cpu5_intc 9
&cpu6_intc 11 &cpu6_intc 9
&cpu7_intc 11 &cpu7_intc 9
>;
reg = <0x0 0xE0000000 0x0 0x04000000>;
reg-names = "control";
riscv,max-priority = <7>;
riscv,ndev = <159>;
};
gpio: gpio@d4019000 {
compatible = "spacemit,k1x-gpio";
reg = <0x0 0xd4019000 0x0 0x800>;
gpio-controller;
gpio-count = <128>;
#gpio-cells = <2>;
interrupts = <58>;
clocks = <&ccu CLK_GPIO>;
interrupt-names = "gpio_mux";
interrupt-parent = <&intc>;
};
pinctrl: pinctrl@d401e000 {
compatible = "pinctrl-single";
reg = <0x0 0xd401e000 0x0 0x400>;
#address-cells = <1>;
#size-cells = <1>;
#pinctrl-cells = <2>;
#gpio-range-cells = <3>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xff77>;
range: gpio-range {
#pinctrl-single,gpio-range-cells = <3>;
};
};
pmu: power-management@0 {
compatible = "spacemit,k1x-pm-domain";
reg = <0x0 0xd4050000 0x0 0x3004>, <0x0 0xd4282800 0x0 0x400>;
#power-domain-cells = <1>;
};
uart0: uart@d4017000 {
compatible = "ns16550";
reg = <0x00000000 0xD4017000 0x00000000 0x00000100>;
reg-shift = <2>;
reg-io-width = <4>;
clock-frequency = <14000000>;
};
dramc: ddr@c0000000 {
compatible = "spacemit,ddr-ctl";
reg = <0x00000000 0xC0000000 0x00000000 0x00400000>;
};
eth0: ethernet@cac80000 {
compatible = "spacemit,k1x-emac";
reg = <0x00000000 0xCAC80000 0x00000000 0x00000420>;
ctrl-reg = <0x3e4>;
dline-reg = <0x3e8>;
clocks = <&ccu CLK_EMAC0_BUS>;
clock-names = "emac-clk";
resets = <&reset RESET_EMAC0>;
reset-names = "emac-reset";
status = "disabled";
};
udc: udc@c0900100 {
compatible = "spacemit,mv-udc";
reg = <0x0 0xc0900100 0x0 0x4000>;
interrupts = <105>;
interrupt-parent = <&intc>;
status = "disabled";
};
usbphy1: usbphy1@c09c0000 {
compatible = "spacemit,usb2-phy";
reg = <0x0 0xc09c0000 0x0 0x200>;
spacemit,phy-name = "mv-usb-phy";
spacemit,pll-lock-bypass;
clocks = <&ccu CLK_USB_P1>;
#phy-cells = <0>;
status = "disabled";
};
ehci1: ehci1@c0980100 {
compatible = "spacemit,mv-ehci";
reg = <0x0 0xc0980100 0x0 0x4000>;
interrupts = <118>;
interrupt-parent = <&intc>;
spacemit,ehci-name = "mv-ehci";
spacemit,otg-force-a-bus-req;
resets = <&reset RESET_USBP1_AXI>;
clocks = <&ccu CLK_USB_P1>;
phys = <&usbphy1>;
status = "disabled";
};
combphy: phy@c0b10000{
compatible = "spacemit,k1x-combphy";
reg = <0x0 0xc0b10000 0x0 0x800>,
<0x0 0xd4282910 0x0 0x400>;
reg-names = "puphy", "phy_sel";
resets = <&reset RESET_PCIE0>;
reset-names = "phy_rst";
#phy-cells = <1>;
status = "disabled";
};
usb2phy: usb2phy@0xc0a30000 {
compatible = "spacemit,usb2-phy";
reg = <0x0 0xc0a30000 0x0 0x200>;
spacemit,phy-name = "mv-usb-phy";
spacemit,pll-lock-bypass;
clocks = <&ccu CLK_USB30>;
#phy-cells = <0>;
status = "disabled";
};
usbdrd3: usb3@0 {
compatible = "spacemit,k1-x-dwc3";
#address-cells = <2>;
#size-cells = <2>;
resets = <&reset RESET_USB3_0>;
reset-names = "ctl_rst";
clocks = <&ccu CLK_USB30>;
clock-names = "usbdrd30";
interrupt-parent = <&intc>;
interrupts = <149>;
ranges;
status = "disabled";
dwc3@c0a00000 {
compatible = "snps,dwc3";
reg = <0x0 0xc0a00000 0x0 0x10000>;
interrupt-parent = <&intc>;
interrupts = <125>;
phys = <&combphy PHY_TYPE_USB3>, <&usb2phy>;
phy-names = "usb3-phy", "usb2-phy";
};
};
sdhci0: sdh@d4280000 {
compatible = "spacemit,k1-x-sdhci";
reg = <0x0 0xd4280000 0x0 0x200>;
interrupt-parent = <&intc>;
interrupts = <99>;
resets = <&reset RESET_SDH_AXI>,
<&reset RESET_SDH0>;
reset-names = "sdh_axi", "sdh0";
clocks = <&ccu CLK_SDH0>,
<&ccu CLK_SDH_AXI>;
clock-names = "sdh-io", "sdh-core";
status = "disabled";
};
sdhci1: sdh@d4280800 {
compatible = "spacemit,k1-x-sdhci";
reg = <0x0 0xd4280800 0x0 0x200>;
interrupt-parent = <&intc>;
interrupts = <100>;
resets = <&reset RESET_SDH_AXI>,
<&reset RESET_SDH1>;
reset-names = "sdh_axi", "sdh1";
clocks = <&ccu CLK_SDH1>,
<&ccu CLK_SDH_AXI>;
clock-names = "sdh-io", "sdh-core";
status = "disabled";
};
sdhci2: sdh@d4281000 {
compatible = "spacemit,k1-x-sdhci";
reg = <0x0 0xd4281000 0x0 0x200>;
interrupt-parent = <&intc>;
interrupts = <101>;
resets = <&reset RESET_SDH_AXI>,
<&reset RESET_SDH2>;
reset-names = "sdh_axi", "sdh2";
clocks = <&ccu CLK_SDH2>,
<&ccu CLK_SDH_AXI>;
clock-names = "sdh-io", "sdh-core";
status = "disabled";
};
i2c0: twsi0@d4010800 {
compatible = "spacemit,i2c";
reg = <0x0 0xd4010800 0x0 0x38>;
clocks = <&ccu CLK_TWSI0>;
resets = <&reset RESET_TWSI0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: twsi1@d4011000 {
compatible = "spacemit,i2c";
reg = <0x0 0xd4011000 0x0 0x38>;
clocks = <&ccu CLK_TWSI1>;
resets = <&reset RESET_TWSI1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: twsi2@d4012000 {
compatible = "spacemit,i2c";
reg = <0x0 0xd4012000 0x0 0x38>;
clocks = <&ccu CLK_TWSI2>;
resets = <&reset RESET_TWSI2>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: twsi3@f0614000 {
compatible = "spacemit,i2c";
reg = <0x0 0xf0614000 0x0 0x38>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c4: twsi4@d4012800 {
compatible = "spacemit,i2c";
reg = <0x0 0xd4012800 0x0 0x38>;
clocks = <&ccu CLK_TWSI4>;
resets = <&reset RESET_TWSI4>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c5: twsi5@d4013800 {
compatible = "spacemit,i2c";
reg = <0x0 0xd4013800 0x0 0x38>;
clocks = <&ccu CLK_TWSI5>;
resets = <&reset RESET_TWSI5>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c6: twsi6@d4018800 {
compatible = "spacemit,i2c";
reg = <0x0 0xd4018800 0x0 0x38>;
clocks = <&ccu CLK_TWSI6>;
resets = <&reset RESET_TWSI6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c7: twsi7@d401d000 {
compatible = "spacemit,i2c";
reg = <0x0 0xd401d000 0x0 0x38>;
clocks = <&ccu CLK_TWSI7>;
resets = <&reset RESET_TWSI7>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c8: twsi8@d401d800 {
compatible = "spacemit,i2c";
reg = <0x0 0xd401d800 0x0 0x38>;
clocks = <&ccu CLK_TWSI8>;
resets = <&reset RESET_TWSI8>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pwm0: pwm@d401a000 {
compatible = "spacemit,k1x-pwm";
reg = <0x0 0xd401a000 0x0 0x10>;
#pwm-cells = <2>;
clocks = <&ccu CLK_PWM0>;
resets = <&reset RESET_PWM0>;
k1x,pwm-disable-fd = <1>;
status = "disabled";
};
pwm1: pwm@d401a400 {
compatible = "spacemit,k1x-pwm";
reg = <0x0 0xd401a000 0x0 0x10>;
#pwm-cells = <2>;
clocks = <&ccu CLK_PWM0>;
resets = <&reset RESET_PWM0>;
k1x,pwm-disable-fd = <1>;
status = "disabled";
};
pwm14: pwm@d4021800 {
compatible = "spacemit,k1x-pwm";
reg = <0x0 0xd4021800 0x0 0x10>;
#pwm-cells = <2>;
clocks = <&ccu CLK_PWM14>;
resets = <&reset RESET_PWM14>;
k1x,pwm-disable-fd;
status = "disabled";
};
backlight: backlight {
compatible = "pwm-backlight";
brightness-levels = <0 4 8 16 32 64 100 128 255>;
status = "disabled";
};
pcie0_rc: pcie@ca000000 {
compatible = "k1x,dwc-pcie";
reg = <0x0 0xca000000 0x0 0x00001000>, /* dbi */
<0x0 0xca300000 0x0 0x0001ff24>, /* atu registers */
<0x0 0x80000000 0x0 0x00100000>, /* config space */
<0x0 0xd4282bcc 0x0 0x00000008>, /* k1x soc config addr */
<0x0 0xc0b20000 0x0 0x00001000>, /* phy ahb */
<0x0 0xc0b10000 0x0 0x00001000>, /* phy addr */
<0x0 0xd4282bcc 0x0 0x00000008>, /* conf0 addr */
<0x0 0xc0b10000 0x0 0x00001000>; /* phy0 addr */
reg-names = "dbi", "atu", "config", "k1x_conf", "phy_ahb", "phy_addr", "conf0_addr", "phy0_addr";
k1x,pcie-port = <0>;
clocks = <&ccu CLK_PCIE0>;
clock-names = "pcie-clk";
resets = <&reset RESET_PCIE0>;
reset-names = "pcie-reset";
bus-range = <0x00 0xff>;
max-link-speed = <2>;
num-lanes = <1>;
num-viewport = <8>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x81000000 0x0 0x80100000 0 0x80100000 0x0 0x100000>,
<0x82000000 0x0 0x80200000 0 0x80200000 0x0 0x0fe00000>;
interrupts = <141>, <145>;
interrupt-parent = <&intc>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0000 0 0 1 &pcie0_intc 1>, /* int_a */
<0000 0 0 2 &pcie0_intc 2>, /* int_b */
<0000 0 0 3 &pcie0_intc 3>, /* int_c */
<0000 0 0 4 &pcie0_intc 4>; /* int_d */
linux,pci-domain = <0>;
status = "disabled";
pcie0_intc: interrupt-controller@0 {
interrupt-controller;
reg = <0 0 0 0 0>;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
pcie1_rc: pcie@ca400000 {
compatible = "k1x,dwc-pcie";
reg = <0x0 0xca400000 0x0 0x00001000>, /* dbi */
<0x0 0xca700000 0x0 0x0001ff24>, /* atu registers */
<0x0 0x90000000 0x0 0x00100000>, /* config space */
<0x0 0xd4282bd4 0x0 0x00000008>, /* k1x soc config addr */
<0x0 0xc0c20000 0x0 0x00001000>, /* phy ahb */
<0x0 0xc0c10000 0x0 0x00001000>, /* phy addr */
<0x0 0xd4282bcc 0x0 0x00000008>, /* conf0 addr */
<0x0 0xc0b10000 0x0 0x00001000>; /* phy0 addr */
reg-names = "dbi", "atu", "config", "k1x_conf", "phy_ahb", "phy_addr", "conf0_addr", "phy0_addr";
k1x,pcie-port = <1>;
clocks = <&ccu CLK_PCIE1>;
clock-names = "pcie-clk";
resets = <&reset RESET_PCIE1>;
reset-names = "pcie-reset";
bus-range = <0x00 0xff>;
max-link-speed = <2>;
num-lanes = <2>;
num-viewport = <8>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x90100000 0 0x90100000 0x0 0x100000>,
<0x02000000 0x0 0x90200000 0 0x90200000 0x0 0x0fe00000>;
interrupts = <142>, <146>;
interrupt-parent = <&intc>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0000 0 0 1 &pcie1_intc 1>, /* int_a */
<0000 0 0 2 &pcie1_intc 2>, /* int_b */
<0000 0 0 3 &pcie1_intc 3>, /* int_c */
<0000 0 0 4 &pcie1_intc 4>; /* int_d */
linux,pci-domain = <1>;
status = "disabled";
pcie1_intc: interrupt-controller@0 {
interrupt-controller;
reg = <0 0 0 0 0>;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
pcie2_rc: pcie@ca800000 {
compatible = "k1x,dwc-pcie";
reg = <0x0 0xca800000 0x0 0x00001000>, /* dbi */
<0x0 0xcab00000 0x0 0x0001ff24>, /* atu registers */
<0x0 0xa0000000 0x0 0x00100000>, /* config space */
<0x0 0xd4282bdc 0x0 0x00000008>, /* k1x soc config addr */
<0x0 0xc0d20000 0x0 0x00001000>, /* phy ahb */
<0x0 0xc0d10000 0x0 0x00001000>, /* phy addr */
<0x0 0xd4282bcc 0x0 0x00000008>, /* conf0 addr */
<0x0 0xc0b10000 0x0 0x00001000>; /* phy0 addr */
reg-names = "dbi", "atu", "config", "k1x_conf", "phy_ahb", "phy_addr", "conf0_addr", "phy0_addr";
k1x,pcie-port = <2>;
clocks = <&ccu CLK_PCIE2>;
clock-names = "pcie-clk";
resets = <&reset RESET_PCIE2>;
reset-names = "pcie-reset";
bus-range = <0x00 0xff>;
max-link-speed = <2>;
num-lanes = <2>;
num-viewport = <8>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0xa0100000 0 0xa0100000 0x0 0x100000>,
<0x02000000 0x0 0xa0200000 0 0xa0200000 0x0 0x16000000>;
interrupts = <143>, <147>;
interrupt-parent = <&intc>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0000 0 0 1 &pcie2_intc 1>, /* int_a */
<0000 0 0 2 &pcie2_intc 2>, /* int_b */
<0000 0 0 3 &pcie2_intc 3>, /* int_c */
<0000 0 0 4 &pcie2_intc 4>; /* int_d */
linux,pci-domain = <2>;
status = "disabled";
pcie2_intc: interrupt-controller@0 {
interrupt-controller;
reg = <0 0 0 0 0>;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
spi0: spi0@d4026000 {
compatible = "spacemit,k1x-spi";
reg = <0x0 0xd4026000 0x0 0x30>;
clocks = <&ccu CLK_SSPA0>;
resets = <&reset RESET_SSPA0>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <26000000>;
port = <0>;
status = "disabled";
};
spi1: spi1@d4026800 {
compatible = "spacemit,k1x-spi";
reg = <0x0 0xd4026800 0x0 0x30>;
clocks = <&ccu CLK_SSPA1>;
resets = <&reset RESET_SSPA1>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <26000000>;
port = <1>;
status = "disabled";
};
spi2: spi2@f0613000 {
compatible = "spacemit,k1x-spi";
reg = <0x0 0xf0614000 0x0 0x30>;
clocks = <&ccu CLK_SEC_SSP2>;
resets = <&reset RESET_SEC_SSP2>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <26000000>;
port = <2>;
status = "disabled";
};
spi3: spi3@d401c000 {
compatible = "spacemit,k1x-spi";
reg = <0x0 0xd401c000 0x0 0x30>;
clocks = <&ccu CLK_SSP3>;
resets = <&reset RESET_SSP3>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <26000000>;
port = <3>;
status = "disabled";
};
qspi: spi@d420c000 {
compatible = "spacemit,k1x-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0xd420c000 0x0 0x1000>,
<0x0 0xb8000000 0x0 0xd00000>;
reg-names = "qspi-base", "qspi-mmap";
qspi-sfa1ad = <0xa00000>;
qspi-sfa2ad = <0xb00000>;
qspi-sfb1ad = <0xc00000>;
qspi-sfb2ad = <0xd00000>;
clocks = <&ccu CLK_QSPI>,
<&ccu CLK_QSPI_BUS>;
clock-names = "qspi_clk", "qspi_bus_clk";
resets = <&reset RESET_QSPI>,
<&reset RESET_QSPI_BUS>;
reset-names = "qspi_reset", "qspi_bus_reset";
qspi-pmuap-reg = <0xd4282860>;
spi-max-frequency = <26500000>;
qspi-id = <4>;
status = "disabled";
};
efuse: fuse@f0702800 {
compatible = "spacemit,k1x-efuse";
reg = <0x0 0xf0702800 0x0 0x400>;
resets = <&reset RESET_AES>;
reset-names = "aes_reset";
clocks = <&ccu CLK_AES>;
clock-names = "aes_core";
status = "disabled";
};
dpu: dpu@c0340000 {
compatible = "spacemit,dpu";
reg = <0x0 0xC0340000 0x0 0x2A000>,
<0x0 0xC0440000 0x0 0x2A000>;
reg-names = "dsi", "hdmi";
status = "disabled";
dpu_out: port {
#address-cells = <1>;
#size-cells = <0>;
dpu_out_dsi: endpoint@0 {
reg = <0>;
remote-endpoint = <&dsi_in_dpu>;
};
dpu_out_hdmi: endpoint@1 {
reg = <1>;
remote-endpoint = <&hdmi_in_dpu>;
};
};
};
mipi_dsi: mipi@d421a800 {
compatible = "spacemit,mipi-dsi";
reg = <0x0 0xD421A800 0 0x200>;
reg-names = "dsi";
clocks = <&ccu CLK_DPU_PXCLK>,
<&ccu CLK_DPU_MCLK>,
<&ccu CLK_DPU_HCLK>,
<&ccu CLK_DPU_ESC>,
<&ccu CLK_DPU_BIT>;
clock-names = "pxclk", "mclk", "hclk", "escclk", "bitclk";
resets = <&reset RESET_MIPI>,
<&reset RESET_LCD_MCLK>,
<&reset RESET_DSI_ESC>,
<&reset RESET_LCD>;
reset-names= "dsi_reset", "mclk_reset", "esc_reset", "lcd_reset";
power-domains = <&pmu K1X_PMU_LCD_PWR_DOMAIN>;
status = "disabled";
ports {
mipi_in: port {
#address-cells = <1>;
#size-cells = <0>;
dsi_in_dpu: endpoint@0 {
reg = <0>;
remote-endpoint = <&dpu_out_dsi>;
};
};
};
};
panel: panel {
compatible = "spacemit,panel";
status = "disabled";
};
hdmi: hdmi@c0400500 {
compatible = "spacemit,hdmi";
reg = <0x0 0xC0400500 0x0 0x200>;
reg-names = "hdmi";
clocks = <&ccu CLK_HDMI>;
clock-names = "hmclk";
resets = <&reset RESET_HDMI>;
reset-names= "hdmi_reset";
power-domains = <&pmu K1X_PMU_HDMI_PWR_DOMAIN>;
status = "disabled";
ports {
hdmi_in: port {
#address-cells = <1>;
#size-cells = <0>;
hdmi_in_dpu: endpoint@0 {
reg = <0>;
remote-endpoint = <&dpu_out_hdmi>;
};
};
};
};
shutdown_charging: charging {
compatible = "k1,shutdown-charging";
status = "disabled";
};
};
binman: binman {
multiple-images;
itb {
filename = "u-boot.itb";
fit {
description = "Configuration to load U-Boot";
#address-cells = <2>;
fit,fdt-list = "of-list";
images {
uboot {
description = "U-Boot";
type = "standalone";
os = "U-Boot";
arch = "riscv";
compression = "none";
load = <CONFIG_TEXT_BASE>;
uboot_blob: blob-ext {
filename = "u-boot-nodtb.bin";
};
};
@fdt-SEQ {
description = "NAME";
type = "flat_dt";
compression = "none";
};
};
configurations {
default = "conf-1";
@conf-SEQ {
description = "U-boot FIT config";
loadables = "uboot";
fdt = "fdt-SEQ";
};
};
};
};
};
pmu {
compatible = "riscv,pmu";
riscv,event-to-mhpmevent =
/* BRANCH_INSTRUCTIONS */
<0x00005 0x0 0x01>,
/* BRANCH_MISSES */
<0x00006 0x0 0x02>,
/* STALLED_CYCLES_FRONTEND */
<0x00008 0x0 0x03>,
/* STALLED_CYCLES_BACKEND */
<0x00009 0x0 0x04>,
/* L1D_READ_ACCESS */
<0x10000 0x0 0x06>,
/* L1D_READ_MISS */
<0x10001 0x0 0x05>,
/* L1D_WRITE_ACCESS */
<0x10002 0x0 0x0a>,
/* L1D_WRITE_MISS */
<0x10003 0x0 0x09>,
/* L1I_READ_ACCESS */
<0x10008 0x0 0x0c>,
/* L1I_READ_MISS */
<0x10009 0x0 0x0b>,
/* L1I_PREFETCH_ACCESS */
<0x1000c 0x0 0x0e>,
/* L1I_PREFETCH_MISS */
<0x1000d 0x0 0x0d>,
/* DTLB_READ_MISS */
<0x10019 0x0 0x15>,
/* DTLB_WRITE_MISS */
<0x1001b 0x0 0x19>,
/* ITLB_READ_MISS */
<0x10021 0x0 0x1b>;
/* 16 valid counters: mhpmcounter3 ~ mhpmcounter18 */
riscv,event-to-mhpmcounters =
<0x00005 0x00006 0x0007fff8>,
<0x00008 0x00009 0x0007fff8>,
<0x10000 0x10003 0x0007fff8>,
<0x10008 0x10009 0x0007fff8>,
<0x1000c 0x1000d 0x0007fff8>,
<0x10019 0x10019 0x0007fff8>,
<0x1001b 0x1001b 0x0007fff8>,
<0x10021 0x10021 0x0007fff8>;
riscv,raw-event-to-mhpmcounters =
/*
* For convenience, we treat 0x1~0xff as valid indexes,
* but actually in hardware the valid indexes are 0x1~0xbd.
*/
<0x0 0x0 0xffffffff 0xffffff00 0x0007fff8>;
};
watchdog:watchdog@D4080000 {
compatible = "spacemit,k1x-wdt";
reg = <0x0 0xD4080000 0x0 0x1000>,
<0x0 0xD4051020 0x0 0x4>;
clocks = <&ccu CLK_WDT>;
resets = <&reset RESET_WDT>;
status = "okay";
};
wdt_reboot {
compatible = "wdt-reboot";
status = "okay";
};
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "spacemit k1-x FusionOne board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb3hub:usb3hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 127 0>; /* gpio_97 for usb3 hub output vbus */
regulator-force-boot-off;
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_75 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_125 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_127 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
gpio80_pmx_func0: gpio80_pmx_func0 {
pinctrl-single,pins = <
K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4)) /* mmc cd */
>;
};
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 75 GPIO_75 1
&pinctrl 79 GPIO_79 1
&pinctrl 90 GPIO_90 1
&pinctrl 110 GPIO_110 1
&pinctrl 115 GPIO_115 2
&pinctrl 125 GPIO_125 1
&pinctrl 127 GPIO_127 1
>;
};
&udc {
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
cap-sd-highspeed;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "disabled";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "disabled";
};
&pcie2_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie2_4>;
status = "disabled";
};
&qspi {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "disabled";
};
};
&efuse {
status = "okay";
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "spacemit k1-x MINI-PC board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb3hub:usb3hub {
compatible = "spacemit,usb-hub";
hub-gpios = <
&gpio 123 0 /* usb3 hub en */
&gpio 124 0>; /* usb3 hub rst*/
vbus-gpios = <&gpio 97 0>; /* gpio_97 for usb3 hub output vbus */
regulator-force-boot-off;
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
status = "disabled";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
usbp1_vbus: usbp1_vbus {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
>;
};
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <8>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "M1-MUSE-BOOK";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb3hub: usb3hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 123 0>;
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&ccu {
pll2-freq = <2800000000>;
};
&uart0 {
status = "okay";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_2>;
clock-frequency = <100000>;
status = "okay";
lt8911exb_i2c@29 {
compatible = "lontium,lt8911exb";
reg = <0x29>;
status = "okay";
enable-gpios = <&gpio 83 0>;
bl-gpios = <&gpio 75 0>;
standby-gpios = <&gpio 92 0>;
reset-gpios = <&gpio 114 0>;
port {
lt8911exb_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
};
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usbphy1 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&pcie2_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie2_4>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "disabled";
};
&ldo_27 {
regulator-init-microvolt = <1200000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "okay";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <7>;
status = "okay";
};
&mipi_dsi {
bit-clk = <933000000>;
pix-clk = <142000000>;
status = "okay";
ports {
mipi_in: port {
#address-cells = <1>;
#size-cells = <0>;
dsi_out: endpoint@1 {
reg = <1>;
remote-endpoint = <&lt8911exb_in>;
};
};
};
};
&panel {
force-attached = "lt8911ext_edp_1080p";
backlight = <&backlight>;
status = "okay";
};
+286
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "spacemit k1-x MUSE-Card board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb2hub: usb2hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 123 0>; /* for usb2 hub output vbus */
status = "okay";
};
usb3hub: usb3hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 79 0>; /* gpio_79 for usb3 pwren */
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_0>;
status = "okay";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 1
&pinctrl 65 GPIO_65 3
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 79 GPIO_79 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usbphy1 {
status = "okay";
};
&ehci1 {
vbus-supply = <&usb2hub>;
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x8f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie0_rc {
status = "disabled";
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&panel {
dcp-gpios = <&gpio 40 0>;
dcn-gpios = <&gpio 83 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 41 0>;
status = "disabled";
};
+210
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "spacemit k1-x MUSE-N1 board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb3hub:usb3hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 127 0>; /* gpio_97 for usb3 hub output vbus */
regulator-force-boot-off;
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_75 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_125 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_127 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 75 GPIO_75 1
&pinctrl 79 GPIO_79 1
&pinctrl 90 GPIO_90 1
&pinctrl 110 GPIO_110 1
&pinctrl 115 GPIO_115 2
&pinctrl 125 GPIO_125 1
&pinctrl 127 GPIO_127 1
>;
};
&udc {
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "disabled";
};
&pcie2_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie2_4>;
status = "disabled";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
+275
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "MUSE-PAPER-MINI-4G";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb2hub: usb2hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 123 0>; /* for usb2 hub output vbus */
status = "disabled";
};
usb3hub: usb3hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 79 0>; /* gpio_79 for usb3 pwren */
status = "disabled";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "disabled";
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_0>;
status = "disabled";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 1
&pinctrl 65 GPIO_65 3
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 79 GPIO_79 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "disabled";
};
&usbphy1 {
status = "disabled";
};
&ehci1 {
vbus-supply = <&usb2hub>;
status = "disabled";
};
&usb2phy {
status = "disabled";
};
&combphy {
status = "disabled";
};
&usbdrd3 {
status = "disabled";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&ldo_27 {
regulator-init-microvolt = <1200000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo_33 {
regulator-init-microvolt = <1800000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&dpu {
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "okay";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "okay";
};
&mipi_dsi {
bit-clk = <500000000>;
pix-clk = <70000000>;
status = "okay";
};
&panel {
force-attached = "jd9365dah3";
dcp-gpios = <&gpio 34 0>;
dcn-gpios = <&gpio 42 0>;
avee-gpios = <&gpio 35 0>;
avdd-gpios = <&gpio 36 0>;
backlight = <&backlight>;
enable-gpios = <&gpio 31 0>;
reset-gpios = <&gpio 30 0>;
status = "okay";
};
+364
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@@ -0,0 +1,364 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "M1-MUSE-PAPER";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb2hub: usb2hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 123 0>; /* for usb2 hub output vbus */
status = "disabled";
};
usb3hub: usb3hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 79 0>; /* gpio_79 for usb3 pwren */
status = "disabled";
};
gpio_keys: gpio_keys {
compatible = "gpio-keys";
fastboot-key-combo = "volume-up";
fastboot-key-press-time = <2000>; /* in milliseconds */
volume-up-button {
label = "volume-up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&gpio 70 1>;
debounce-interval = <10>;
};
volume-down-button {
label = "volume-down";
linux,code = <KEY_VOLUMEDOWN>;
gpios = <&gpio 71 1>;
debounce-interval = <10>;
};
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4_2>;
status = "okay";
cw2015: cw2015@62 {
compatible = "spacemit,cw2015";
reg = <0x62>;
cellwise,battery-profile = /bits/ 8 <
0x17 0x67 0x73 0x69 0x68 0x65 0x64 0x55
0x75 0x60 0x4A 0x57 0x57 0x4E 0x42 0x3A
0x30 0x28 0x23 0x1E 0x23 0x35 0x46 0x4D
0x14 0x86 0x06 0x66 0x25 0x45 0x51 0x63
0x72 0x69 0x66 0x6B 0x3F 0x1B 0x78 0x39
0x0A 0x2F 0x1A 0x46 0x88 0x94 0x9B 0x12
0x3B 0x5F 0x9A 0xB6 0x80 0x57 0x7F 0xCB
0x2F 0x00 0x64 0xA5 0xB5 0xC1 0x46 0xAE
>;
status = "okay";
};
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_0>;
status = "disabled";
};
&i2c6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_0>;
status = "okay";
secsgm41515: sgm41515-2 {
compatible = "spacemit,sgm41515";
reg = <0x1a>;
ch-en-gpios = <&gpio 46 0>;
nqon-gpios = <&gpio 43 0>;
sgm41515-ichrg-uA = <1000000>;
sgm41515-vchrg-uV = <4350000>;
sgm41515-cur-input-uA = <2000000>;
status = "okay";
};
};
&i2c7 {
status = "disabled";
};
&i2c8 {
sgm41515: sgm41515 {
compatible = "spacemit,sgm41515";
reg = <0x1a>;
ch-en-gpios = <&gpio 117 0>;
nqon-gpios = <&gpio 115 0>;
sgm41515-ichrg-uA = <1000000>;
sgm41515-vchrg-uV = <4350000>;
sgm41515-cur-input-uA = <2000000>;
status = "okay";
};
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 1
&pinctrl 65 GPIO_65 3
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 79 GPIO_79 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "disabled";
};
&usbphy1 {
status = "disabled";
};
&ehci1 {
vbus-supply = <&usb2hub>;
status = "disabled";
};
&usb2phy {
status = "disabled";
};
&combphy {
status = "disabled";
};
&usbdrd3 {
status = "disabled";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&ldo_27 {
regulator-init-microvolt = <1200000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo_33 {
regulator-init-microvolt = <1800000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "okay";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <4>;
status = "okay";
};
&mipi_dsi {
status = "okay";
};
&panel {
force-attached = "icnl9951r";
dcp-gpios = <&gpio 34 0>;
dcn-gpios = <&gpio 42 0>;
avee-gpios = <&gpio 35 0>;
avdd-gpios = <&gpio 36 0>;
backlight = <&backlight>;
enable-gpios = <&gpio 31 0>;
reset-gpios = <&gpio 30 0>;
status = "okay";
};
&shutdown_charging {
electricity-meter = <&cw2015>;
power-domains = <&pmu K1X_PMU_WKUP_EVENT_PWR_DOMAIN>;
wk-name = "pwr_event", "pwr_int", "rtc_ctrl", "rtc_event", "rtc_irq", "sys-shutdown";
pwr_event = <&power_event>;
pwr_int = <&power_int>;
rtc_ctrl = <&rtc_ctrl>;
rtc_event = <&rtc_event>;
rtc_irq = <&rtc_irq>;
sys-shutdown = <&power_down>;
reboot-flag = <&reboot_flag>;
charge-light = <&gpio 75 0 &gpio 76 0>;
valid-level = <0>;
charger-name = "charger0", "charger1";
charger0 = <&sgm41515>;
charger1 = <&secsgm41515>;
status = "okay";
};
+360
View File
@@ -0,0 +1,360 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "M1-MUSE-PAPER";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb2hub: usb2hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 123 0>; /* for usb2 hub output vbus */
status = "disabled";
};
usb3hub: usb3hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 79 0>; /* gpio_79 for usb3 pwren */
status = "disabled";
};
gpio_keys: gpio_keys {
compatible = "gpio-keys";
fastboot-key-combo = "volume-up";
fastboot-key-press-time = <2000>; /* in milliseconds */
volume-up-button {
label = "volume-up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&gpio 70 1>;
debounce-interval = <10>;
};
volume-down-button {
label = "volume-down";
linux,code = <KEY_VOLUMEDOWN>;
gpios = <&gpio 71 1>;
debounce-interval = <10>;
};
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4_2>;
status = "disabled";
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_0>;
status = "disabled";
};
&i2c6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_0>;
status = "okay";
secsgm41515: sgm41515-2 {
compatible = "spacemit,sgm41515";
reg = <0x1a>;
ch-en-gpios = <&gpio 46 0>;
nqon-gpios = <&gpio 43 0>;
sgm41515-ichrg-uA = <1000000>;
sgm41515-vchrg-uV = <4350000>;
sgm41515-cur-input-uA = <2000000>;
status = "okay";
};
};
&i2c7 {
status = "disabled";
};
&i2c8 {
cw2015: cw2015@62 {
compatible = "spacemit,cw2015";
reg = <0x62>;
cellwise,battery-profile = /bits/ 8 <
0x17 0x67 0x73 0x69 0x68 0x65 0x64 0x55
0x75 0x60 0x4A 0x57 0x57 0x4E 0x42 0x3A
0x30 0x28 0x23 0x1E 0x23 0x35 0x46 0x4D
0x14 0x86 0x06 0x66 0x25 0x45 0x51 0x63
0x72 0x69 0x66 0x6B 0x3F 0x1B 0x78 0x39
0x0A 0x2F 0x1A 0x46 0x88 0x94 0x9B 0x12
0x3B 0x5F 0x9A 0xB6 0x80 0x57 0x7F 0xCB
0x2F 0x00 0x64 0xA5 0xB5 0xC1 0x46 0xAE
>;
status = "okay";
};
sgm41515: sgm41515 {
compatible = "spacemit,sgm41515";
reg = <0x1a>;
ch-en-gpios = <&gpio 117 0>;
nqon-gpios = <&gpio 115 0>;
sgm41515-ichrg-uA = <1000000>;
sgm41515-vchrg-uV = <4350000>;
sgm41515-cur-input-uA = <2000000>;
status = "okay";
};
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
gpio80_pmx_func0: gpio80_pmx_func0 {
pinctrl-single,pins = <
K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4)) /* mmc cd */
>;
};
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 1
&pinctrl 65 GPIO_65 3
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 79 GPIO_79 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "disabled";
};
&usbphy1 {
status = "disabled";
};
&ehci1 {
vbus-supply = <&usb2hub>;
status = "disabled";
};
&usb2phy {
status = "disabled";
};
&combphy {
status = "disabled";
};
&usbdrd3 {
status = "disabled";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cap-sd-highspeed;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&ldo_27 {
regulator-init-microvolt = <1200000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo_33 {
regulator-init-microvolt = <1800000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "okay";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <4>;
status = "okay";
};
&mipi_dsi {
status = "okay";
};
&panel {
force-attached = "icnl9951r";
dcp-gpios = <&gpio 34 0>;
dcn-gpios = <&gpio 42 0>;
avee-gpios = <&gpio 35 0>;
avdd-gpios = <&gpio 36 0>;
backlight = <&backlight>;
enable-gpios = <&gpio 31 0>;
reset-gpios = <&gpio 30 0>;
status = "okay";
};
&shutdown_charging {
electricity-meter = <&cw2015>;
power-domains = <&pmu K1X_PMU_WKUP_EVENT_PWR_DOMAIN>;
wk-name = "pwr_event", "pwr_int", "rtc_ctrl", "rtc_event", "rtc_irq", "sys-shutdown";
pwr_event = <&power_event>;
pwr_int = <&power_int>;
rtc_ctrl = <&rtc_ctrl>;
rtc_event = <&rtc_event>;
rtc_irq = <&rtc_irq>;
sys-shutdown = <&power_down>;
reboot-flag = <&reboot_flag>;
charge-light = <&gpio 75 0 &gpio 76 0>;
charger-name = "charger0", "charger1";
charger0 = <&sgm41515>;
charger1 = <&secsgm41515>;
status = "okay";
};
+301
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "spacemit k1-x MUSE-Pi board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb2hub: usb2hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 123 0>; /* for usb2 hub output vbus */
status = "okay";
};
usb3hub: usb3hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 79 0>; /* gpio_79 for usb3 pwren */
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
status = "disabled";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
usbp1_vbus: usbp1_vbus {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
>;
};
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 1
&pinctrl 65 GPIO_65 3
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 79 GPIO_79 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usbphy1 {
status = "okay";
};
&ehci1 {
vbus-supply = <&usb2hub>;
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x9f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie0_rc {
status = "disabled";
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};
+203
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "ZT001H";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "disabled";
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_0>;
status = "disabled";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 1
&pinctrl 65 GPIO_65 3
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 79 GPIO_79 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&ldo_27 {
regulator-init-microvolt = <1200000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo_33 {
regulator-init-microvolt = <1800000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&dpu {
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "okay";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "okay";
};
&mipi_dsi {
status = "okay";
};
&panel {
force-attached = "ft8201sinx101";
dcp-gpios = <&gpio 34 0>;
dcn-gpios = <&gpio 42 0>;
avee-gpios = <&gpio 35 0>;
avdd-gpios = <&gpio 36 0>;
backlight = <&backlight>;
enable-gpios = <&gpio 31 0>;
reset-gpios = <&gpio 30 0>;
status = "okay";
};
+295
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "spacemit k1-x baton-camera board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb2hub: usb2hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 123 0>; /* for usb2 hub output vbus */
status = "okay";
};
usb3hub: usb3hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 79 0>; /* gpio_79 for usb3 pwren */
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_0>;
status = "okay";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
gpio80_pmx_func0: gpio80_pmx_func0 {
pinctrl-single,pins = <
K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4)) /* mmc cd */
>;
};
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 1
&pinctrl 65 GPIO_65 3
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 79 GPIO_79 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usbphy1 {
status = "okay";
};
&ehci1 {
vbus-supply = <&usb2hub>;
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cap-sd-highspeed;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "disabled";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie0_rc {
status = "disabled";
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "disabled";
};
&qspi {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "disabled";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "disabled";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&panel {
dcp-gpios = <&gpio 40 0>;
dcn-gpios = <&gpio 83 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 41 0>;
status = "disabled";
};
+287
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "spacemit k1-x deb1 board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb3hub:usb3hub {
compatible = "spacemit,usb-hub";
hub-gpios = <
&gpio 123 0 /* usb3 hub en */
&gpio 124 0>; /* usb3 hub rst*/
vbus-gpios = <&gpio 97 0>; /* gpio_97 for usb3 hub output vbus */
regulator-force-boot-off;
vbus_delay_ms = <250>;
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
status = "disabled";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range DVL1 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
usbp1_vbus: usbp1_vbus {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
>;
};
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x5f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie0_rc {
status = "disabled";
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_pm853.dtsi"
/ {
model = "spacemit k1-x deb2 board";
aliases {
efuse_power = &ldo_15;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb3hub:usb3hub {
compatible = "spacemit,usb-hub";
hub-gpios = <
&gpio 123 0 /* usb3 hub en */
&gpio 124 0>; /* usb3 hub rst*/
vbus-gpios = <&gpio 97 0>; /* gpio_97 for usb3 hub output vbus */
regulator-force-boot-off;
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
status = "disabled";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
usbp1_vbus: usbp1_vbus {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
>;
};
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&ldo_4>;
vqmmc-supply = <&ldo_9>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie0_rc {
status = "disabled";
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};
+264
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_pm853.dtsi"
/ {
model = "spacemit k1-x evb board";
aliases {
efuse_power = &ldo_15;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
status = "disabled";
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
status = "disabled";
};
&i2c6 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
bus = <6>;
#address-cells = <1>;
#size-cells = <1>;
status = "okay";
};
};
&i2c7 {
status = "disabled";
};
&pinctrl {
usbp1_vbus: usbp1_vbus {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
>;
};
};
&udc {
status = "okay";
};
&usbphy1 {
status = "disabled";
};
&ehci1 {
pinctrl-names = "default";
pinctrl-0 = <&usbp1_vbus>;
status = "disabled";
};
&usbdrd3 {
status = "disabled";
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&ldo_4>;
vqmmc-supply = <&ldo_9>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <44>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie0_rc {
status = "disabled";
};
&pcie1_rc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_0>;
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
&ldo_13 {
regulator-init-microvolt = <2800000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo_15 {
regulator-init-microvolt = <1800000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo_17 {
regulator-init-microvolt = <1200000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1_2>;
status = "disabled";
};
&backlight {
pwms = <&pwm1 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&panel {
dcp-gpios = <&gpio 21 0>;
dcn-gpios = <&gpio 22 0>;
bl-gpios = <&gpio 23 0>;
reset-gpios = <&gpio 24 0>;
status = "disabled";
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_pm853.dtsi"
/ {
model = "spacemit k1-x hs450 board";
aliases {
efuse_power = &ldo_15;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
status = "okay";
};
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 74 GPIO_74 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 4
&pinctrl 123 GPIO_123 1
&pinctrl 125 GPIO_125 3
>;
};
&udc {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&ldo_4>;
vqmmc-supply = <&ldo_9>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "spacemit k1-x kx312 board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&ccu {
pll2-freq = <2800000000>;
};
&uart0 {
status = "okay";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_2>;
clock-frequency = <100000>;
status = "okay";
lt8911exb_i2c@29 {
compatible = "lontium,lt8911exb";
reg = <0x29>;
status = "okay";
enable-gpios = <&gpio 83 0>;
bl-gpios = <&gpio 75 0>;
standby-gpios = <&gpio 92 0>;
reset-gpios = <&gpio 114 0>;
port {
lt8911exb_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
};
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usb2phy {
status = "okay";
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&pcie2_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie2_4>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "disabled";
};
&ldo_27 {
regulator-init-microvolt = <1200000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "okay";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <7>;
status = "okay";
};
&mipi_dsi {
bit-clk = <933000000>;
pix-clk = <142000000>;
status = "okay";
ports {
mipi_in: port {
#address-cells = <1>;
#size-cells = <0>;
dsi_out: endpoint@1 {
reg = <1>;
remote-endpoint = <&lt8911exb_in>;
};
};
};
};
&panel {
force-attached = "lt8911ext_edp_1080p";
backlight = <&backlight>;
status = "okay";
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "SiPEED LPi3A board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb3hub:usb3hub {
compatible = "spacemit,usb-hub";
hub-gpios = <
&gpio 123 0 /* usb3 hub en */
&gpio 124 0>; /* usb3 hub rst*/
vbus-gpios = <&gpio 97 0>; /* gpio_97 for usb3 hub output vbus */
regulator-force-boot-off;
vbus_delay_ms = <250>;
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
status = "disabled";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range DVL1 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
usbp1_vbus: usbp1_vbus {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
>;
};
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie0_rc {
status = "disabled";
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "Milk-V Jupiter";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb3hub:usb3hub {
compatible = "spacemit,usb-hub";
hub-gpios = <
&gpio 123 0 /* usb3 hub en */
&gpio 124 0>; /* usb3 hub rst*/
vbus-gpios = <&gpio 97 0>; /* gpio_97 for usb3 hub output vbus */
regulator-force-boot-off;
vbus_delay_ms = <250>;
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c04";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
status = "disabled";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range DVL1 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
usbp1_vbus: usbp1_vbus {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
>;
};
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie0_rc {
status = "disabled";
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <8>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};
+218
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "spacemit k1-x mingo board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb3hub:usb3hub {
compatible = "spacemit,usb-hub";
hub-gpios = <
&gpio 123 0 /* usb3 hub en */
&gpio 124 0>; /* usb3 hub rst*/
vbus-gpios = <&gpio 97 0>; /* gpio_97 for usb3 hub output vbus */
regulator-force-boot-off;
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
+302
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "spacemit k1-x orangepi-rv2 board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb2hub: usb2hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 123 0>; /* for usb2 hub output vbus */
status = "okay";
};
usb3hub: usb3hub {
compatible = "spacemit,usb-hub";
vbus-gpios = <&gpio 79 0>; /* gpio_79 for usb3 pwren */
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
status = "disabled";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
usbp1_vbus: usbp1_vbus {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
>;
};
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 1
&pinctrl 65 GPIO_65 3
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 79 GPIO_79 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usbphy1 {
status = "okay";
};
&ehci1 {
vbus-supply = <&usb2hub>;
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x9f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie0_rc {
status = "disabled";
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
&i2c8 {
clock-frequency = <100000>;
u-boot,dm-spl;
status = "okay";
pm853: pmic@31 {
compatible = "spacemit,pm853";
reg = <0x31>;
bus = <8>;
u-boot,dm-spl;
regulators {
/* buck */
dcdc_1: DCDC_REG1 {
regulator-name = "dcdc1";
regulator-min-microvolt = <480000>;
regulator-max-microvolt = <3160000>;
regulator-init-microvolt = <1050000>;
regulator-boot-on;
u-boot,dm-spl;
regulator-state-mem {
regulator-off-in-suspend;
};
};
dcdc_2: DCDC_REG2 {
regulator-name = "dcdc2";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <3950000>;
};
dcdc_3: DCDC_REG3 {
regulator-name = "dcdc3";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <3950000>;
};
/**
* the order of powering on
* 1. dcdc5
* 2. ldo19
* 3. dcdc4
* 4. ldo4
* 5. ldo9
*/
dcdc_5: DCDC_REG5 {
regulator-name = "dcdc5";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <3950000>;
regulator-boot-on;
u-boot,dm-spl;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_19: LDO_REG19 {
regulator-name = "ldo19";
regulator-min-microvolt = <100000>;
regulator-max-microvolt = <1350000>;
regulator-boot-on;
u-boot,dm-spl;
regulator-state-mem {
regulator-off-in-suspend;
};
};
dcdc_4: DCDC_REG4 {
regulator-name = "dcdc4";
regulator-min-microvolt = <480000>;
regulator-max-microvolt = <3160000>;
regulator-init-microvolt = <650000>;
regulator-boot-on;
u-boot,dm-spl;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_4: LDO_REG4 {
regulator-name = "ldo4";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
regulator-init-microvolt = <3300000>;
regulator-boot-on;
u-boot,dm-spl;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_9: LDO_REG9 {
regulator-name = "ldo9";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
regulator-init-microvolt = <3300000>;
regulator-boot-on;
u-boot,dm-spl;
regulator-state-mem {
regulator-off-in-suspend;
};
};
/* ldo */
ldo_1: LDO_REG1 {
regulator-name = "ldo1";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
};
ldo_2: LDO_REG2 {
regulator-name = "ldo2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
};
ldo_3: LDO_REG3 {
regulator-name = "ldo3";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
};
ldo_5: LDO_REG5 {
regulator-name = "ldo5";
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <1900000>;
};
ldo_6: LDO_REG6 {
regulator-name = "ldo6";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
};
ldo_7: LDO_REG7 {
regulator-name = "ldo7";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1950000>;
};
ldo_8: LDO_REG8 {
regulator-name = "ldo8";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
};
ldo_10: LDO_REG10 {
regulator-name = "ldo10";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
};
ldo_11: LDO_REG11 {
regulator-name = "ldo11";
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1950000>;
u-boot,dm-spl;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_12: LDO_REG12 {
regulator-name = "ldo12";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
};
ldo_13: LDO_REG13 {
regulator-name = "ldo13";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
};
ldo_14: LDO_REG14 {
regulator-name = "ldo14";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
};
ldo_15: LDO_REG15 {
regulator-name = "ldo15";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1950000>;
};
ldo_16: LDO_REG16 {
regulator-name = "ldo16";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3300000>;
};
ldo_17: LDO_REG17 {
regulator-name = "ldo17";
regulator-min-microvolt = <100000>;
regulator-max-microvolt = <1350000>;
};
ldo_18: LDO_REG18 {
regulator-name = "ldo18";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1950000>;
};
ldo_20: LDO_REG20 {
regulator-name = "ldo20";
regulator-min-microvolt = <100000>;
regulator-max-microvolt = <1350000>;
};
ldo_21: LDO_REG21 {
regulator-name = "ldo21";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1950000>;
};
ldo_22: LDO_REG22 {
regulator-name = "ldo22";
regulator-min-microvolt = <100000>;
regulator-max-microvolt = <1350000>;
};
sw_1: SWITCH_REG1 {
regulator-name = "switch1";
};
};
};
sy8810l: sy8810l@70 {
compatible = "spacemit,sy8810l";
reg = <0x70>;
bus = <8>;
u-boot,dm-spl;
regulators {
u-boot,dm-spl;
edcdc_1: EDCDC_REG1 {
regulator-name = "edcdc1";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1500000>;
regulator-init-microvolt = <1050000>;
regulator-boot-on;
u-boot,dm-spl;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
#include "k1-x_pm853.dtsi"
/ {
model = "spacemit k1-x spl";
chosen {
stdout-path = "serial0:115200n8";
u-boot,dm-spl;
};
};
&cpus {
timebase-frequency = <24000000>;
u-boot,dm-spl;
cpu@0 {
/* boot frequency for cluster-0, should be 1600000, 1228000, 819000, or 614000 */
boot_freq_cluster0 = <1600000>;
/* boot frequency for cluster-1, should be 1600000, 1228000, 819000, or 614000 */
boot_freq_cluster1 = <1600000>;
u-boot,dm-spl;
};
};
&clocks {
u-boot,dm-spl;
vctcxo_24 {
u-boot,dm-spl;
};
vctcxo_3 {
u-boot,dm-spl;
};
vctcxo_1 {
u-boot,dm-spl;
};
pll1_vco {
u-boot,dm-spl;
};
clk_32k {
u-boot,dm-spl;
};
clk_dummy {
u-boot,dm-spl;
};
};
&soc {
u-boot,dm-spl;
clock-controller@d4050000 {
status = "okay";
u-boot,dm-spl;
};
reset-controller@d4050000 {
status = "okay";
u-boot,dm-spl;
};
uart@d4017000 {
status = "okay";
u-boot,dm-spl;
};
ddr@c0000000 {
/* dram data rate, should be 1200, 1600, or 2400 */
datarate = <2400>;
cs-num = <2>;
type = "LPDDR4X";
u-boot,dm-spl;
};
sdh@d4280000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
bus-width = <4>;
cap-sd-highspeed;
sdh-phy-module = <0>;
status = "okay";
u-boot,dm-spl;
};
/* eMMC */
sdh@d4281000 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
status = "okay";
u-boot,dm-spl;
};
spi@d420c000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
u-boot,dm-spl;
spi-max-frequency = <15140000>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
u-boot,dm-spl;
status = "okay";
};
};
fuse@f0702800 {
status = "okay";
u-boot,dm-spl;
};
};
&pinctrl {
usbp1_vbus: usbp1_vbus {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
>;
};
gpio80_pmx_func0: gpio80_pmx_func0 {
pinctrl-single,pins = <
K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4)) /* mmc cd */
>;
};
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
&i2c8 {
clock-frequency = <100000>;
u-boot,dm-spl;
status = "okay";
spm8821: pmic@41 {
compatible = "spacemit,spm8821";
reg = <0x41>;
bus = <8>;
u-boot,dm-spl;
regulators {
/* buck */
dcdc_6: DCDC_REG1 {
regulator-name = "dcdc1";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3450000>;
regulator-init-microvolt = <1050000>;
regulator-boot-on;
u-boot,dm-spl;
regulator-state-mem {
regulator-suspend-microvolt = <650000>;
};
};
dcdc_7: DCDC_REG2 {
regulator-name = "dcdc2";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3450000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
dcdc_8: DCDC_REG3 {
regulator-name = "dcdc3";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3450000>;
regulator-boot-on;
u-boot,dm-spl;
regulator-state-mem {
regulator-off-in-suspend;
};
};
dcdc_9: DCDC_REG4 {
regulator-name = "dcdc4";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3450000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
dcdc_10: DCDC_REG5 {
regulator-name = "dcdc5";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3450000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
dcdc_11: DCDC_REG6 {
regulator-name = "dcdc6";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3450000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
/* aldo */
ldo_23: LDO_REG1 {
regulator-name = "ldo1";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-init-microvolt = <3300000>;
regulator-boot-on;
u-boot,dm-spl;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_24: LDO_REG2 {
regulator-name = "ldo2";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_25: LDO_REG3 {
regulator-name = "ldo3";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_26: LDO_REG4 {
regulator-name = "ldo4";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
/* dldo */
ldo_27: LDO_REG5 {
regulator-name = "ldo5";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_28: LDO_REG6 {
regulator-name = "ldo6";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_29: LDO_REG7 {
regulator-name = "ldo7";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_30: LDO_REG8 {
regulator-name = "ldo8";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_31: LDO_REG9 {
regulator-name = "ldo9";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_32: LDO_REG10 {
regulator-name = "ldo10";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo_33: LDO_REG11 {
regulator-name = "ldo11";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <3400000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
sw_2: SWITCH_REG1 {
regulator-name = "switch1";
};
power_event: SWITCH_REG2 {
regulator-name = "pwr-event";
};
power_int: SWITCH_REG3 {
regulator-name = "pwr-int";
};
rtc_ctrl: SWITCH_REG4 {
regulator-name = "rtc-ctrl";
};
rtc_event: SWITCH_REG5 {
regulator-name = "rtc-event";
};
rtc_irq: SWITCH_REG6 {
regulator-name = "rtc-irq";
};
power_down: SWITCH_REG7 {
regulator-name = "power-down";
};
reboot_flag: SWITCH_REG8 {
regulator-name = "reboot-flag";
};
wdt_pm8821: PMIC_WDT {
wdt-name = "wdt_pm8821";
};
};
};
};
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2023 Spacemit, Inc */
/dts-v1/;
#include "k1-x.dtsi"
#include "k1-x_pinctrl.dtsi"
#include "k1-x_spm8821.dtsi"
/ {
model = "SiPEED LPi3A board";
aliases {
efuse_power = &ldo_31;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
chosen {
bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
stdout-path = "serial0:115200n8";
};
usb3hub:usb3hub {
compatible = "spacemit,usb-hub";
hub-gpios = <
&gpio 123 0 /* usb3 hub en */
&gpio 124 0>; /* usb3 hub rst*/
vbus-gpios = <&gpio 97 0>; /* gpio_97 for usb3 hub output vbus */
regulator-force-boot-off;
vbus_delay_ms = <250>;
status = "okay";
};
};
&cpus {
timebase-frequency = <24000000>;
};
&uart0 {
status = "okay";
};
&i2c0 {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_0>;
status = "okay";
eeprom@50{
compatible = "atmel,24c02";
reg = <0x50>;
vin-supply-names = "eeprom_1v8";
status = "okay";
};
};
&i2c3 {
status = "disabled";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
};
&i2c5 {
status = "disabled";
};
&i2c6 {
status = "disabled";
};
&i2c7 {
status = "disabled";
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_58 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_63 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_66 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
&range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range DVL0 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range DVL1 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
>;
usbp1_vbus: usbp1_vbus {
pinctrl-single,pins =<
K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2)) /* drive_vbus1_iso */
>;
};
};
&gpio{
gpio-ranges = <
&pinctrl 49 GPIO_49 2
&pinctrl 58 GPIO_58 1
&pinctrl 63 GPIO_63 5
&pinctrl 70 PRI_TDI 4
&pinctrl 74 GPIO_74 1
&pinctrl 80 GPIO_80 4
&pinctrl 90 GPIO_90 3
&pinctrl 96 DVL0 2
&pinctrl 110 GPIO_110 1
&pinctrl 114 GPIO_114 3
&pinctrl 123 GPIO_123 5
>;
};
&udc {
status = "okay";
};
&usb2phy {
status = "okay";
};
&combphy {
status = "okay";
};
&usbdrd3 {
status = "okay";
vbus-supply = <&usb3hub>;
dwc3@c0a00000 {
dr_mode = "host";
phy_type = "utmi";
snps,dis_enblslpm_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
};
};
&sdhci0 {
pinctrl-names = "default","fast";
pinctrl-0 = <&pinctrl_mmc1>;
pinctrl-1 = <&pinctrl_mmc1_fast>;
bus-width = <4>;
cd-gpios = <&gpio 80 0>;
cd-inverted;
vmmc-supply = <&dcdc_9>;
vqmmc-supply = <&ldo_23>;
spacemit,aib_mmc1_io_reg = <0xD401E81C>;
spacemit,apbc_asfar_reg = <0xD4015050>;
spacemit,apbc_assar_reg = <0xD4015054>;
spacemit,rx_dline_reg = <0x0>;
spacemit,tx_dline_reg = <0x0>;
spacemit,tx_delaycode = <0x7f>;
spacemit,rx_tuning_limit = <50>;
sdh-phy-module = <0>;
clk-src-freq = <204800000>;
status = "okay";
};
/* eMMC */
&sdhci2 {
bus-width = <8>;
non-removable;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
sdh-phy-module = <1>;
clk-src-freq = <375000000>;
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0>;
phy-reset-pin = <110>;
clk_tuning_enable;
clk-tuning-by-delayline;
tx-phase = <90>;
rx-phase = <73>;
phy-mode = "rgmii";
phy-addr = <1>;
phy-handle = <&rgmii>;
ref-clock-from-phy;
mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
rgmii: phy@0 {
compatible = "ethernet-phy-id001c.c916";
device_type = "ethernet-phy";
reg = <0x1>;
};
};
};
&pcie0_rc {
status = "disabled";
};
&pcie1_rc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1_3>;
status = "okay";
};
&qspi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <26500000>;
m25p,fast-read;
broken-flash-reset;
status = "okay";
};
};
&efuse {
status = "okay";
};
&dpu {
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_0>;
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};