riscv: dts: k3: add bootph-all to clock nodes

Add `bootph-all` to the clock controller related nodes so the
required clock data is available during early boot.

Signed-off-by: Chuan <fjchuanil@gmail.com>

arch/riscv/dts/k3-spacemit-deb1.dts

@@ -26,17 +26,3 @@
 	pinctrl-0 = <&pinctrl_uart0_0>;
 	status = "okay";
 };
-
-&qspi0 {
-	status = "okay";
-
-	flash@0 {
-        bootph-all;
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <26500000>;
-		m25p,fast-read;
-		broken-flash-reset;
-		status = "okay";
-	};
-};

arch/riscv/dts/k3.dtsi

@@ -123,20 +123,6 @@
 			clock-frequency = <14745600>;
 			status = "disabled";
 		};
-
- 		qspi0: qspi@d420c000 {
- 			bootph-all;
- 			compatible = "spacemit,k3-qspi";
- 			#address-cells = <1>;
- 			#size-cells = <0>;
- 			reg = <0x0 0xd420c000 0x0 0x1000>,
- 			      <0x0 0xb8000000 0x0 0xc00000>;
- 			reg-names = "QuadSPI", "QuadSPI-memory";
-			spi-max-frequency = <26500000>;
- 			clock-names = "qspi_en", "qspi";
-			clocks = <&ccu CLK_QSPI>, <&ccu CLK_QSPI_BUS>;
- 			status = "disabled";
- 		};
 	};
 
 };

board/spacemit/k3-generic/Kconfig

@@ -31,12 +31,5 @@ config BOARD_SPECIFIC_OPTIONS
 	def_bool y
 	select SPACEMIT_K3
 	select HAS_CUSTOM_SYS_INIT_SP_ADDR
- 	imply SPI
- 	imply SPL_SPI
- 	imply SPL_DM_SPI
- 	imply SPL_SPI_FLASH_SUPPORT
- 	imply SPL_DM_SPI_FLASH
- 	imply SPL_SPI_LOAD
- 	imply FSL_QSPI
 
 endif

drivers/spi/fsl_qspi.c

@@ -38,7 +38,6 @@
 #include <linux/sizes.h>
 #include <linux/err.h>
 #include <asm/io.h>
-#include <clk.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -268,21 +267,10 @@ static const struct fsl_qspi_devtype_data ls2080a_data = {
 	.little_endian = true,
 };
 
-static const struct fsl_qspi_devtype_data spacemit_k3_data = {
-	.rxfifo = SZ_128,
-	.txfifo = SZ_256,
-	.ahb_buf_size = SZ_512,
-	.quirks = 0,
-	.little_endian = true,
-};
 struct fsl_qspi {
 	struct udevice *dev;
 	void __iomem *iobase;
 	void __iomem *ahb_addr;
-#if CONFIG_IS_ENABLED(CLK)
-	struct clk clk_en;
-	struct clk clk;
-#endif
 	u32 memmap_phy;
 	u32 memmap_size;
 	const struct fsl_qspi_devtype_data *devtype_data;
@@ -832,21 +820,7 @@ static int fsl_qspi_probe(struct udevice *bus)
 
 	dm_bus->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
 					66000000);
-#if CONFIG_IS_ENABLED(CLK)
-	ret = clk_get_by_name(bus, "qspi_en", &q->clk_en);
-	if (ret) {
-		dev_err(bus, "cannot find qspi_en clock\n");
-		return ret;
-	}
-	ret = clk_get_by_name(bus, "qspi", &q->clk);
-	if (ret) {
-		dev_err(bus, "cannot find qspi clock\n");
-		return ret;
-	}
 
-	clk_enable(&q->clk_en);
-	clk_enable(&q->clk);
-#endif
 	fsl_qspi_default_setup(q);
 
 	return 0;
@@ -896,7 +870,6 @@ static const struct udevice_id fsl_qspi_ids[] = {
 	{ .compatible = "fsl,ls1021a-qspi", .data = (ulong)&ls1021a_data, },
 	{ .compatible = "fsl,ls1088a-qspi", .data = (ulong)&ls2080a_data, },
 	{ .compatible = "fsl,ls2080a-qspi", .data = (ulong)&ls2080a_data, },
-	{ .compatible = "spacemit,k3-qspi", .data = (ulong)&spacemit_k3_data, },
 	{ }
 };