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<p class="blog_detail__date">19 Mar, 2020</p>
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<p>Worldwide IT spending is projected to total $3.9 trillion in 2020, an increase of 3.4% from 2019, according to the latest forecast by Gartner, Inc<sup>[<a href="https://www.gartner.com/en/newsroom/press-releases/2020-01-15-gartner-says-global-it-spending-to-reach-3point9-trillion-in-2020" target="_blank">1</a>]</sup>. Software to be the fastest-growing major market this year, reaching double-digit growth at 10.5%. The Database Reference Stack (DBRS) optimized for Intel ® Optane ™ persistent memory, streamlines your computing experience by combining storage capacity and intelligent system acceleration<sup>[<a href="https://www.intel.com/content/www/us/en/architecture-and-technology/optane-memory.html">2</a>]</sup>.</p>
<p>Intel understands how complex it is to create and deploy applications for database workloads. That’s why we <a href="31420.html">developed</a> an integrated Database Reference Stack (DBRS) for<a href="https://www.intel.com/content/www/us/en/architecture-and-technology/optane-dc-persistent-memory.html" target="_blank"> Intel® Optane™ PMem</a>, delivered with second-generation Intel® Xeon® Scalable processors, to speed development and deployment.</p>
<p>We’re pleased to announce the Database Reference Stack v2.0 release, incorporating customer feedback and delivering an enhanced user experience with support for expanded use cases. This release incorporates enhancements of Memcached*, a free and open source, high-performance, distributed memory object caching system, generic in nature, but designed to speed dynamic web applications by alleviating database load<sup>[<a href="https://memcached.org/">3</a>]</sup>.</p>
<p>As with previous releases, we are releasing the Database Reference Stack early in the development cycle. This allows the community and Cloud Service Providers (CSPs) to try the stack and share feedback with Intel Corporation, which will help us deliver further refinements and expanded uses. The stack can be used in single-node architecture, providing choice for developers, based on the workloads they run.</p>
<p><strong>Architectural diagram of the Database Reference Stack, with Memcached* as follows:</strong></p>
<p><strong><img alt="DBRS_Cassandra_Single-v2" data-entity-type="" data-entity-uuid="" src="https://clearlinux.org/sites/default/files/DBRSv2-single_node.png" /></strong></p>
<p>This release incorporates the latest versions of leading developer tools and frameworks:</p>
<ul><li>Operating Systems:
<ul><li><a href="https://clearlinux.org/">Clear Linux* OS,</a> an open source Linux distribution optimized for Intel platforms.</li>
<li><a href="https://www.centos.org/">CentOS</a>*, an open source Linux distribution. </li>
</ul></li>
<li>Databases:
<ul><li><a href="https://github.com/memcached/memcached/wiki/ReleaseNotes1518">Memcached</a>, an in-memory key-value store for small chunks of arbitrary data from results of database calls, API calls, or page rendering. Memcached doesn't require a storage engine library because it implements its own memory allocation strategy called “slab” allocation. This feature aims to overcome memory fragmentation issues and memory management. For more information visit the Memcached <a href="https://github.com/memcached/memcached/wiki/UserInternals">GitHub page</a>.</li>
</ul></li>
<li>Containers: Docker* Containers and Kata Containers* with Intel® Virtualization (Intel® VT) Technology for enhanced protection.</li>
<li>Libraries:
<ul><li><a href="https://github.com/libevent/libevent">Libevent</a>, a software library that provides asynchronous event notification. The libevent API provides a mechanism to execute a callback function when a specific event occurs on a file descriptor or after a timeout has been reached. Libevent also supports callbacks triggered by signals and regular timeouts.</li>
</ul></li>
<li>Persistent Memory modes -- fsdax mode: Persistent memory can be configured <a href="https://docs.pmem.io/ndctl-users-guide/managing-namespaces#creating-namespaces">in fsdax mode for an application to use</a> with the Database Reference Stack.</li>
</ul><p>Visit the <a href="https://github.com/memcached/memcached/wiki/Overview#servers-are-disconnected-from-each-other">Memcached Design Philosophy</a> GitHub page to learn more.</p>
<p>Multiple layers of the Database Reference Stack are performance-tuned for Intel Architecture (IA), offering significant advantages over other stacks.</p>
<p><strong>Performance gains for the Database Reference Stack, with Memcached, single node, on 2nd Generation Intel® Xeon® Platinum 8280L with Intel® Optane™ PMem show the following:</strong></p>
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<p><span><span><span><span><span lang="EN" xml:lang="EN" xml:lang="EN"><span><span>For more complete information about performance and benchmark results, visit </span></span></span><span lang="EN" xml:lang="EN" xml:lang="EN"><a href="http://www.intel.com/benchmarks"><span><span><span>www.intel.com/benchmarks</span></span></span></a></span><span lang="EN" xml:lang="EN" xml:lang="EN"><span><span>.  Refer to </span></span></span><span lang="EN" xml:lang="EN" xml:lang="EN"><a href="http://software.intel.com/en-us/articles/optimization-notice"><span><span><span>http://software.intel.com/en-us/articles/optimization-notice</span></span></span></a></span><span lang="EN" xml:lang="EN" xml:lang="EN"><span><span> for more information regarding performance and optimization choices in Intel software products.</span></span></span></span></span></span></span></p>
<p><strong><em>Database Reference Stack (DBRS) with Memcached configuration: 2nd Generation Intel® Xeon® Scalable Platform </em></strong><em>– 2x Intel® Xeon® Platinum 82</em><em>80L Processor, 28 cores, HT On, Turbo On, Total Memory 192 GB (12 slots/ 16GB/ 2666 MHz) + 1024GB Intel® Optane™ Pmem (8 slots/ 128GB/ 2666 MHz), 1x SanDisk 480GB SSD, BIOS: SE5C620.86B.0X.02.0001.043020191705 (ucode:0x500002C), Clear Linux 32480, 5.5.6-914.native, GCC v9.2.1 compiler, rpc-perf 3.2.0-pre, dataset size=960GB (20GB*48 Instances), 90% get and 10% set, 1k byte values, 100% hit rate, score=5,689,980.33 ops/sec, p99 latency=767.90 us. </em></p>
<p><strong><em>Baseline Stack with Memcached configuration: 2nd Generation Intel®  Xeon® Scalable Platform</em></strong><em> – 2x Intel Xeon Platinum </em><em>8280L Processor, 28 cores, HT On, Turbo On, Total Memory 768 GB DRAM (24 slots/ 32GB/ 2666 MHz), 1x SanDisk 480GB SSD, BIOS: SE5C620.86B.0X.02.0001.043020191705 (ucode:0x500002C), Clear Linux 32480, 5.5.6-914.native, GCC v9.2.1 compiler, rpc-perf 3.2.0-pre, </em><em>dataset size=640GB (20GB*32 Instances), 90% get and 10% set, 1k byte values, 100% hit rate, score=4,934,670.00 ops/sec, p99 latency=659.40 us</em></p>
<p>Intel is working to provide databases that continue to run best on Intel Platforms. We use this stack to innovate on 2nd Gen Intel® Xeon® Scalable Processors with Intel® Optane™ PMem and plan to continue performance optimizations for coming generations.</p>
<p>Visit the<a href="https://clearlinux.org/sw/stacks"> Clear Linux Stacks </a>page to learn more, download the Database Reference Stack code, and contribute feedback. We welcome ideas for further enhancements through the <a href="mailto:Stacks@lists.01.org">stacks mailing list</a>.</p>
<hr /><p><strong><em>Notices and Disclaimers</em></strong></p>
<p><em>Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors.</em></p>
<p><em>Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information for performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit </em><a href="http://www.intel.com/benchmarks"><em>www.intel.com/benchmarks</em></a><em>. See charts above for configurations.</em></p>
<p><em>Performance results are based on testing as of 3/10/2020 and may not reflect all publicly available security updates. No product or component can be absolutely secure. </em>Your costs and results may vary.</p>
<p><strong><em>System configuration</em></strong></p>
<p><strong><em>Database Reference Stack (DBRS) with Memcached configuration: 2nd Generation Intel® Xeon® Scalable Platform </em></strong><em>– 2x Intel® Xeon® Platinum 82</em><em>80L Processor, 28 cores, HT On, Turbo On, Total Memory 192 GB (12 slots/ 16GB/ 2666 MHz) + 1024GB Intel® Optane™ Pmem (8 slots/ 128GB/ 2666 MHz), 1x SanDisk 480GB SSD, BIOS: SE5C620.86B.0X.02.0001.043020191705 (ucode:0x500002C), Clear Linux 32480, 5.5.6-914.native, GCC v9.2.1 compiler, rpc-perf 3.2.0-pre, dataset size=960GB (20GB*48 Instances), 90% get and 10% set, 1k byte values, 100% hit rate, score=5,689,980.33 ops/sec, p99 latency=767.90 us. </em></p>
<p><strong><em>Baseline Stack with Memcached configuration: 2nd Generation Intel®  Xeon® Scalable Platform</em></strong><em> – 2x Intel Xeon Platinum </em><em>8280L Processor, 28 cores, HT On, Turbo On, Total Memory 768 GB DRAM (24 slots/ 32GB/ 2666 MHz), 1x SanDisk 480GB SSD, BIOS: SE5C620.86B.0X.02.0001.043020191705 (ucode:0x500002C), Clear Linux 32480, 5.5.6-914.native, GCC v9.2.1 compiler, rpc-perf 3.2.0-pre, </em><em>dataset size=640GB (20GB*32 Instances), 90% get and 10% set, 1k byte values, 100% hit rate, score=4,934,670.00 ops/sec, p99 latency=659.40 us</em></p>
<p><em>Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.</em></p>
<p>Refer to <a href="http://software.intel.com/en-us/articles/optimization-notice">http://software.intel.com/en-us/articles/optimization-notice</a> for more information regarding performance and optimization choices in Intel software products.</p>
<p><em>Notice Revision #20110804</em></p>
<p><em>Intel, Optane, and Xeon are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries.</em></p>
<p><sub>[1]<a href="https://www.gartner.com/en/newsroom/press-releases/2020-01-15-gartner-says-global-it-spending-to-reach-3point9-trillion-in-2020">https://www.gartner.com/en/newsroom/press-releases/2020-01-15-gartner-says-global-it-spending-to-reach-3point9-trillion-in-2020</a></sub></p>
<p><sub>[2]<a href="https://www.intel.com/content/www/us/en/architecture-and-technology/optane-memory.html">https://www.intel.com/content/www/us/en/architecture-and-technology/optane-memory.html</a></sub></p>
<p><sub>[3] <a href="https://memcached.org/">https://memcached.org/</a></sub></p>
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