board: solidrun: clearfog: enable ddr odt0 on write for both chip-select

Enabling ODT is required to suppress reflection of the data signal on
DDR write operation. SolidRun Armada 388 SoM only connects M_ODT[0] even
when both chip-select are used.

Enable ODT[0] for both chip-select during write only.

Original work by Baruch Siach [1] and Chris Packham [2].

[1] https://github.com/SolidRun/u-boot-armada38x/commit/aba763a611e69fbcc4e229659da9d84f16b39814
[2] https://github.com/SolidRun/u-boot-armada38x/commit/dbaf09590df9add19e738d2de03c0f2d0d8f5433

Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Stefan Roese <sr@denx.de>

board/solidrun/clearfog/clearfog.c

@@ -161,7 +161,7 @@ static struct mv_ddr_topology_map board_topology_map = {
 	{0},				/* timing parameters */
 	{ {0} },			/* electrical configuration */
 	{0,},				/* electrical parameters */
-	0,				/* ODT configuration */
+	0x30000,			/* ODT configuration */
 	0x3,				/* clock enable mask */
 };